Abstract: The present invention provides a practical device which can hold data even if the power is shut OFF, and more particularly to a data holding device which has a high detection margin at data restoration and has high reliability. The data holding device 1 comprises a data latch circuit 3 and a composite capacitor 5. The data holding device 1 can store the data in the ferroelectric capacitors 17 and 19 in a non-volatile way. A voltage the same as the power supply voltage VDD is applied across the composite capacitor 5 where the ferroelectric capacitors 17 and 19 are connected in a series, and data is restored by detecting the voltage which is generated at the connection node 5a at this time. As a result, the detection margin can be dramatically increased.

Abstract: A method of manufacturing a ferroelectric memory device which has a gate structure constituted by a ferroelectric layer and a conductor layer stacked on a semiconductor substrate. The method includes steps of forming the gate structure section by patterning the ferroelectric layer and the conductor layer through etching using a common mask layer, introducing impurities into the semiconductor substrate in a self-aligning manner with respect to the gate structure section, and annealing simultaneously both of the ferroelectric layer and the impurities introduced into the conductor substrate to crystallize the ferroelectric layer and at the same time activate the impurities thereby to form a pair of impurity diffused layers.

Abstract: A method of manufacturing a ferroelectric memory device which has a gate structure constituted by a ferroelectric layer and a conductor layer stacked on a semiconductor substrate. The method includes steps of forming the gate structure section by patterning the ferroelectric layer and the conductor layer through etching using a common mask layer, introducing impurities into the semiconductor substrate in a self-aligning manner with respect to the gate structure section, and annealing simultaneously both of the ferroelectric layer and the impurities introduced into the conductor substrate to crystallize the ferroelectric layer and at the same time activate the impurities thereby to form a pair of impurity diffused layers.

Abstract: A semiconductor nonvolatile memory cell comprised of a p-type silicon well 12, an n+ drain 8 and an n+ source 10, the source and the drain regions defining an channel region 7. On top of the well 12 there are laminated a thin silicon dioxide film 2 served as a gate oxide, a polysilicon layer 32 and a SrTiO3 layer 34 comprised of a high dielectric substance, in respective order. Further on top of these layers, there is formed a polysilicon layer 36served as gate electrode. By using the memory cell and appropriate select transistors, a semiconductor nonvolatile memory device is constructed.

Abstract: A process for fabricating a semiconductor device having a buried layer comprises the steps of implanting an impurity ion into where the buried layer to be formed in a substrate, providing the substrate inside a reactor furnace, preparing a nonoxidizing atmosphere inside of the reactor furnace, annealing the substrate to activate and diffuse the implanted impurity ion region while increasing inside temperature of the reactor furnace up to a first temperature, and shifting the inside temperature of the reactor furnace from the first temperature to a second temperature in which a epitaxial crystal starts to grow and introducing a epitaxial growth gas into the reactor furnace to grow an epitaxial layer on a surface of the substrate.

Abstract: It is an object of the present invention to provide a sequential circuit having nonvolatile characteristics capable of holding data therein even when the power supply is shut-off. An inverter circuit INV1 is formed by replacing a pair of transistors consisting the conventional CMOS inverters with transistors NT and PT both having an MFMIS structure. A polarization state corresponding to an ON state is held in a ferroelectric layer 32 of the transistor NT even when the power supply thereof is shut off, and another polarization state corresponding to an OFF state is held in a ferroelectric layer 32 of the transistor PT. The transistors NT and PT are turned into ON and OFF state respectively according to the polarization states held in their ferroelectric layers 32 when the power supply is turned ON again. In this way, the inverter circuit INV1 recovers its state to the state right before the shut-off by turning the power supply into the ON state again.

Abstract: A method of manufacturing a ferroelectric memory device which has a gate structure constituted by a ferroelectric layer and a conductor layer stacked on a semiconductor substrate. The method includes steps of forming the gate structure section by patterning the ferroelectric layer and the conductor layer through etching using a common mask layer, introducing impurities into the semiconductor substrate in a self-aligning manner with respect to the gate structure section, and annealing simultaneously both of the ferroelectric layer and the impurities introduced into the conductor substrate to crystallize the ferroelectric layer and at the same time activate the impurities thereby to form a pair of impurity diffused layers.

Abstract: One NPN or PNP transistor is formed on a Si single crystal island having a crystal orientation which is the same as that of a Si substrate and formed into an island shape through an insulation and separation layer on the Si substrate so as to form a semiconductor apparatus which has no parasitic junctions.

Abstract: The present invention relates to a structure of semiconductor chip joint for mounting a plurality of semiconductor chips onto a single package.

Abstract: A semiconductor device is manufactured by forming an epitaxial layer (22) insulated from a silicon substrate (2), and forming a device in the epitaxial layer (22). On the semiconductor substrate (2), a silicon dioxide layer (4) is formed (FIG. 2A). Then the silicon dioxide layer (4) is provided with openings (14) (FIG. 2D). Silicon carbide is grown until it protrudes from the openings (14) to thereby form a silicon carbide seed crystal layer (16) (FIG. 2E). Next, oxidation is carried out, allowing a field oxide layer (20) to be connected at the portion under the openings (14) and the silicon carbide seed crystal layer (16) to be insulated from the silicon substrate (2). Thereafter, epitaxial growth is effected from the silicon carbide seed crystal layer (16). The growth is stopped before silicon grown layers (22) connect to one another, thus obtaining epitaxially grown layers (22) having regions which are separate from one another.

Abstract: A semiconductor device produced by forming an epitaxial layer insulated from a silicon substrate, and forming a device in the epitaxial layer. According to the process a silicon dioxide layer is formed on a semiconductor substrate. Then the silicon dioxide layer is provided with openings therein. Silicon is made to grow until it protrudes from the openings to thereby form a silicon seed crystal layer. Next, a silicon nitride layer is formed on the surface of the silicon seed crystal and thereafter is oxidized. A field oxide layer is thereby bonded at the lower portion of the openings so that the silicon seed crystal layer is insulated from the silicon substrate. Thereafter, epitaxial growth is effected from the silicon seed crystal layer. The growth is stopped just before silicon growth layers connect to one another, thus obtaining epitaxial grown layer having regions which are separated from one another. The device is formed in the epitaxially grown layer.

Abstract: A semiconductor device is manufactured by forming an epitaxial layer (22) insulated from a silicon substrate (2), and forming a device in the epitaxial layer (22). On the semiconductor substrate (2), a silicon dioxide layer (4) is formed (FIG. 2A). Then the silicon dioxide layer (4) is provided with openings (14) (FIG. 2D). Silicon carbide is grown until it protrudes from the openings (14) to thereby form a silicon carbide seed crystal layer (16) (FIG. 2E). Next, oxidation is carried out, allowing a field oxide layer (20) to be connected at the portion under the openings (14) and the silicon carbide seed crystal layer (16) to be insulated from the silicon substrate (2). Thereafter, epitaxial growth is effected from the silicon carbide seed crystal layer (16). The growth is stopped before silicon grown layers (22) connect to one another, thus obtaining epitaxially grown layers (22) having regions which are separate from one another. The MOS device is formed in this epitaxially grown layer (22).

Abstract: A poly-silicon or amorphous silicon plate having cone-like protrusions is provided on a Si substrate in a tunnel window area such that the edges of the protrusions are placed very close to a floating gate. Alternatively, the top surface of a Si substrate is shaped into protrusions.

Abstract: The present invention provides a semiconductor device by forming an epitaxial layer (22) insulated from a silicon substrate (2), and forming a device in the epitaxial layer (22). On the semiconductor substrate (2), a silicon dioxide layer (4) is formed (FIG. 2 A). Then the silicon dioxide layer (4) is provided with openings (14) (FIG. 2 D). Silicon is made to grow until it protrudes from the openings (14) to thereby form a silicon seed crystal layer (16) (FIG. 2 E). Next, a silicon nitride layer (18) is formed on the surface of the silicon seed crystal layer (16) and thereafter is oxidized. A field oxide layer (20) is thereby bonded at the lower portion of the openings (14), the silicon seed crystal layer (16) being insulated from the silicon substrate (2). Thereafter, epitaxial growth is effected from the silicon seed crystal layer (16).

Abstract: A semiconductor device is manufactured by forming an epitaxial layer 22 insulated from a silicon substrate 2, and forming a device in the epitaxial layer 22. On the semiconductor substrate 2, a silicon dioxide layer 4 is formed (FIG. 2A). Then the silicon dioxide layer 4 is provided with openings 14 (FIG. 2D). Silicon is grown until it protrudes from the openings 14 to thereby form a silicon seed crystal layer 16 (FIG. 2E). Next, a silicon nitride layer 18 is formed on the surface of the silicon seed crystal layer 16 and thereafter is oxidized. A field oxide layer 20 is thereby bonded at the lower portion of the openings 14, the silicon seed crystal layer 16 being insulated from the silicon substrate 2. Thereafter, epitaxial growth is effected from the silicon seed crystal layer 16, obtaining an epitaxially grown layer 22.

Abstract: The present invention provides a ferroelectric nonvolatile memory that utilizes ferroelectric properties and is able to operate correctly at lower voltage. A memory storage cell of the memory has the structure wherein a N+ type drain (24) and a N+ type source (26) is provided for a P type well (14) created in the substrate. A film (22) of high dielectric material spans the space (28) between the drain (24) and the source (26). A conductive metalization (20) overlies the film (22), a film (18) of ferroelectric material overlies the conductive metalization (20) and a metalization 16 overlies the film (18).

Abstract: A nonvolatile memory device for storing data in a flip flop circuit comprising field effect transistors having respective ferroelectric gate films. A pair of writing/reading transistors is connected to the flip flop circuit. Each of the field effect transistors constituting the flip flop circuit retains its channel formation state because of a residual polarization in the ferroelectric gate film. Thus, when power goes OFF, the flip flop circuit retains its state just before power goes OFF. In this way, data can be stored on a nonvolatile basis, and stored data can be read without destroying the data. Additionally, no refreshing is needed, and therefore, a power demand in standby is reduced.

Abstract: A semiconductor device is manufactured by forming an epitaxial layer (22) insulated from a silicon substrate (2), and forming a device in the epitaxial layer (22). On the semiconductor substrate (2), a silicon dioxide layer (4) is formed (FIG. 2A). Then the silicon dioxide layer (4) is provided with openings (14) (FIG. 2D). Silicon carbide is grown until it protrudes from the openings (14) to thereby form a silicon carbide seed crystal layer (16) (FIG. 2E). Next, oxidation is carried out, allowing a field oxide layer (20) to be connected at the portion under the openings (14) and the silicon carbide seed crystal layer (16) to be insulated from the silicon substrate (2). Thereafter, epitaxial growth is effected from the silicon carbide seed crystal layer (16). The growth is stopped before silicon carbide grown layers (22) connect to one another, thus obtaining epitaxially grown layers (22) having regions which are separate from one another. The MOS device is formed in this epitaxially grown layer (22).

Abstract: A silicon oxide layer is formed on a silicon substrate, and an opening whose wall is sloped inward is formed in the silicon oxide layer. A seed crystalline silicon layer is formed from the opening. The seed crystalline layer is selectively oxidized while leaving the seed crystalline layer required for crystal growth. An oxide formed at this time closes the opening. Consequently, the seed crystalline layer is insulated from the silicon substrate. The seed crystalline layer is epitaxially grown, to obtain a silicon growth layer on a field oxide layer. The growth layer is insulated from the silicon substrate, and is uniform in surface direction. Accordingly, there is no parasitic capacitance due to a p-n junction between the silicon substrate and the growth layer, thereby to make it possible to perform a high-speed operation.

Abstract: A semiconductor device having a field effect transistor in which a silicon carbide layer and a ferroelectric film are stacked in this order on the surface of a silicon substrate and the ferroelectric film is used as a gate insulation film. A channel between a source and a drain is formed in the silicon carbide layer. A metal or oxygen contained in a ferroelectric material is difficult to diffuse in silicon carbide. Therefore, the silicon carbide layer is not eroded in the case of heat treatment after forming the ferroelectric film. Therefore, good FET characteristics is obtained.