Patents by Inventor Hidemi Takasu

Hidemi Takasu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 5296086
    Abstract: A semiconductor device is manufactured by forming an epitaxial layer (22) insulated from a silicon substrate (2), and forming a device in the epitaxial layer (22). On the semiconductor substrate (2), a silicon dioxide layer (4) is formed (FIG. 2A). Then the silicon dioxide layer (4) is provided with openings (14) (FIG. 2D). Silicon carbide is grown until it protrudes from the openings (14) to thereby form a silicon carbide seed crystal layer (16) (FIG. 2E). Next, oxidation is carried out, allowing a field oxide layer (20) to be bonded at the portion under the openings (14) and the silicon carbide seed crystal layer (16) to be insulated from the silicon substrate (2). Thereafter, epitaxial growth is effected from the silicon carbide seed crystal layer (16), thus obtaining an epitaxially grown layers (22). The device is formed in this epitaxially grown layer (22).
    Type: Grant
    Filed: November 6, 1991
    Date of Patent: March 22, 1994
    Assignee: Rohm Co., Ltd.
    Inventor: Hidemi Takasu
  • Patent number: 5233219
    Abstract: A semiconductor device and a method of manufacture thereof by which circuit elements are readily formed as a three-dimensional structure without increasing the device size are provided. An N.sup.31 type epitaxially grown layer (4) is first formed on a P.sup.30 type silicon substrate (2), and then a P.sup.30 type diffusion layer (31), an emitter layer (32) (P.sup.30 type) and an N.sup.30 type diffusion layer (33) are formed in the N.sup.31 type epitaxially grown layer (4). Next, an underside of the substrate (2) is etched to form a bottom recessed part (6), from which a collector region (8) (P.sup.+ type) is formed in such a manner that it reaches the P.sup.+ type diffusion layer (31). Thus, a vertical PNP type transistor is obtained readily. In this method, the collector region (8) is formed at a latter step, so that redistribution of the collector region (8) due to epitaxial growth can be avoided.
    Type: Grant
    Filed: April 3, 1992
    Date of Patent: August 3, 1993
    Assignee: Rohm Co., Ltd.
    Inventors: Noriyuki Shimoji, Hidemi Takasu