Patents by Inventor Hidenori Matsuzaki
Hidenori Matsuzaki has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11972115Abstract: A memory system includes a management-information restoring unit. The management-information restoring unit determines whether a short break has occurred referring to a pre-log or a post-log in a NAND memory. The management-information restoring unit determines that a short break has occurred when the pre-log or the post-log is present in the NAND memory. In that case, the management-information restoring unit determines timing of occurrence of the short break, and, after selecting a pre-log or a post-log used for restoration, performs restoration of the management information reflecting these logs on a snapshot. Thereafter, the management-information restoring unit applies recovery processing to all write-once blocks in the NAND memory, takes the snapshot again, and opens the snapshot and the logs in the past.Type: GrantFiled: February 1, 2023Date of Patent: April 30, 2024Assignee: Kioxia CorporationInventors: Junji Yano, Hidenori Matsuzaki, Kosuke Hatsuda
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Patent number: 11960719Abstract: A semiconductor storage device includes a first memory area configured in a volatile semiconductor memory, second and third memory areas configured in a nonvolatile semiconductor memory, and a controller which executes following processing. The controller executes a first processing for storing a plurality of data by the first unit in the first memory area, a second processing for storing data outputted from the first memory area by a first management unit in the second memory area, and a third processing for storing data outputted from the first memory area by a second management unit in the third memory area.Type: GrantFiled: October 27, 2022Date of Patent: April 16, 2024Assignee: Kioxia CorporationInventors: Hirokuni Yano, Shinichi Kanno, Toshikatsu Hida, Hidenori Matsuzaki, Kazuya Kitsunai, Shigehiro Asano
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Patent number: 11886513Abstract: A data analysis system includes a computer configured to set a selected column selected from a plurality of columns contained in a first data set and an attribute value range selected from a plurality of attribute values contained in the selected column; extract, from the first data set, a second data set corresponding to the selected column or to the selected column and the attribute value range; analyze the second data set; and display a data image provided by visualizing the second data set and an analysis result image provided by visualizing an analysis result of the second data set.Type: GrantFiled: August 28, 2018Date of Patent: January 30, 2024Assignee: Kabushiki Kaisha ToshibaInventors: Hidenori Matsuzaki, Xinxiao Li
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Publication number: 20240013658Abstract: In one aspect, a processing method is executed by a processor to perform processing related to driving of a host moving object that is configured to communicate with a target moving object. The processing method includes: monitoring an envelope violation that is a violation of a safety envelope in which safety of intended functionality is set in the host moving object with respect to another road user other than the target moving object; and generating, when the envelope violation is recognized in the host moving object, warning information for warning of the envelope violation that is to be transmitted to the target moving object.Type: ApplicationFiled: September 22, 2023Publication date: January 11, 2024Inventors: HIDENORI MATSUZAKI, HIROTOSHI YASUOKA
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Publication number: 20240013659Abstract: In one aspect, a processing method is executed by a processor to perform processing related to driving of a host moving object that is configured to communicate with a target moving object. The processing method includes: monitoring an envelope violation that is a violation of a safety envelope in which safety of intended functionality is set in the host moving object with respect to another road user other than the target moving object; and generating, when the envelope violation is recognized in the host moving object, warning information for warning of the envelope violation that is to be transmitted to the target moving object.Type: ApplicationFiled: September 22, 2023Publication date: January 11, 2024Inventors: HIDENORI MATSUZAKI, HIROTOSHI YASUOKA
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Publication number: 20230168815Abstract: A memory system includes a management-information restoring unit. The management-information restoring unit determines whether a short break has occurred referring to a pre-log or a post-log in a NAND memory. The management-information restoring unit determines that a short break has occurred when the pre-log or the post-log is present in the NAND memory. In that case, the management-information restoring unit determines timing of occurrence of the short break, and, after selecting a pre-log or a post-log used for restoration, performs restoration of the management information reflecting these logs on a snapshot. Thereafter, the management-information restoring unit applies recovery processing to all write-once blocks in the NAND memory, takes the snapshot again, and opens the snapshot and the logs in the past.Type: ApplicationFiled: February 1, 2023Publication date: June 1, 2023Applicant: Kioxia CorporationInventors: Junji YANO, Hidenori Matsuzaki, Kosuke Hatsuda
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Publication number: 20230042619Abstract: A semiconductor storage device includes a first memory area configured in a volatile semiconductor memory, second and third memory areas configured in a nonvolatile semiconductor memory, and a controller which executes following processing. The controller executes a first processing for storing a plurality of data by the first unit in the first memory area, a second processing for storing data outputted from the first memory area by a first management unit in the second memory area, and a third processing for storing data outputted from the first memory area by a second management unit in the third memory area.Type: ApplicationFiled: October 27, 2022Publication date: February 9, 2023Applicant: Kioxia CorporationInventors: Hirokuni YANO, Shinichi KANNO, Toshikatsu HIDA, Hidenori MATSUZAKI, Kazuya KITSUNAI, Shigehiro ASANO
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Patent number: 11573712Abstract: A memory system includes a management-information restoring unit. The management-information restoring unit determines whether a short break has occurred referring to a pre-log or a post-log in a NAND memory. The management-information restoring unit determines that a short break has occurred when the pre-log or the post-log is present in the NAND memory. In that case, the management-information restoring unit determines timing of occurrence of the short break, and, after selecting a pre-log or a post-log used for restoration, performs restoration of the management information reflecting these logs on a snapshot. Thereafter, the management-information restoring unit applies recovery processing to all write-once blocks in the NAND memory, takes the snapshot again, and opens the snapshot and the logs in the past.Type: GrantFiled: April 13, 2021Date of Patent: February 7, 2023Assignee: KIOXIA CORPORATIONInventors: Junji Yano, Hidenori Matsuzaki, Kosuke Hatsuda
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Patent number: 11513682Abstract: A semiconductor storage device includes a first memory area configured in a volatile semiconductor memory, second and third memory areas configured in a nonvolatile semiconductor memory, and a controller which executes following processing. The controller executes a first processing for storing a plurality of data by the first unit in the first memory area, a second processing for storing data outputted from the first memory area by a first management unit in the second memory area, and a third processing for storing data outputted from the first memory area by a second management unit in the third memory area.Type: GrantFiled: October 29, 2020Date of Patent: November 29, 2022Assignee: Kioxia CorporationInventors: Hirokuni Yano, Shinichi Kanno, Toshikatsu Hida, Hidenori Matsuzaki, Kazuya Kitsunai, Shigehiro Asano
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Publication number: 20220374151Abstract: A memory system includes a volatile first storing unit, a nonvolatile second storing unit in which data is managed in a predetermined unit, and a controller that writes data requested by a host apparatus in the second storing unit via the first storing unit and reads out data requested by the host apparatus from the second storing unit to the first storing unit and transfers the data to the host apparatus. The controller includes a management table for managing the number of failure areas in a predetermined unit that occur in the second storing unit and switches, according to the number of failure areas, an operation mode in writing data in the second storing unit from the host apparatus.Type: ApplicationFiled: August 3, 2022Publication date: November 24, 2022Applicant: KIOXIA CORPORATIONInventors: Junji YANO, Hidenori MATSUZAKI, Kosuke HATSUDA
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Patent number: 11409442Abstract: A memory system includes a volatile first storing unit, a nonvolatile second storing unit in which data is managed in a predetermined unit, and a controller that writes data requested by a host apparatus in the second storing unit via the first storing unit and reads out data requested by the host apparatus from the second storing unit to the first storing unit and transfers the data to the host apparatus. The controller includes a management table for managing the number of failure areas in a predetermined unit that occur in the second storing unit and switches, according to the number of failure areas, an operation mode in writing data in the second storing unit from the host apparatus.Type: GrantFiled: December 17, 2020Date of Patent: August 9, 2022Assignee: KIOXIA CORPORATIONInventors: Junji Yano, Hidenori Matsuzaki, Kosuke Hatsuda
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Publication number: 20210232326Abstract: A memory system includes a management-information restoring unit. The management-information restoring unit determines whether a short break has occurred referring to a pre-log or a post-log in a NAND memory. The management-information restoring unit determines that a short break has occurred when the pre-log or the post-log is present in the NAND memory. In that case, the management-information restoring unit determines timing of occurrence of the short break, and, after selecting a pre-log or a post-log used for restoration, performs restoration of the management information reflecting these logs on a snapshot. Thereafter, the management-information restoring unit applies recovery processing to all write-once blocks in the NAND memory, takes the snapshot again, and opens the snapshot and the logs in the past.Type: ApplicationFiled: April 13, 2021Publication date: July 29, 2021Applicant: TOSHIBA MEMORY CORPORATIONInventors: Junji YANO, Hidenori MATSUZAKI, Kosuke HATSUDA
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Patent number: 10996868Abstract: A memory system includes a management-information restoring unit. The management-information restoring unit determines whether a short break has occurred referring to a pre-log or a post-log in a NAND memory. The management-information restoring unit determines that a short break has occurred when the pre-log or the post-log is present in the NAND memory. In that case, the management-information restoring unit determines timing of occurrence of the short break, and, after selecting a pre-log or a post-log used for restoration, performs restoration of the management information reflecting these logs on a snapshot. Thereafter, the management-information restoring unit applies recovery processing to all write-once blocks in the NAND memory, takes the snapshot again, and opens the snapshot and the logs in the past.Type: GrantFiled: July 23, 2019Date of Patent: May 4, 2021Assignee: TOSHIBA MEMORY CORPORATIONInventors: Junji Yano, Hidenori Matsuzaki, Kosuke Hatsuda
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Publication number: 20210103390Abstract: A memory system includes a volatile first storing unit, a nonvolatile second storing unit in which data is managed in a predetermined unit, and a controller that writes data requested by a host apparatus in the second storing unit via the first storing unit and reads out data requested by the host apparatus from the second storing unit to the first storing unit and transfers the data to the host apparatus. The controller includes a management table for managing the number of failure areas in a predetermined unit that occur in the second storing unit and switches, according to the number of failure areas, an operation mode in writing data in the second storing unit from the host apparatus.Type: ApplicationFiled: December 17, 2020Publication date: April 8, 2021Applicant: Toshiba Memory CorporationInventors: Junji YANO, Hidenori MATSUZAKI, Kosuke HATSUDA
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Publication number: 20210042034Abstract: A semiconductor storage device includes a first memory area configured in a volatile semiconductor memory, second and third memory areas configured in a nonvolatile semiconductor memory, and a controller which executes following processing. The controller executes a first processing for storing a plurality of data by the first unit in the first memory area, a second processing for storing data outputted from the first memory area by a first management unit in the second memory area, and a third processing for storing data outputted from the first memory area by a second management unit in the third memory area.Type: ApplicationFiled: October 29, 2020Publication date: February 11, 2021Applicant: Toshiba Memory CorporationInventors: Hirokuni YANO, Shinichi KANNO, Toshikatsu HIDA, Hidenori MATSUZAKI, Kazuya KITSUNAI, Shigehiro ASANO
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Patent number: 10901625Abstract: A memory system includes a volatile first storing unit, a nonvolatile second storing unit in which data is managed in a predetermined unit, and a controller that writes data requested by a host apparatus in the second storing unit via the first storing unit and reads out data requested by the host apparatus from the second storing unit to the first storing unit and transfers the data to the host apparatus. The controller includes a management table for managing the number of failure areas in a predetermined unit that occur in the second storing unit and switches, according to the number of failure areas, an operation mode in writing data in the second storing unit from the host apparatus.Type: GrantFiled: March 5, 2019Date of Patent: January 26, 2021Assignee: Toshiba Memory CorporationInventors: Junji Yano, Hidenori Matsuzaki, Kosuke Hatsuda
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Patent number: 10861201Abstract: An information generation system includes: an acquisition unit to acquire a set of records, each f which indicates a correspondence relation between a setting condition and a processing result for each processing, a generation unit to generate display information in order generate a display image based on the set of records, and a control unit to control a display unit so as to display the display image based on the display information. The display image includes the first area and the second area. Setting condition axes are displayed on the first area. Processing result axes are displayed on the second area. Value objects indicating concrete values of the setting condition are displayed at the setting condition axes. Value objects indicating concrete values of the processing result are displayed at the processing result axes. Between the value objects, relation objects indicating correspondence relations are displayed.Type: GrantFiled: February 17, 2016Date of Patent: December 8, 2020Assignee: Kabushiki Kaisha ToshibaInventors: Akira Kuroda, Hidenori Matsuzaki, Nobuaki Tojo, Mayuko Koezuka
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Patent number: 10853321Abstract: A storage system includes non-volatile storage devices and a control device. Each of the storage devices is divided into blocks, and data is erased in units of the blocks. The control device includes a setting unit and a writing/reading unit. The setting unit sets first storage regions obtained by dividing a storage region for each of the storage devices and sets second storage regions obtained by dividing storage regions of all of the storage devices for all of the storage devices. The writing/reading unit manages data stored in the storage devices in units of the second storage regions. The setting unit sets each of the first storage regions so that the first storage region for at least one of the plurality of storage devices includes the entirety of one or more blocks and sets each of the second storage regions to include two or more of the first storage regions.Type: GrantFiled: September 12, 2017Date of Patent: December 1, 2020Assignee: Toshiba Memory CorporationInventors: Yohei Hasegawa, Yoshiki Saito, Shohei Onishi, Hidenori Matsuzaki, Shigehiro Asano
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Patent number: 10845992Abstract: A semiconductor storage device includes a first memory area configured in a volatile semiconductor memory, second and third memory areas configured in a nonvolatile semiconductor memory, and a controller which executes following processing. The controller executes a first processing for storing a plurality of data by the first unit in the first memory area, a second processing for storing data outputted from the first memory area by a first management unit in the second memory area, and a third processing for storing data outputted from the first memory area by a second management unit in the third memory area.Type: GrantFiled: March 26, 2019Date of Patent: November 24, 2020Assignee: Toshiba Memory CorporationInventors: Hirokuni Yano, Shinichi Kanno, Toshikatsu Hida, Hidenori Matsuzaki, Kazuya Kitsunai, Shigehiro Asano
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Patent number: 10579616Abstract: A data search system is configured to: generate a first data set including a plurality of records, in which a first column is used as a reference column, and clustering is performed for each predetermined range of the first column to generate first clusters; generate a second data set including the plurality of records, in which a second column is used as the reference column, and clustering is performed for each predetermined range of the second column to generate second clusters; cause a memory device to store therein the first date set and the second data set; generate index information in which information indicating the reference column, information indicating the predetermined range, and a memory area of the clusters are associated with each other; read out the cluster from the memory device based on the index information; and extract data matching the search condition from the read cluster.Type: GrantFiled: February 23, 2018Date of Patent: March 3, 2020Assignee: Kabushiki Kaisha ToshibaInventors: Hidenori Matsuzaki, Xinxiao Li, Dan Umeda