Patents by Inventor Hidenori Matsuzaki

Hidenori Matsuzaki has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9792706
    Abstract: According to one embodiment, a graph processing system includes a specifying unit, a decision unit, and a generation unit. The specifying unit specifies a first record set corresponding to a first segment of first elements in graph data including a plurality of records. Each record has a first element and a second element. The decision unit analyzes the first record set on the basis of a predetermined rule, and determines at least one second record set corresponding to a second segment of first elements. The second segment is a part of the first segment. The generation unit generates a segment graph corresponding to the second record set.
    Type: Grant
    Filed: August 21, 2015
    Date of Patent: October 17, 2017
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Akira Kuroda, Hidenori Matsuzaki, Nobuaki Tojo, Mayuko Koezuka
  • Publication number: 20170277723
    Abstract: An obtaining unit obtains a first-type request which includes address information corresponding to a writing instruction or a reading instruction with respect to a value. A converting unit converts the first-type request into a second-type request which includes a key having a combination of the address information and version information. The version information is updated every time the writing instruction is issued with the position indicated by the address information as the writing position. Based on the second-type request, a control unit either performs a writing operation for writing the value corresponding to the key in a key value store type database including a plurality of storage devices each of which is set either as a master storage device or as a slave storage device, or performs a reading operation for reading the value corresponding to the key from the database.
    Type: Application
    Filed: December 15, 2016
    Publication date: September 28, 2017
    Applicant: Kabushiki Kaisha Toshiba
    Inventors: Hidekazu TADOKORO, Hidenori MATSUZAKI, Masahiro ISHIYAMA
  • Publication number: 20170269843
    Abstract: A semiconductor storage device includes a first memory area configured in a volatile semiconductor memory, second and third memory areas configured in a nonvolatile semiconductor memory, and a controller which executes following processing. The controller executes a first processing for storing a plurality of data by the first unit in the first memory area, a second processing for storing data outputted from the first memory area by a first management unit in the second memory area, and a third processing for storing data outputted from the first memory area by a second management unit in the third memory area.
    Type: Application
    Filed: June 8, 2017
    Publication date: September 21, 2017
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventors: HIROKUNI YANO, SHINICHI KANNO, TOSHIKATSU HIDA, HIDENORI MATSUZAKI, KAZUYA KITSUNAI, SHIGEHIRO ASANO
  • Patent number: 9747190
    Abstract: According to an embodiment, a system includes an analysis generator, a trace difference generator, a program difference generator, and an analyzer. The analysis generator is configured to generate program information required in executing a program, generate trace information providing a description of an execution at particular timing, based on the program information, and generate a trace correspondence between the trace and program information. The trace difference generator is configured to generate a trace difference between first and second trace information. The program difference generator is configured to generate a program difference between first and second program information. The analyzer is configured to analyze a correspondence relation between the differences and the program information based on the trace correspondence.
    Type: Grant
    Filed: July 17, 2014
    Date of Patent: August 29, 2017
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Nobuaki Tojo, Hidenori Matsuzaki, Akira Kuroda, Mayuko Koezuka
  • Patent number: 9734606
    Abstract: In a system according to an embodiment, program structure information may include interval information. Each interval information may include source code position information indicating a successive region on a source code of a target program and parent-child information for specifying a parent-child relationship with respect to the interval information. The program structure information may include a reference interval without a parent. A processing unit may specify the number of parents existing between each interval information and the reference interval as a depth of each interval information from the reference interval, and create display information by arranging the interval information on a coordinate system defined by a first axis representing depth from the reference interval and a second axis representing the parent-child relationship based on the depth from the reference and the parent-child information.
    Type: Grant
    Filed: July 17, 2014
    Date of Patent: August 15, 2017
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Nobuaki Tojo, Hidenori Matsuzaki, Akira Kuroda, Mayuko Koezuka
  • Patent number: 9727990
    Abstract: A graph display device includes a condition receiver, a time information display circuitry, an instruction receiver and a graph display circuitry. The condition receiver receives a condition for specifying at least one data item from graph data including a plurality of data items. The time information display circuitry displays time information relative to a time to display a graph based on the specified data item. The instruction receiver receives an instruction for starting display of the graph. The graph display circuitry displays the graph when the instruction is received.
    Type: Grant
    Filed: September 18, 2015
    Date of Patent: August 8, 2017
    Assignee: KABUSHIKI KAISHA TOSHIBA
    Inventors: Akira Kuroda, Hidenori Matsuzaki, Mayuko Koezuka, Nobuaki Tojo
  • Patent number: 9703486
    Abstract: A semiconductor storage device includes a first memory area configured in a volatile semiconductor memory, second and third memory areas configured in a nonvolatile semiconductor memory, and a controller which executes following processing. The controller executes a first processing for storing a plurality of data by the first unit in the first memory area, a second processing for storing data outputted from the first memory area by a first management unit in the second memory area, and a third processing for storing data outputted from the first memory area by a second management unit in the third memory area.
    Type: Grant
    Filed: August 10, 2015
    Date of Patent: July 11, 2017
    Assignee: KABUSHIKI KAISHA TOSHIBA
    Inventors: Hirokuni Yano, Shinichi Kanno, Toshikatsu Hida, Hidenori Matsuzaki, Kazuya Kitsunai, Shigehiro Asano
  • Patent number: 9690682
    Abstract: A program information generating system includes an acquisition unit that acquires dependency information indicating dependency among a plurality of events generated by execution of a program and selection information identifying a selected event that is the event selected by a user; a generation unit that generates display information, on the basis of the dependency information and the selection information, such that a dependency path that is formed of the plurality of events having the dependency and includes the selected event is displayed in a distinguishable manner; and a display control unit that controls a display unit, on the basis of the display information, such that a display image indicating an execution state of the program is displayed.
    Type: Grant
    Filed: May 21, 2015
    Date of Patent: June 27, 2017
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Akira Kuroda, Yohei Hasegawa, Hidenori Matsuzaki, Nobuaki Tojo, Mayuko Koezuka
  • Publication number: 20170131929
    Abstract: A memory system includes a management-information restoring unit. The management-information restoring unit determines whether a short break has occurred referring to a pre-log or a post-log in a NAND memory. The management-information restoring unit determines that a short break has occurred when the pre-log or the post-log is present in the NAND memory. In that case, the management-information restoring unit determines timing of occurrence of the short break, and, after selecting a pre-log or a post-log used for restoration, performs restoration of the management information reflecting these logs on a snapshot. Thereafter, the management-information restoring unit applies recovery processing to all write-once blocks in the NAND memory, takes the snapshot again, and opens the snapshot and the logs in the past.
    Type: Application
    Filed: January 24, 2017
    Publication date: May 11, 2017
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventors: Junji YANO, Hidenori MATSUZAKI, Kosuke HATSUDA
  • Publication number: 20170075665
    Abstract: A call tree generation unit generates a first call tree and a second call tree from a single piece of source code based on running information. The first call tree includes at least one first nodes associated with at least one first scopes. The second call tree includes at least one second nodes associated with at least one second scopes. A node information generation unit generates, based on scope correspondence information, the first call tree, and the second call tree, node correspondence information that indicates correspondence between the first node and the second node.
    Type: Application
    Filed: September 6, 2016
    Publication date: March 16, 2017
    Applicant: Kabushiki Kaisha Toshiba
    Inventors: Mayuko KOEZUKA, Nobuaki TOJO, Hidenori MATSUZAKI, Akira KURODA
  • Patent number: 9582370
    Abstract: A memory system includes a management-information restoring unit. The management-information restoring unit determines whether a short break has occurred referring to a pre-log or a post-log in a NAND memory. The management-information restoring unit determines that a short break has occurred when the pre-log or the post-log is present in the NAND memory. In that case, the management-information restoring unit determines timing of occurrence of the short break, and, after selecting a pre-log or a post-log used for restoration, performs restoration of the management information reflecting these logs on a snapshot. Thereafter, the management-information restoring unit applies recovery processing to all write-once blocks in the NAND memory, takes the snapshot again, and opens the snapshot and the logs in the past.
    Type: Grant
    Filed: September 1, 2015
    Date of Patent: February 28, 2017
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Junji Yano, Hidenori Matsuzaki, Kosuke Hatsuda
  • Publication number: 20170052881
    Abstract: A trace information management system includes: an acquirer configured to acquire trace information indicating an execution sequence of a plurality of scopes included in a source code and characteristic values observable during execution of the scopes, and to acquire first attribute information obtained by aggregating the characteristic values of a plurality of pieces of scope identification information identifying the scopes; a specifier configured to specify at least one of the pieces of the scope identification information from the first attribute information; and an extractor configured to extract, from the trace information, information corresponding to the specified piece of the scope identification information.
    Type: Application
    Filed: August 11, 2016
    Publication date: February 23, 2017
    Applicant: Kabushiki Kaisha Toshiba
    Inventors: Nobuaki TOJO, Mayuko KOEZUKA, Hidenori MATSUZAKI, Akira KURODA
  • Patent number: 9536330
    Abstract: A system according to an embodiment may include: a generation unit that acquires axis information in a coordinate system drawing execution status of a program, and generates an axis object representing the coordinate system based on the axis information; a display event information generation unit that acquires event information related to each of the two or more events and program structure information related to a section of the program generating the two or more events, and generates display event information related to one or more display events representing the two or more events; and an object generation unit that acquires the display event information and display event unit information indicating a display unit of the display event, and generates one or more event objects based on the display event information and the display event unit information.
    Type: Grant
    Filed: February 20, 2015
    Date of Patent: January 3, 2017
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Akira Kuroda, Xinxiao Li, Hidenori Matsuzaki, Nobuaki Tojo, Mayuko Koezuka, Nobuyasu Nakajima
  • Publication number: 20160358352
    Abstract: An information generation system includes: an acquisition unit to acquire a set of records, each f which indicates a correspondence relation between a setting condition and a processing result for each processing, a generation unit to generate display information in order generate a display image based on the set of records, and a control unit to control a display unit so as to display the display image based on the display information. The display image includes the first area and the second area. Setting condition axes are displayed on the first area. Processing result axes are displayed on the second area. Value objects indicating concrete values of the setting condition are displayed at the setting condition axes. Value objects indicating concrete values of the processing result are displayed at the processing result axes. Between the value objects, relation objects indicating correspondence relations are displayed.
    Type: Application
    Filed: February 17, 2016
    Publication date: December 8, 2016
    Applicant: Kabushiki Kaisha Toshiba
    Inventors: Akira KURODA, Hidenori MATSUZAKI, Nobuaki TOJO, Mayuko KOEZUKA
  • Patent number: 9495150
    Abstract: According to an embodiment, an information processing apparatus includes a storage, an accepting unit, an analyzer, a determination unit, and an output controller. The storage stores therein one or more pieces of first feature information respectively representing features of one or more source codes, and one or more pieces of assistance information representing update situations of the source codes, in a corresponding manner. The accepting unit accepts input of second feature information representing a feature of a source code to be analyzed. The analyzer calculates similarity between the first feature information and the second feature information. The determination unit selects, based on the similarity, assistance information to be output, from the pieces of assistance information stored in the storage. The output controller outputs the selected assistance information.
    Type: Grant
    Filed: March 4, 2015
    Date of Patent: November 15, 2016
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Mayuko Koezuka, Hidenori Matsuzaki, Akira Kuroda, Nobuaki Tojo
  • Publication number: 20160275707
    Abstract: According to one embodiment, a graph processing system includes a specifying unit, a decision unit, and a generation unit. The specifying unit specifies a first record set corresponding to a first segment of first elements in graph data including a plurality of records. Each record has a first element and a second element. The decision unit analyzes the first record set on the basis of a predetermined rule, and determines at least one second record set corresponding to a second segment of first elements. The second segment is a part of the first segment. The generation unit generates a segment graph corresponding to the second record set.
    Type: Application
    Filed: August 21, 2015
    Publication date: September 22, 2016
    Applicant: Kabushiki Kaisha Toshiba
    Inventors: Akira KURODA, Hidenori MATSUZAKI, Nobuaki TOJO, Mayuko KOEZUKA
  • Patent number: 9430232
    Abstract: In a system according to any one of embodiments, program structure information may include interval information. Each interval information may include source code position information indicating a successive region on a source code of a target program and parent-child information for specifying a parent-child relationship with respect to the interval information. The program structure information may include a reference interval without a parent. A processing unit may specify the number of parents existing between each interval information and the reference interval as a depth of each interval information from the reference interval, and create display information by arranging the interval information on a coordinate system defined by a first axis representing depth from the reference interval and a second axis representing the parent-child relationship based on the depth from the reference and the parent-child information.
    Type: Grant
    Filed: February 20, 2015
    Date of Patent: August 30, 2016
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Akira Kuroda, Hidenori Matsuzaki, Mayuko Koezuka, Nobuaki Tojo
  • Patent number: 9417799
    Abstract: A memory system includes a nonvolatile semiconductor memory having blocks, the block being data erasing unit; and a controller configured to execute; an update processing for; writing superseding data in a block, the superseding data being treated as valid data; and invalidating superseded data having the same logical address as the superseding data, the superseded data being treated as invalid data; and a compaction processing for; retrieving blocks having invalid data using a management table, the management table managing blocks in a linked list format for each number of valid data included in the block; selecting a compaction source block having at least one valid data from the retrieved blocks; copying a plurality of valid data included in the compaction source blocks into a compaction target block; invalidating the plurality of valid data in the compaction source blocks; and releasing the compaction source blocks in which all data are invalidated.
    Type: Grant
    Filed: June 17, 2015
    Date of Patent: August 16, 2016
    Assignee: KABUSHIKI KAISHA TOSHIBA
    Inventors: Junji Yano, Kosuke Hatsuda, Hidenori Matsuzaki, Wataru Okamoto
  • Patent number: 9384070
    Abstract: A system according to an embodiment is configured to display program execution results with respect to a common axis. The system includes a first unit that acquires event information about two or more events, acquires reference-event identification information to be used in identifying reference events, and generates event objects which represent the events, and a second unit that acquires axis information which represents information about the common axis. The event information contains timing information indicating positions of the events. The first unit sets the reference events as references for the program execution results based on the acquired reference-event identification information, determines display positions of the reference events with respect to the common axis to be same position based on timing information in event information about the reference events, and generates event objects representing the reference events based on the determined display positions with respect to the common axis.
    Type: Grant
    Filed: February 23, 2015
    Date of Patent: July 5, 2016
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Akira Kuroda, Hidenori Matsuzaki, Mayuko Koezuka, Nobuaki Tojo
  • Publication number: 20160093075
    Abstract: A graph display device includes a condition receiver, a time information display circuitry, an instruction receiver and a graph display circuitry. The condition receiver receives a condition for specifying at least one data item from graph data including a plurality of data items. The time information display circuitry displays time information relative to a time to display a graph based on the specified data item. The instruction receiver receives an instruction for starting display of the graph. The graph display circuitry displays the graph when the instruction is received.
    Type: Application
    Filed: September 18, 2015
    Publication date: March 31, 2016
    Applicant: Kabushiki Kaisha Toshiba
    Inventors: Akira KURODA, Hidenori Matsuzaki, Mayuko Koezuka, Nobuaki Tojo