Patents by Inventor Hideo Aoki

Hideo Aoki has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20200091102
    Abstract: An electronic apparatus includes first and second packages. The first package includes a first semiconductor chip between opposing first and second surfaces of the first package, a plurality of terminals on the first semiconductor chip facing a first direction that is perpendicular to the first and second surface, the terminals including first input/output terminals and a second input/output terminal, and a plurality of bumps that are electrically connected to the plurality of first input/output terminals at positions that are directly below the first semiconductor chip in the first direction. The second package includes a second semiconductor chip provided on the second surface of the first package, a wire that electrically connects the second semiconductor chip to a conductor that is electrically connected to the second input/output terminal, and coating resin that covers the second surface of the first package, the second semiconductor chip and the wire.
    Type: Application
    Filed: February 20, 2019
    Publication date: March 19, 2020
    Inventor: Hideo AOKI
  • Patent number: 10565190
    Abstract: An index tree search method, by a computer, for searching an index tree included in a database provided by the computer which includes processors executing a plurality of threads and a memory, the index tree search method comprising: a first step of allocating, by the computer, search ranges in the index tree to the plurality of threads; a second step of receiving, by the computer, a search key; a third step of selecting, by the computer, a thread corresponding to the received search key; and a fourth step of searching, by the computer, the index tree with the selected thread using the received search key.
    Type: Grant
    Filed: October 29, 2014
    Date of Patent: February 18, 2020
    Assignee: Hitachi, Ltd.
    Inventors: Tomohiro Hanai, Kazutomo Ushijima, Tsuyoshi Tanaka, Hideo Aoki, Atsushi Tomoda
  • Patent number: 10530287
    Abstract: An electric power adjustment system includes a fuel cell connected to a load, and a multi-phase converter connected between the fuel cell and the load. The multi-phase converter is constituted of a plurality of phases and converts an output voltage from the fuel cell by a predetermined required voltage ratio. The electric power adjustment system includes a ripple current characteristic switching unit configured to switch a ripple current characteristic with respect to an input current to the multi-phase converter by changing at least one of a drive phase number and the voltage ratio of the multi-phase converter according to an operation state of the fuel cell and a required electric power of the load.
    Type: Grant
    Filed: March 6, 2015
    Date of Patent: January 7, 2020
    Assignee: NISSAN MOTOR CO., LTD.
    Inventors: Michihiko Matsumoto, Hideo Yoshida, Tetsuya Aoki
  • Publication number: 20190393114
    Abstract: A semiconductor device includes a first semiconductor chip, a second semiconductor chip thicker than the first semiconductor chip, a plurality of bumps provided between the first and second semiconductor chips and electrically connecting the first and second semiconductor chips, an adhesive resin provided between the first and second semiconductor chips and bonding the first and second semiconductor chips, and a sealing resin encapsulating the first and second semiconductor chips. At least one of the first and second semiconductor chips has an organic protective film disposed thereon.
    Type: Application
    Filed: February 5, 2019
    Publication date: December 26, 2019
    Applicant: Toshiba Memory Corporation
    Inventors: Satoshi TSUKIYAMA, Hideo AOKI, Masatoshi KAWATO, Masayuki MIURA, Masatoshi FUKUDA, Soichi HOMMA
  • Patent number: 10497688
    Abstract: A semiconductor device according to an embodiment includes a first memory chip having a first front surface and a first back surface and having a first memory circuit provided on the first front surface side; a second memory chip having a second front surface and a second back surface facing the first front surface, having a second memory circuit provided on the second front surface side, and being electrically connected to the first memory chip; and a logic chip having the first memory chip provided between the logic chip and the second memory chip, having a third front surface and a third back surface, having a logic circuit provided on the third front surface side, and being electrically connected to the first memory chip.
    Type: Grant
    Filed: March 20, 2018
    Date of Patent: December 3, 2019
    Assignee: Toshiba Memory Corporation
    Inventors: Satoshi Tsukiyama, Yoichiro Kurita, Hideo Aoki, Kazushige Kawasaki
  • Publication number: 20190304603
    Abstract: Example implementations described herein are directed to systems and methods for feature preparation that receives patient feature data and determines similarity of pre-stored models with the patient feature data. In an example implementation, a database of the pre-stored models is analyzed to assess similarity indicating that feature preparation of the pre-stored models is compatible with the patient feature data. For similarity indicative of feature preparation to be utilized, the feature preparation is conducted for the patient feature data based on the pre-stored model determined to be similar. The feature preparation retrieves reusable features associate with the similar pre-stored model, where the reusable features comprise pre-calculated features of the model. A machine learning model is generated using results of the feature preparation and patient feature data; and a prediction is provided using the machine learning model.
    Type: Application
    Filed: March 30, 2018
    Publication date: October 3, 2019
    Inventors: Mika TAKATA, Hideo AOKI
  • Patent number: 10430287
    Abstract: A computer for executing processing through use of a database, the computer comprising: a processor including a cache memory; and a non-volatile memory coupled to the processor, the non-volatile memory having the database constructed thereon. The computer comprises: a database management module configured to execute processing on the database; and a write processing module configured to write data stored in the cache memory into the database. The write processing module writes data that is operated in the transaction processing into the database among data stored in the cache memory, in a case of receiving a commit request for transaction processing that uses the database.
    Type: Grant
    Filed: April 23, 2014
    Date of Patent: October 1, 2019
    Assignee: Hitachi, Ltd.
    Inventors: Tsuyoshi Tanaka, Yuuya Isoda, Atsushi Tomoda, Tomohiro Hanai, Hideo Aoki
  • Publication number: 20190281727
    Abstract: A cooling apparatus includes an immersion-tank configured to store a refrigerant, a refrigerant suction port formed at a lower portion of the immersion-tank, the refrigerant suction port being configured to suck the refrigerant from an outside of the immersion-tank into an inside of the immersion-tank, an electronic device immersed in the refrigerant, the electronic device including, a first heat-generation portion, a second heat-generation portion having a heat-generation amount smaller than a heat-generation amount of the first heat-generation portion, and a refrigerant inlet positioned below the first heat-generation portion and the second heat-generation portion and being open downward, and a block positioned below the first heat-generation portion and the second heat-generation portion, the block including a through-hole through which a region positioned below the first heat-generation portion in the refrigerant inlet is open, and a closing portion that closes a region positioned below the second heat-ge
    Type: Application
    Filed: March 4, 2019
    Publication date: September 12, 2019
    Applicant: FUJITSU LIMITED
    Inventors: Shinnosuke FUJIWARA, Nobumitsu Aoki, Hideo Kubo, Keita Hirai
  • Publication number: 20190161434
    Abstract: The present invention relates to a method for producing a specified ?-amino acid, the method including allowing a specified ?-amino acid amide and water to react with each other in the presence of a zirconium compound which contains zirconium and at least one metal element selected from the group consisting of lithium, nickel, copper, zinc, cesium, barium, hafnium, tantalum, cerium, and dysprosium.
    Type: Application
    Filed: July 25, 2017
    Publication date: May 30, 2019
    Applicant: SHOWA DENKO K.K.
    Inventors: Takanori AOKI, Akira SHIBUYA, Takamitsu KOBAYASHI, Hideo MIYATA, Shinya TSUKAMOTO, Manabu KUWAJIMA, Motoki MURAI
  • Publication number: 20190088634
    Abstract: A semiconductor device according to an embodiment includes a first memory chip having a first front surface and a first back surface and having a first memory circuit provided on the first front surface side; a second memory chip having a second front surface and a second back surface facing the first front surface, having a second memory circuit provided on the second front surface side, and being electrically connected to the first memory chip; and a logic chip having the first memory chip provided between the logic chip and the second memory chip, having a third front surface and a third back surface, having a logic circuit provided on the third front surface side, and being electrically connected to the first memory chip.
    Type: Application
    Filed: March 20, 2018
    Publication date: March 21, 2019
    Applicant: Toshiba Memory Corporation
    Inventors: Satoshi TSUKIYAMA, Yoichiro Kurita, Hideo Aoki, Kazushige Kawasaki
  • Publication number: 20190088601
    Abstract: According to one embodiment, a semiconductor device includes a device region covered with a resin film and a dicing region extending along at least one side of the device region, the dicing region including at least a first lithography mark and a second lithography mark. The resin film includes a first dicing region portion which covers a portion of the dicing region between the first lithography mark and the second lithography mark.
    Type: Application
    Filed: March 1, 2018
    Publication date: March 21, 2019
    Inventors: Satoshi TSUKIYAMA, Hideo AOKI
  • Publication number: 20190088632
    Abstract: According to one embodiment, a semiconductor device of an embodiment includes a substrate, a metal plate having a main portion having a first width in a first direction and a second width in a second direction orthogonal to the first direction, a first semiconductor chip located between the metal plate and the substrate, the first semiconductor chip having a third width in the first direction and a fourth width in the second direction, and a second semiconductor chip located between the first semiconductor chip and the substrate, wherein the first width is smaller than the third width, and the second width is smaller than the fourth width.
    Type: Application
    Filed: March 1, 2018
    Publication date: March 21, 2019
    Inventors: Satoshi TSUKIYAMA, Hideo AOKI, Yoshiaki GOTO
  • Publication number: 20180217875
    Abstract: A data processing system in which application nodes capable of executing a program are provided at sites at a plurality of locations, and storage nodes for storing data are also provided at the plurality of locations, with these locations being coupled to one another via a network, wherein: a first application node stores a program I/O history; a second application node reproduces I/O events on the basis of the I/O history, thereby estimating data processing performance; and the first application node determines, on the basis of the data processing performance estimation, whether or not to transfer the program to the second application node.
    Type: Application
    Filed: February 17, 2016
    Publication date: August 2, 2018
    Inventors: Tadashi TAKEUCHI, Hideo AOKI, Tsuyoshi TANAKA, Yuuya ISODA
  • Patent number: 9997484
    Abstract: A semiconductor device includes a wiring substrate, a first semiconductor element, a second semiconductor element, a bump, a bonding portion, and a resin portion. The second semiconductor element is between the wiring substrate and the first semiconductor element. The bump is between the first and second semiconductor elements and electrically connects the first and second semiconductor elements. The bonding portion is between the first and second semiconductor elements, bonds the first semiconductor element to the second semiconductor element, and has a first elastic modulus. The resin portion has a second elastic modulus higher than the first elastic modulus. The resin portion is between the first and second semiconductor elements. The first semiconductor element is between a second portion of the resin portion and the wiring substrate. A third portion of the resin portion is overlapped with the first and second semiconductor elements.
    Type: Grant
    Filed: August 30, 2016
    Date of Patent: June 12, 2018
    Assignee: TOSHIBA MEMORY CORPORATION
    Inventors: Takeori Maeda, Masatoshi Fukuda, Ryoji Matsushima, Hideo Aoki
  • Publication number: 20170263582
    Abstract: A semiconductor device includes a wiring substrate, a first semiconductor element, a second semiconductor element, a bump, a bonding portion, and a resin portion. The second semiconductor element is between the wiring substrate and the first semiconductor element. The bump is between the first and second semiconductor elements and electrically connects the first and second semiconductor elements. The bonding portion is between the first and second semiconductor elements, bonds the first semiconductor element to the second semiconductor element, and has a first elastic modulus. The resin portion has a second elastic modulus higher than the first elastic modulus. The resin portion is between the first and second semiconductor elements. The first semiconductor element is between a second portion of the resin portion and the wiring substrate. A third portion of the resin portion is overlapped with the first and second semiconductor elements.
    Type: Application
    Filed: August 30, 2016
    Publication date: September 14, 2017
    Inventors: Takeori MAEDA, Masatoshi FUKUDA, Ryoji MATSUSHIMA, Hideo AOKI
  • Publication number: 20170039110
    Abstract: A computer for executing processing through use of a database, the computer comprising: a processor including a cache memory; and a non-volatile memory coupled to the processor, the non-volatile memory having the database constructed thereon. The computer comprises: a database management module configured to execute processing on the database; and a write processing module configured to write data stored in the cache memory into the database. The write processing module writes data that is operated in the transaction processing into the database among data stored in the cache memory, in a case of receiving a commit request for transaction processing that uses the database.
    Type: Application
    Filed: April 23, 2014
    Publication date: February 9, 2017
    Inventors: Tsuyoshi TANAKA, Yuuya ISODA, Atsushi TOMODA, Tomohiro HANAI, Hideo AOKI
  • Publication number: 20160203180
    Abstract: An index tree search method, by a computer, for searching an index tree included in a database provided by the computer which includes processors executing a plurality of threads and a memory, the index tree search method comprising: a first step of allocating, by the computer, search ranges in the index tree to the plurality of threads; a second step of receiving, by the computer, a search key; a third step of selecting, by the computer, a thread corresponding to the received search key; and a fourth step of searching, by the computer, the index tree with the selected thread using the received search key.
    Type: Application
    Filed: October 29, 2014
    Publication date: July 14, 2016
    Inventors: Tomohiro HANAI, Kazutomo USHIJIMA, Tsuyoshi TANAKA, Hideo AOKI, Atsushi TOMODA
  • Publication number: 20160079500
    Abstract: A light emitting device includes a first lead frame having a top surface including a first region and a second region, a first metal layer disposed on the first region of the top surface, a reflector layer in contact with the second region of the top surface, a light emitting element mounted on the first metal layer and electrically connected to the first lead frame, and a transparent resin layer covering the light emitting element and in contact with the first metal layer.
    Type: Application
    Filed: March 1, 2015
    Publication date: March 17, 2016
    Inventors: Hideo AOKI, Kanako SAWADA, Chiaki TAKUBO
  • Patent number: 9202768
    Abstract: According to one embodiment, a semiconductor module has a substrate, two nonvolatile memories disposed on a first surface of the substrate, a controller to control the nonvolatile memories, disposed on the first surface of the substrate and between the two nonvolatile memories, and a plurality of terminals that are electrically connected to the two nonvolatile memories and to the controller, disposed on a second surface of the substrate.
    Type: Grant
    Filed: March 7, 2013
    Date of Patent: December 1, 2015
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Hideo Aoki, Katsuhiko Oyama, Taku Nishiyama, Chiaki Takubo, Katsuya Sakai
  • Patent number: 9142477
    Abstract: According to one embodiment, a semiconductor module includes a substrate, which has a first surface and a second surface opposite to the first surface, a controller device and a memory device formed on the first surface, and a metal plate bonded on the second surface. The metal plate is formed at least at a portion of the second surface corresponding to the controller device so that heat generated at the controller device conducts away from the memory device.
    Type: Grant
    Filed: March 8, 2013
    Date of Patent: September 22, 2015
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Hideo Aoki, Chiaki Takubo