Patents by Inventor Hideo Kato

Hideo Kato has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20020159760
    Abstract: An endless video recording apparatus for recording digital video images in an endless fashion is disclosed.
    Type: Application
    Filed: May 14, 2002
    Publication date: October 31, 2002
    Applicant: FUJITSU LIMITED
    Inventors: Akira Karasudani, Yasuhiko Nakano, Yoshiyuki Okada, Hideo Kato
  • Patent number: 6465818
    Abstract: A memory cell array 1 is divided into two banks BANK 1 and BANK 2 for performing a dual operation. The division into banks is accomplished by dividing main bit lines MBL of the memory cell array 1 into upper and lower parts. On both end portions of the memory cell array 1 in the directions of the bit lines, sense amplifier circuits 2a and 2b connected to the divided parts of main bit lines MBL, respectively, are arranged. By changing the wiring design of the main bit lines MBL, the capacities of the banks BANK 1 and BANK 2 are changed.
    Type: Grant
    Filed: January 5, 2000
    Date of Patent: October 15, 2002
    Assignee: Kabushiki Kaisha Toshiba
    Inventor: Hideo Kato
  • Publication number: 20020146610
    Abstract: A fuel cell which can self-heat in a short time, in which no reaction gas is necessary for combustion, thereby improving the starting performance at low temperatures. The fuel cell comprises a cell structure in which an anode and a cathode are provided on either side of a solid polymer electrolyte membrane. This cell structure has a power generation plane and at least a part of the generation plane is defined as a local generation area so as to locally generate power. The fuel cell may include a pair of separators between which the cell structure is placed, and a reaction gas passage may be formed between the cell structure and each separator. One of a system for supplying a reaction gas to only a part of the reaction gas passage, and a system for supplying a reaction gas to the entire reaction gas passage is switchably selected.
    Type: Application
    Filed: April 4, 2002
    Publication date: October 10, 2002
    Applicant: HONDA GIKEN KOGYO KABUSHIKI KAISHA
    Inventors: Katsumi Hayashi, Hideo Kato, Yosuke Fujii, Yasushi Kanai
  • Publication number: 20020142197
    Abstract: A system and method for draining remaining water in a gas passage of a fuel cell, which has a simple structure and the remaining can be efficiently and reliably drained outside. Water which remains in a gas passage of the fuel cell is first drained by increasing the flow rate of the reaction gas while the operation of the fuel cell is stopped. The remaining water which has not been drained is then drained by increasing the pressure of the reaction gas and then decreasing the increased pressure. The increase and decrease operation of the pressure of the reaction gas is started after the increase of the flow rate of the reaction gas is started. Typically, the increase of the pressure of the reaction gas is started when a predetermined time has elapsed after the increase of the flow rate of the reaction gas is started.
    Type: Application
    Filed: March 29, 2002
    Publication date: October 3, 2002
    Applicant: HONDA GIKEN KOGYO KABUSHIKI KAISHA
    Inventors: Hideo Kato, Katsumi Hayashi, Minoru Uoshima
  • Publication number: 20020130206
    Abstract: A fuel injector including a tubular casing having an axial fuel passage. Disposed within the fuel passage are a valve seat element, a core cylinder, and a valve element axially moveably disposed therebetween and opposed to the core cylinder with an axial air gap. An electromagnetic actuator cooperates with the casing, the valve element and the core cylinder to form a magnetic field forcing the valve element to the open position against a spring between the valve element and the core cylinder upon being energized. The casing includes a reluctance portion producing an increased magnetic reluctance and allowing the magnetic field to extend to the valve element and the core cylinder through the air gap. The reluctance portion has a reduced radial thickness and an axial length extending over the air gap.
    Type: Application
    Filed: March 15, 2002
    Publication date: September 19, 2002
    Applicant: UNISIA JECS CORPORATION
    Inventors: Nobuaki Kobayashi, Hideo Kato, Hiroshi Okada
  • Patent number: 6452837
    Abstract: This invention discloses a memory cell threshold voltage shift method effective for the erase or write sequence of a nonvolatile semiconductor memory. First, the threshold voltages VTH of a plurality of memory cells are shifted at once to a range whose upper limit is set to an erase verify voltage VEV. After this, the lower limit of the threshold voltages VTH shifted at once to the range is shifted to a first overerase verify voltage VOEV1 close to the erase verify voltage VEV. Then, the lower limit of the threshold voltages VTH shifted to the first overerase verify voltage VOEV1 to a second overerase verify voltage VOEV2 closer to the erase verify voltage VEV.
    Type: Grant
    Filed: December 26, 2000
    Date of Patent: September 17, 2002
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Seiichi Mori, Hiroyuki Sasaki, Hideo Kato, Hidetoshi Saito
  • Patent number: 6446503
    Abstract: A flowmeter capable of measuring an accurate quantity of flow over a wide range of the quantity of flow. A measurement zone (15) for smaller quantity of flow and a measurement zone (16) for larger quantity of flow are determined inside a flow path (13) of a pipe (10). Regulating strainers (14) for regulating the flow of a gas (20) are disposed inside the measurement zone (15) for smaller quantity of flow by dividing the flow path (13) into a plurality of narrower flow paths (14A). A mean flow velocity of the gas (20) flowing through each of a plurality of narrower flow paths (14A) becomes substantially equal. A part of the gas (20) reaches nozzles (22a, 22b) erected across flow velocity sensors (15a, 15b) for smaller quantity of flow and is accelerated by the operation of these nozzles.
    Type: Grant
    Filed: May 25, 2000
    Date of Patent: September 10, 2002
    Assignee: Tokyo Gas Co., Ltd.
    Inventors: Kazumitsu Nukui, Hideo Kato, Ken Tashiro, Mitunori Komaki, Masahiko Matushita, Kazuhiro Yamada
  • Patent number: 6407951
    Abstract: A pulse generator circuit provides a capacitor, a constant current source circuit for charging the capacitor at a constant current in response to an input signal, and a differential amplifier circuit for comparing a charge voltage in the capacitor with a predetermined reference voltage Vref, thereby outputting a pulse signal.
    Type: Grant
    Filed: June 25, 2001
    Date of Patent: June 18, 2002
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Naoto Tomita, Hideo Kato, Takafumi Ikeda
  • Patent number: 6377502
    Abstract: A memory cell array 1 has the arrangement of a plurality of cores, each of which comprises one block or a set of a plurality of blocks, each block defining a range of memory cells serving as a unit of data erase. A core selecting part for selecting an optional number of cores to write/erase data is provided for writing data in memory cells in cores selected on the basis of a write command and for erasing data from selected blocks in cores selected on the basis of an erase command. Thus, there is realized a free core system capable of reading data out from memory cells in unselected cores while writing/erasing data in cores selected by the core selecting part.
    Type: Grant
    Filed: May 3, 2000
    Date of Patent: April 23, 2002
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Yasuhiko Honda, Hideo Kato, Hidetoshi Saito, Masao Kuriyama, Tokumasa Hara, Takafumi Ikeda, Tatsuya Hiramatsu
  • Publication number: 20020041752
    Abstract: A video recording and reproducing apparatus for simultaneously displaying a plurality of image contents recorded at given time points or images at a plurality of given portions within the same image contents is disclosed. A plurality of images read from a randomly accessible data storage unit for storing the images recorded by an image recording unit are synthesized into a single screen by an image synthesizer. An information processing unit reads from the image recording unit a plurality of image contents recorded at different time points or a group of images recorded at a plurality of different time points in a given one image content and causes the image synthesizer to display, by synthesizing the image contents or the images, as the case may be, on a single screen.
    Type: Application
    Filed: March 26, 2001
    Publication date: April 11, 2002
    Inventors: Yukihiro Abiko, Yoshiyuki Okada, Hideo Kato
  • Publication number: 20020036717
    Abstract: An information collecting unit reads encoded moving image data from an information storing unit, decodes part of the moving image data, extracts the number and the magnitudes of motion vectors, the square measure of a region having a low correlation with a preceding/succeeding frame, etc. for each frame, and outputs these items of scene change information to an evaluation function calculating unit. The evaluation function calculating unit calculates the value of a predetermined evaluation function based on the scene change information, and outputs the calculated value to a scene change determining unit. The scene change determining unit determines a frame of a scene change by making a comparison between the calculated value and a threshold value. A scene change information storing unit stores the scene change information used for the determination.
    Type: Application
    Filed: November 29, 2001
    Publication date: March 28, 2002
    Applicant: FUJITSU LIMITED
    Inventors: Yukihiro Abiko, Tetsuo Koezuka, Hideo Kato
  • Publication number: 20020035024
    Abstract: A monolayer or multilayer film has a single layer or multiple layers of silica containing fluorine. An optical element has the forgoing film laid on a surface of a substrate. A concentration of the fluorine in the layer or layers of silica is not less than 0.1 mol % (preferably, not less than 1 mol %) nor more than 10 mol %.
    Type: Application
    Filed: July 24, 2001
    Publication date: March 21, 2002
    Inventor: Hideo Kato
  • Publication number: 20020031038
    Abstract: A memory cell array 1 has the arrangement of a plurality of cores, each of which comprises one block or a set of a plurality of blocks, each block defining a range of memory cells serving as a unit of data erase. A core selecting part for selecting an optional number of cores to write/erase data is provided for writing data in memory cells in cores selected on the basis of a write command and for erasing data from selected blocks in cores selected on the basis of an erase command. Thus, there is realized a free core system capable of reading data out from memory cells in unselected cores while writing/erasing data in cores selected by the core selecting part.
    Type: Application
    Filed: November 16, 2001
    Publication date: March 14, 2002
    Applicant: Kabushiki Kaisha Toshiba
    Inventors: Yasuhiko Honda, Hideo Kato, Hidetoshi Saito, Masao Kuriyama, Tokumasa Hara, Takafumi Ikeda, Tatsuya Hiramatsu
  • Publication number: 20020030890
    Abstract: Disclosed is a diffractive optical element which includes a substrate made of a fluoride compound, and a diffraction grating formed on the substrate by use of an oxide compound such as a fluoride compound or a metal oxide, for example.
    Type: Application
    Filed: December 2, 1998
    Publication date: March 14, 2002
    Inventors: HIDEO KATO, HIROSHI MAEHARA, KENJI TAMAMORI
  • Publication number: 20020027301
    Abstract: In a method for manufacture of an optical element, a thin film is formed on a surface, such as a grating surface, an aspherical surface or a spherical surface, formed on a mold. Then, a substrate is bonded to the thin film. Subsequently, the thin film and the substrate are separated from the mold.
    Type: Application
    Filed: June 4, 1999
    Publication date: March 7, 2002
    Inventors: HIDEO KATO, HIROSHI MAEHARA, MAKOTO OGUSU
  • Publication number: 20020012282
    Abstract: Redundant cell arrays 201 of a plurality of columns are provided for replacing a defective bit line of a memory cell array 101. Each of the redundant cell arrays 201 is provided with a redundant sense amplifier circuit 105 separately from a sense amplifier circuit 103 of the memory cell array 101. A defective address storing circuit 108 stores a defective address of the memory cell array 101, an input/output terminal, to and from which data corresponding to the defective address are to be inputted and outputted, and a column set number of the redundant cell array which is to be replaced in accordance with the input/output terminal. An address comparator circuit 109 detects the coincidence of an input address with the defective address. A switch circuit 112 is controlled by the coincidence detection output to switch one corresponding to the defective address of a sense amplifier circuit to one selected by the set number in the redundant sense amplifier circuit, to connect it to a data input/output buffer 113.
    Type: Application
    Filed: September 27, 2001
    Publication date: January 31, 2002
    Inventors: Hidetoshi Saito, Masao Kuriyama, Yasuhiko Honda, Hideo Kato
  • Patent number: 6337161
    Abstract: A mask structure to be used for X-ray exposure or the like in manufacturing semiconductor devices prevents contaminants from adhering and accumulating on the surface of a mask, thereby extending the life of the mask. In this mask structure, titanium oxide films are formed on front and back pellicles that protect a mask, composed of a support film and an X-ray absorber, from dust or the like. Titanium oxide decomposes contaminants by functioning as a photocatalyst, and prevents the adhesion and accumulation of contaminants by an antistatic function based on photoconductivity. When a titanium oxide film is formed on the surface of the mask itself, it is preferable that the film be formed outside the exposure area or the like.
    Type: Grant
    Filed: September 28, 1998
    Date of Patent: January 8, 2002
    Assignee: Canon Kabushiki Kaisha
    Inventors: Keiko Chiba, Hideo Kato, Hiroshi Maehara
  • Publication number: 20010047267
    Abstract: A frame, which is the data unit, is extracted without decoding MPEG audio data. Then, a scale factor included in the frame is extracted and an evaluation function is calculated based on the scale factor. If the value of the evaluation function is larger than a prescribed threshold value, the speed of the frame is converted. If the value of the evaluation function is smaller than the prescribed threshold value, the frame is judged to be a frame in a silent section and neglected. The speed conversion is made by thinning out frames or repeating the same frame as many times as required according to prescribed rules.
    Type: Application
    Filed: February 21, 2001
    Publication date: November 29, 2001
    Inventors: Yukihiro Abiko, Hideo Kato, Tetsuo Koezuka
  • Publication number: 20010043320
    Abstract: In a projection aligner for illuminating a pattern on a mask with a luminous flux from a light source through an illumination system and projecting the pattern onto a wafer with a projection optical system, a titanium oxide (TiO2) film is provided on the surface of at least one unit constituting the projection aligner. Thus, contamination of the projection aligner can be prevented.
    Type: Application
    Filed: September 24, 1998
    Publication date: November 22, 2001
    Inventors: HIDEO KATO, HIROSHI MAEHARA
  • Patent number: 6320800
    Abstract: Redundant cell arrays 201 of a plurality of columns are provided for replacing a defective bit line of a memory cell array 101. Each of the redundant cell arrays 201 is provided with a redundant sense amplifier circuit 105 separately from a sense amplifier circuit 103 of the memory cell array 101. A defective address storing circuit 108 stores a defective address of the memory cell array 101, an input/output terminal, to and from which data corresponding to the defective address are. to be inputted and outputted, and a column set number of the redundant cell array which is to be replaced in accordance with the input/output terminal. An address comparator circuit 109 detects the coincidence of an input address with the defective address. A switch circuit 112 is controlled by the coincidence detection output to switch one corresponding to the defective address of a sense amplifier circuit to one selected by the set number in the redundant sense amplifier circuit, to connect it to a data input/output buffer 113.
    Type: Grant
    Filed: June 1, 2000
    Date of Patent: November 20, 2001
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Hidetoshi Saito, Masao Kuriyama, Yasuhiko Honda, Hideo Kato