Abstract: A semiconductor memory device is provided with a determination circuit and an address adder. The determination circuit determines whether a read start address selects upper-address banks B5-B8 or lower-address banks B1-B4. When the determination circuit determines that the lower-address banks are selected, the address adder increments a column address by 1. From the upper-address banks, data are read from the columns corresponding to the read start address. From the lower-address banks, data are read from the columns that are next to the columns corresponding to the read start address. Even when the upper-address banks are designated by the read start address, the data output from the lower-address banks corresponds to the next columns. Since there is no busy time during data output, successive access is enabled and the access cycle time can be as short as possible.

Abstract: Dihydrate crystal of 3-[4-(8-fluoro-5,11-dihydrobenz[b]oxepino[4,3-b]pyridin-11-ylidene)piperid ino]propionic acid providing high-intensity diffraction peaks at diffraction angles (2.theta.) of about 4.2.degree., 17.0.degree., and 21.3.degree. in a powder X-ray diffraction profile; a medicament comprising the dihydrate crystal; and a process for preparing the dihydrate crystal which comprises the steps of treating a crystalline substance containing an anhydride crystal of the above compound with hydrous acetone, and subjecting the product to drying treatment and moistening treatment.

Abstract: Aqueous solution, including at least one of optically active (-)-(R)-.alpha.-((tert-butylamino)methyl)-2-chloro-4-hydroxybenzyl alcohol represented by the following formula: ##STR1## and pharmacologically acceptable salt thereof. The aqueous solution also includes at least one photostabilizer selected from the group consisting of saccharide, sugar alcohol, and polyalcohol. A content of the at least one of optically active (-)-(R)-.alpha.-((tert-butylamino)methyl)-2-chloro-4-hydroxybenzyl alcohol and pharmacologically acceptable salt thereof is 0.01 to 10% (w/v) based on a volume of the aqueous solution. A content of the at least one photostabilizer is 1 to 50% (w/v) based on the volume of the aqueous solution. The content of the at least one photostabilizer is at least 10% (w/w) based on a total weight of the at least one of optically active (-)-(R)-.alpha.-((tert-butylamino)methyl)-2-chloro-4-hydroxybenzyl alcohol and pharmacologically acceptable salt thereof. Method of making a stabilized aqueous solution.

Abstract: An address storing PROM cell array formed of a PROM having one polysilicon layer stores an address of a defective cell contained in a mask ROM used as a main memory cell array. A data storing PROM cell array formed of a PROM having one polysilicon layer stores data to be written into the defective cell. When an input address hits the address stored in the address storing PROM cell array, an address detecting circuit reads out data stored in the data storing PROM cell array instead of data of the mask ROM. When data in an address corresponding to the defective cell of the mask ROM is rewritten twice or more, a priority setting circuit permits newest data to be preferentially read out.

Abstract: For copy guard, an ROM comprises an address data determining circuit, an address sequence monitoring circuit, an error address data generating circuit, and an output selection circuit. The address sequence monitoring circuit monitors the addresses stored in the address data determining circuit and input addresses to determine whether or not the input addresses are in a predetermined sequence of the addresses in the address data determining circuit. The output selection circuit outputs data read from said memory cell array when the address sequence monitoring circuit determines that the address sequence of the input addresses coincides with the predetermined sequence of the addresses stored in the address data determining circuit and outputs error data generated by the error data generating circuit when a determination is made that the sequence of the input addresses does not coincide with the predetermined sequence.

Abstract: The time required for the program verify and erase verify operations can be shortened. The change of threshold values of memory cells can be suppressed even if the write and erase operations are executed repetitively. After the program and erase operations, whether the operations were properly executed can be judged simultaneously for all bit lines basing upon a change, after the pre-charge, of the potential at each bit line, without changing the column address. In the data rewrite oepration, the rewrite operation is not effected for a memory cell with the data once properly written, by changing the data in the data register.

Abstract: X-ray or vacuum-ultraviolet-ray transmissive mask membrane is constituted by a laminated film. The laminated film is obtained by continuously forming a SiCN film on one of or each of sides of a SiC film. Thereby, a membrane, which is superior in physical or mechanical strength and in surface conditions and optical transmittance, is provided. Moreover, there is provided a mask using the membrane.

Abstract: 5-Amino-7-((3S,4S)-3-amino-4-methyl (or ethyl)-1-pyrrolidinyl)-1-cyclopropyl-6-fluoro-1,4-dihydro-8-methyl-4-oxoqu inoline-3-carboxylic acid or a pharmacologically acceptable salt thereof represented by the following formula wherein asymmetric carbon atoms marked with asterisks are in the S-configurations and R.sup.1 represents methyl group or ethyl group; and an antibacterial agent comprising said compound as an active ingredient.

Abstract: A semiconductor memory including memory cells, word lines, bit lines, a row decoder, column decoder, a voltage-changing circuit, a sense amplifier, and an output circuit. Each memory cell stores multi-level data. The row decoder selects one of the word lines in accordance with an address signal. The voltage-changing circuit generates different voltages, which are applied to the row decoder. The different voltages are sequentially applied from the voltage-changing circuit to the word line selected by the row decoder. The column decoder selects a bit line every time the potential of the word line changes. The sense amplifier detects the data read from the memory cell onto the bit line every time the potential of the word line changes. The output circuit converts the data to code data.

Abstract: The time required for the program verify and erase verify operations can be shortened. The change of threshold values of memory cells can be suppressed even if the write and erase operations are executed repetitively. After the program and erase operations, whether the operations were properly executed can be judged simultaneously for all bit lines basing upon a change, after the pre-charge, of the potential at each bit line, without changing the column address. In the data rewrite operation, the rewrite operation is not effected for a memory cell with the data once properly written, by changing the data in the data register.

Abstract: The time required for the program verify and erase verify operations can be shortened. The change of threshold values of memory cells can be suppressed even if the write and erase operations are executed repetitively. After the program and erase operations, whether the operations were properly executed can be judged simultaneously for all bit lines basing upon a change, after the pre-charge, of the potential at each bit line, without changing the column address. In the data rewrite oepration, the rewrite operation is not effected for a memory cell with the data once properly written, by changing the data in the data register.

Abstract: The present invention provides an X-ray mask structure having an X-ray transmissive membrane, an X-ray absorber held on an X-ray transmissive membrane, and a holding frame that holds the X-ray transmissive membrane, and the X-ray transmissive membrane has a layer of aluminum nitride, and the X-ray absorber has a heavy metal nitride.

Abstract: A redundancy memory cell array is arranged at an end of a main memory cell array in the column direction. Common bit lines and common column lines are arranged on the main memory cell array and the redundancy memory cell array. A disconnection circuit is arranged between the main memory cell array and the redundancy memory cell array for connecting or disconnecting bit lines or column lines. A column selection switch is arranged at an end of the redundancy memory cell array. A redundancy circuit disconnects bit lines or column lines by means of a disconnection circuit when an address signal specifies a defective address.

Abstract: The present invention makes it possible to remove an organic solvent in an electrode paste and fix an ion-conductive component while maintaining a desired moisture content. Specifically, a sheet of carbon paper applied with the electrode paste is horizontally held in a tank which comprises a drying apparatus. Water in the tank is brought to the boil by the aid of a first heater. Accordingly, the organic solvent in the electrode paste is removed, and the ion-conductive component is fixed, while forcedly humidifying the carbon paper and the electrode paste with steam.

Abstract: A fuel cell stack having unit cells and separators, in which each unit cell comprises a solid polymer electrolyte membrane having a pair of electrode catalysts attached on both surfaces, and a pair of collectors, each made of a rigid body, being in contact with respective electrode catalysts, and each of the separators comprises a pair of pressure generating plates defining therebetween a pressure chamber to which a pressurized fluid is introduced, the pressure generating plates being deformed by the pressurized fluid and pressed against the adjacent respective collectors.

Abstract: A mask suitably usable in X-ray lithography has a membrane and a radiation absorbing material pattern formed on the membrane, wherein the radiation absorbing material pattern contains an alloy including tungsten (W) and molybdenum (Mo), the proportion of the molybdenum content to the alloy being in a range of 0.1-50 wt %, the alloy having crystal precedence orientation of {110}. In one preferred form, the absorbing material pattern is provided on an amolphous metal layer formed on the mask membrane.

Abstract: When an erase voltage is applied to the sources of data erasable and rewritable memory cells each having a floating gate, the erasure characteristics of the memory cells can be improved by controlling the rise time of the erase voltage or by increasing the erase voltage stepwise. In test mode, no row lines are selected by a row decoder and further the sources of the respective memory cells are set to ground level. Under these conditions, in case there exists an overerased memory cell, this cell is turned on due to depletion, so that it is possible to detect the presence of the overerased memory cell on the basis of change in potential of the column line connected to this turned on memory cell. A differential amplifier is used to detect the change in potential of the column line.

Abstract: The time required for the program verify and erase verify operations can be shortened. The change of threshold values of memory cells can be suppressed even if the write and erase operations are executed repetitively. After the program and erase operations, whether the operations were properly executed can be judged simultaneously for all bit lines basing upon a change, after the pre-charge, of the potential at each bit line, without changing the column address. In the data rewrite operation, the rewrite operation is not effected for a memory cell with the data once properly written, by changing the data in the data register.

Abstract: When an erase voltage is applied to the sources of data erasable and rewritable memory cells each having a floating gate, the erasure characteristics of the memory cells can be improved by controlling the rise time of the erase voltage or by increasing the erase voltage stepwise. In test mode, no row lines are selected by a row decoder and further the sources of the respective memory cells are set to ground level. Under these conditions, in case there exists an overerased memory cell, this cell is turned on due to depletion, so that it is possible to detect the presence of the overerased memory cell on the basis of change in potential of the column line connected to this turned on memory cell. A differential amplifier is used to detect the change in potential of the column line.

Abstract: The time required for the program verify and erase verify operations can be shortened. The change of threshold values of memory cells can be suppressed even if the write and erase operations are executed repetitively. After the program and erase operations, whether the operations were properly executed can be judged simultaneously for all bit lines basing upon a change, after the pre-charge, of the potential at each bit line, without changing the column address. In the data rewrite operation, the rewrite operation is not effected for a memory cell with the data once properly written, by changing the data in the data register.