Patents by Inventor Hideo Nakamura

Hideo Nakamura has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 4920518
    Abstract: A semiconductor integrated circuit with a non-volatile memory has a plurality of nonvolatile data memory elements arranged in a matrix and a means for reading data from the memory elements in accordance with an address signal which specifies a position in the matrix. A protecting data memory element for storing at least one-bit protection data is disposed in the matrix. Whether operations such as programming (i.e., writing), erasing or reading with respect to the data memory elements will be allowed or inhibited is determined in accordance with the contents of the protecting data memory element. In other words, data security in an arbitrary area of the matrix can be accomplished based on the content of the protecting data memory element.
    Type: Grant
    Filed: March 28, 1989
    Date of Patent: April 24, 1990
    Assignee: Hitachi, Ltd.
    Inventors: Hideo Nakamura, Terumi Sawase
  • Patent number: 4900801
    Abstract: A novel epoxy compound having a chemical structure in which an aromatic ring having a glycidyl raedical attached thereto has a tertiary alkyl radical at its ortho or meta-position. An epoxy resin composition comprising the epoxy compound, a curing agent, and a curing accelerator which cures into a product having a low dielectric constant.
    Type: Grant
    Filed: May 27, 1988
    Date of Patent: February 13, 1990
    Assignee: Mitsui Petrochemical Industries, Ltd.
    Inventors: Toshimasa Takata, Hideo Nakamura
  • Patent number: 4821753
    Abstract: A machine for cleaning a coupler consisting substantially of a male coupler element and a female coupler element, especially mating surfaces related parts thereof is proposed for avoiding fouling thereof in advance of practical coupling of both the elements. The machine is provided with a ring tube type cleaner unit suspended from a detachable top cover of a cleaning box. The inside space of the ring tube constitutes a liquid chamber supplied with cleaning water from a source and delivers from a number of nozzle openings formed through the inner wall of the ring tube, for delivery of sweep water jets in the center of the ring tube, where the tip and to-be-coupled ends of both the coupler elements are positioned at a small mutual distance. After cleaning jobs, either one of the male and female coupler elements is advanced to mating position for establishing a tight contact with the other one of the coupler elements for avoiding otherwise frequently encountered, disadvantageous fouling.
    Type: Grant
    Filed: September 30, 1987
    Date of Patent: April 18, 1989
    Assignees: Sumitomo Chemical Company Limited, Sumitomo Chemical Engineering Co., Ltd., Nippon Valqua Kogyo Kabushiki Kaisha
    Inventors: Hideo Nakamura, Toshiharu Miura, Kazuhiro Kikkawa
  • Patent number: 4821240
    Abstract: A semiconductor integrated circuit with a nonvolatile memory has a plurality of nonvolatile data memory elements arranged in a matrix and a means for reading data from the memory elements in accordance with an address signal which specifies a position in the matrix. A protecting data memory element for storing at least one-bit protection data is disposed in the matrix. Whether operations such as a programming (i.e., writing), erasing or reading with respect to the data memory elements will be allowed or inhibited is determined in accordance with the contents of the protecting data memory element. In other words, data security in an arbitrary area of the matrix can be accomplished based on the content of the protecting data memory element.
    Type: Grant
    Filed: March 29, 1988
    Date of Patent: April 11, 1989
    Assignee: Hitachi, Ltd.
    Inventors: Hideo Nakamura, Terumi Sawase
  • Patent number: 4778796
    Abstract: Compounds of the formula: ##STR1## wherein X is alkylene or --(CR.sub.6 .dbd.CR.sub.7).sub.r -- wherein R.sub.6 is H, alkyl or phenyl, R.sub.7 is H, alkyl, cyano or phenyl, and r is 1 or 2; A is alkylene or alkylene interrupted by at least one double bond; R.sub.1 is H, halogen, alkyl, alkoxy, alkylthio, cycloalkyloxy, cycloalkylthio, alkoxycarbonyl, carboxy, phenyl, phenoxy, phenylthio, 3-pyridyloxy or 3-pyridylthio; R.sub.2 is H, hydroxy, alkanoyloxy or alkoxycarbonyloxy, or adjacent R.sub.1 and R.sub.2 may combine to form tetramethylene or --CH.sub.2 OCR.sub.8 R.sub.9 O-- (R.sub.8 and R.sub.9 are alkyl); R.sub.3 is H, alkyl or hydroxyalkyl; R.sub.4 is H or alkyl; R.sub.5 is phenyl, heteroaryl or --(CH.sub.2).sub.m --CHR.sub.10 R.sub.11 (R.sub.10 is H or phenyl, R.sub.11 is phenyl or pyridyl and m is 0 to 2); p is 0 or 1; and q is 2 or 3; the phenyl group or moiety being optionally substituted, and a salt thereof, process for the preparation thereof, and pharmaceutical composition containing the same.
    Type: Grant
    Filed: July 11, 1986
    Date of Patent: October 18, 1988
    Assignee: Dainippon Pharmaceutical Co., Ltd.
    Inventors: Hitoshi Uno, Yoshinori Nishikawa, Tokuhiko Shindo, Hideo Nakamura, Katsumi Ishii
  • Patent number: 4744062
    Abstract: A semiconductor integrated circuit with a nonvolatile memory has a plurality of nonvolatile data memory elements arranged in a matrix and a means for reading data from the memory elements in accordance with an address signal which specifies a position in the matrix. A protecting data memory element for storing at least one-bit protection data is disposed in the matrix. Whether operations such as programming (i.e., writing), erasing or reading with respect to the data memory elements will be allowed or inhibited is determined in accordance with the contents of the protecting data memory element. In other words, data security in an arbitrary area of the matrix can be accomplished based on the content of the protecting data memory element.
    Type: Grant
    Filed: April 23, 1986
    Date of Patent: May 10, 1988
    Assignee: Hitachi, Ltd.
    Inventors: Hideo Nakamura, Terumi Sawase
  • Patent number: 4740242
    Abstract: A method and an apparatus, wherein heat can be effectively transferred to molten metal contained in a reaction vessel. The pressure of the gaseous atmosphere within the vessel is maintained higher than atmospheric pressure. Oxygen gas is blown to a layer of molten slag contained in the vessel through tuyeres set in the reaction vessel, thereby to achieve post-combustion therein. The pressure in the vessel is controlled within the range of 2.0 to 5.0 kg/cm.sup.2 by a pressure regulator.
    Type: Grant
    Filed: December 11, 1986
    Date of Patent: April 26, 1988
    Assignee: Nippon Kokan Kabushiki Kaisha
    Inventors: Hideo Nakamura, Kenji Takahashi, Akichika Ozeki, Shunichi Sugiyama, Masahiro Abe, Takanori Anzai
  • Patent number: 4716522
    Abstract: A microcomputer system has a peripheral storage control equipped with both a circuit which is responsive to a transfer command received from an MPU to set in a counter a transfer start address, which is designated subsequent to that command. The counter to supply an address for a buffer to control transfer of data from the output of the buffer to a common bus connected between the MPU and a RAM. A circuit is provided for controlling the aforementioned counter to count up in response to a transfer acknowledge signal which is subsequently received from a direct memory access control.
    Type: Grant
    Filed: March 10, 1983
    Date of Patent: December 29, 1987
    Assignee: Hitachi, Ltd.
    Inventors: Tsuneo Funabashi, Kazuhiko Iwasaki, Hideo Nakamura
  • Patent number: 4707718
    Abstract: A read-only memory which features a high operation speed and a high degree of integration. A first layer works as ground lines and word lines, and a second layer works as data lines. The word lines and the data lines are arranged linearly to reduce parasitic capacitance and parasitic resistance, and hence to achieve high-speed operation. The invention is adapted where data of large quantities are to be treated, without effecting the rewriting.
    Type: Grant
    Filed: July 30, 1984
    Date of Patent: November 17, 1987
    Assignee: Hitachi, Ltd.
    Inventors: Yoshio Sakai, Ryo Nagai, Shuichi Yamamoto, Hideo Nakamura, Kouki Noguchi
  • Patent number: 4701884
    Abstract: A semiconductor memory device is proposed wherein at least an array comprising a plurality of memory cells each having at least one capacity, a select mechanism for specifying the position of each memory cell, data lines connected to said memory cells for transmitting the data and a data writing and a data reading mechanisms are provided.
    Type: Grant
    Filed: August 14, 1986
    Date of Patent: October 20, 1987
    Assignee: Hitachi, Ltd.
    Inventors: Masakazu Aoki, Masashi Horiguchi, Yoshinobu Nakagome, Shinichi Ikenaga, Katsuhiro Shimohigashi, Toshiaki Masuhara, Kiyoo Itoh, Hideo Nakamura, Osamu Minato
  • Patent number: 4596600
    Abstract: A steel-making process in a converter, which includes using a carbon monoxide gas as an agitating gas supplied from a position lower than molten metal bath level.
    Type: Grant
    Filed: August 30, 1985
    Date of Patent: June 24, 1986
    Assignee: Kawasaki Steel Corporation
    Inventors: Tetsuya Fujii, Toshikazu Sakuraya, Hideo Nakamura, Yasuhiro Habu, Takuo Imai
  • Patent number: 4592778
    Abstract: A process for producing an extremely low carbon steel in a top- and bottom-blown converter. The process is characterized in top-blowing a mixed gas of oxygen gas and an inert gas onto a molten steel in the top- and bottom-blown converter. The mixed gas is blown through a top-blowing lance at the final decarburization stage, while a gas (selected from a group consisting of an inert gas, oxygen gas and a mixture of oxygen and an inert gas) is bottom-blown into the molten steel in the converter.
    Type: Grant
    Filed: June 18, 1985
    Date of Patent: June 3, 1986
    Assignee: Kawasaki Steel Company
    Inventors: Tetsuya Fujii, Nobuo Harada, Shuji Takeuchi, Yoshiei Kato, Hideo Nakamura, Toshikazu Sakuraya, Yasuhiro Habu
  • Patent number: 4582944
    Abstract: A process for producing a hydroxydiphenyl ether, which comprises reacting at least one hydroquinone compound with itself or with a monohydric phenol compound in the presence of a catalyst composed essentially of a synthetic mica in which at least 10 mole % of cation-exchangeable interlayer cations are made up of a metal ion other than alkali metal ions, and/or a proton.
    Type: Grant
    Filed: May 3, 1984
    Date of Patent: April 15, 1986
    Assignee: Mitsui Petrochemical Industries, Ltd.
    Inventors: Katsuo Taniguchi, Hideo Nakamura, Terunori Fujita
  • Patent number: RE32140
    Abstract: An electronic engine control apparatus in which the timing of the ignition and the fuel injection are calculated from a negative pressure in the intake manifold of the engine or the flow rate of suction air and the rotational speed of the engine. A reference register group is constituted of registers for storing the result of the calculation while an instantaneous register group is made up of registers for storing the instantaneous states of actuators. One of the registers of the reference register group and one of the registers of the instantaneous register group are selected according to a stage timing signal so that the contents of the two registers selected are compared with each other.
    Type: Grant
    Filed: June 30, 1983
    Date of Patent: May 6, 1986
    Assignee: Hitachi, Ltd.
    Inventors: Hiroastu Tokuda, Shigeki Morinaga, Hideo Nakamura
  • Patent number: RE32163
    Abstract: An electronic control apparatus includes a digital processor which receives data from sensors indicating conditions of the engine and supplies output control data for operating various actuators which control the engine operation. The interfacing of data between the sensors, the digital processor and the actuators is effected through a set of registers and a controlled incrementing device. The set of registers includes a plurality of reference registers which store engine control data supplied from the digital processor. Another set of registers store respective sets of codes the values of which are sequentially and selectively incremented in accordance with a prescribed timing signal pattern during the rotation of the engine crankshaft.
    Type: Grant
    Filed: July 7, 1983
    Date of Patent: May 27, 1986
    Assignee: Hitachi, Ltd.
    Inventors: Hiroastu Tokuda, Shigeki Morinaga, Hideo Nakamura
  • Patent number: D284209
    Type: Grant
    Filed: January 6, 1983
    Date of Patent: June 10, 1986
    Assignee: Daiwa Seiko, Inc.
    Inventors: Shinichi Iwama, Hideo Nakamura
  • Patent number: D284496
    Type: Grant
    Filed: December 30, 1983
    Date of Patent: July 1, 1986
    Assignee: Daiwa Seiko, Inc.
    Inventors: Kyoichi Kaneko, Hideo Nakamura
  • Patent number: D290635
    Type: Grant
    Filed: November 28, 1984
    Date of Patent: June 30, 1987
    Assignee: Daiwa Seiko, Inc.
    Inventor: Hideo Nakamura
  • Patent number: D291473
    Type: Grant
    Filed: November 28, 1984
    Date of Patent: August 18, 1987
    Assignee: Daiwa Seiko, Inc.
    Inventor: Hideo Nakamura
  • Patent number: D294726
    Type: Grant
    Filed: August 5, 1985
    Date of Patent: March 15, 1988
    Assignee: Daiwa Seiko, Inc.
    Inventor: Hideo Nakamura