Patents by Inventor Hideo Yamanaka

Hideo Yamanaka has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7521335
    Abstract: A method for producing an ultra-thin semiconductor chip and an ultra-thin back-illuminated solid-state image pickup device utilizing a semiconductor layer formed on a support substrate via an insulating layer to improve separation performance of a semiconductor layer from a support substrate and thereby improve the productivity and quality. The method uses two porous peeling layers on opposite sides of a substrate to produce an ultra-thin substrate.
    Type: Grant
    Filed: October 6, 2005
    Date of Patent: April 21, 2009
    Assignee: Sony Corporation
    Inventor: Hideo Yamanaka
  • Patent number: 7294299
    Abstract: A granulating die B is provided with a resin discharge surface 5a to which a flow of water is contacted; and a plurality of nozzles 8 which communicate to a cylinder of an extruder are provided in this resin discharge surface 5a. Upon the resin discharge surface 5a, these nozzles 8 are not formed in at least one of its regions P which are in the direction of inflow of the flow of water and in the direction of outflow of the flow of water, and its regions R which are in directions orthogonal to this direction of inflow of said flow of water and this direction of outflow of said flow of water, but are only formed in the other regions Q thereof.
    Type: Grant
    Filed: March 11, 2004
    Date of Patent: November 13, 2007
    Assignee: Sekisui Plastics Co., Ltd.
    Inventors: Hideo Yamanaka, Shigeru Takeuchi
  • Patent number: 7276429
    Abstract: A method for producing an ultra-thin semiconductor chip and an ultra-thin back-illuminated solid-state image pickup device utilizing a semiconductor layer formed on a support substrate via an insulating layer to improve separation performance of a semiconductor layer from a support substrate and thereby improve the productivity and quality. The method uses two porous peeling layers on opposite sides of a substrate to produce an ultra-thin substrate.
    Type: Grant
    Filed: August 4, 2005
    Date of Patent: October 2, 2007
    Assignee: Sony Corporation
    Inventor: Hideo Yamanaka
  • Publication number: 20070087492
    Abstract: An object of the present invention is to provide a method for easily forming a polycrystalline semiconductor thin-film, such as polycrystalline silicon having high crystallinity and high quality, or a single crystalline semiconductor thin-film at inexpensive cost, the crystalline semiconductor thin-film having a large area, and to provide an apparatus for processing the method described above.
    Type: Application
    Filed: November 3, 2006
    Publication date: April 19, 2007
    Inventor: Hideo Yamanaka
  • Patent number: 7183229
    Abstract: An object of the present invention is to provide a method for easily forming a polycrystalline semiconductor thin-film, such as polycrystalline silicon having high crystallinity and high quality, or a single crystalline semiconductor thin-film at inexpensive cost, the crystalline semiconductor thin-film having a large area, and to provide an apparatus for processing the method described above.
    Type: Grant
    Filed: December 7, 2001
    Date of Patent: February 27, 2007
    Assignee: Sony Corporation
    Inventor: Hideo Yamanaka
  • Patent number: 7157352
    Abstract: A method for producing an ultra-thin semiconductor chip and an ultra-thin back-illuminated solid-state image pickup device utilizing a semiconductor layer formed on a support substrate via an insulating layer to improve separation performance of a semiconductor layer from a support substrate and thereby improve the productivity and quality. The method uses two porous peeling layers on opposite sides of a substrate to produce an ultra-thin substrate.
    Type: Grant
    Filed: October 7, 2003
    Date of Patent: January 2, 2007
    Assignee: Sony Corporation
    Inventor: Hideo Yamanaka
  • Publication number: 20060237404
    Abstract: A laser annealer has a laser light source with at least one GaN-type semiconductor laser and is configured so as to form emission points that emit laser beams having a wavelength of 350 to 450 nm, and a scanning device for scanning an annealing surface with the laser beams. The laser annealer may have a spatial light modulator for modulating the laser beams, and in which pixel portions whose light modulating states change in accordance with control signals are arranged on a substrate. The invention is applied to a laser thin-film forming apparatus. The apparatus has a laser source that has at least one semiconductor laser and is configured so as to form emission points, and an optical system for focusing laser beams into a single beam in the width direction of a substrate.
    Type: Application
    Filed: March 28, 2006
    Publication date: October 26, 2006
    Inventors: Hiromi Ishikkawa, Akinori Harada, Kazuhiko Nagano, Yoji Okazaki, Takeshi Fujii, Hideo Yamanaka, Hiromitsu Yamakawa
  • Patent number: 7112760
    Abstract: A laser annealer has a laser light source with at least one GaN-type semiconductor laser and is configured so as to form emission points that emit laser beams having a wavelength of 350 to 450 nm, and a scanning device for scanning an annealing surface with the laser beams. The laser annealer may have a spatial light modulator for modulating the laser beams, and in which pixel portions whose light modulating states change in accordance with control signals are arranged on a substrate. The invention is applied to a laser thin-film forming apparatus. The apparatus has a laser source that has at least one semiconductor laser and is configured so as to form emission points, and an optical system for focusing laser beams into a single beam in the width direction of a substrate.
    Type: Grant
    Filed: June 9, 2003
    Date of Patent: September 26, 2006
    Assignees: Fuji Photo Film Co., Ltd., Fujinon Corporation
    Inventors: Hiromi Ishikawa, Akinori Harada, Kazuhiko Nagano, Yoji Okazaki, Takeshi Fujii, Hideo Yamanaka, Hiromitsu Yamakawa
  • Publication number: 20060204604
    Abstract: A granulating die B is provided with a resin discharge surface 5a to which a flow of water is contacted; and a plurality of nozzles 8 which communicate to a cylinder of an extruder are provided in this resin discharge surface 5a. Upon the resin discharge surface 5a, these nozzles 8 are not formed in at least one of its regions P which are in the direction of inflow of the flow of water and in the direction of outflow of the flow of water, and its regions R which are in directions orthogonal to this direction of inflow of said flow of water and this direction of outflow of said flow of water, but are only formed in the other regions Q thereof.
    Type: Application
    Filed: March 11, 2004
    Publication date: September 14, 2006
    Inventors: Hideo Yamanaka, Shigeru Takeuchi
  • Patent number: 7098085
    Abstract: A method is disclosed for forming high-quality high-crystallinity polycrystalline or monocrystalline thin semiconductor film. The method is capable of forming such a semiconductor film over a large area at low cost. An apparatus for practicing the method is also disclosed. To form a high-crystallinity large-grain polycrystalline film or monocrystalline thin semiconductor film on a substrate, or to produce a semiconductor device including a high-crystallinity large-grain polycrystalline film or monocrystalline thin semiconductor film disposed on a substrate, a low-crystal-quality thin semiconductor film is first formed on the substrate, and then focused-light annealing is performed on the low-crystal-quality thin semiconductor film thereby melting or semi-melting the low-crystal-quality thin semiconductor film.
    Type: Grant
    Filed: February 14, 2002
    Date of Patent: August 29, 2006
    Assignee: Sony Corporation
    Inventors: Hideo Yamanaka, Hisayoshi Yamoto
  • Publication number: 20060187379
    Abstract: A method of producing a microlens array includes a patterning step of forming a first optical resin layer having a first refractive index on a transparent substrate and forming a plurality of microlens planes arrayed in a two-dimensional pattern on the front surface of the first optical resin layer; a planarizing step of forming a planarized second optical resin layer; a joining step of providing a support layer on which a transparent protective film is previously formed; and a removing step of removing the support layer in such a manner that only the protective film remains on the second optical resin layer. The planarizing step is performed by filling irregularities of the microlens planes with a resin having a second refractive index and planarizing the front surface, opposed to the microlens planes, of the resin, to form the planarized second optical resin layer, and the joining step is performed by joining the support layer to the planarized second optical resin layer.
    Type: Application
    Filed: April 4, 2006
    Publication date: August 24, 2006
    Inventors: Hideo Yamanaka, Kikuo Kaise
  • Patent number: 7095082
    Abstract: Each of an electrooptical device and a driving substrate for the electrooptical device includes a first substrate having a display section provided with pixel electrodes and a peripheral-driving-circuit section provided on the periphery of the display section, a second substrate, and an optical material disposed between the first substrate and the second substrate. A gate section including a gate electrode and a gate-insulating film is formed on one surface of the first substrate, a compound layer having high lattice matching with single-crystal silicon is formed on the surface of the first substrate, and a single-crystal silicon layer is formed on the first substrate including the compound layer and the gate section. The single-crystal silicon layer constitutes a channel region, a source region, and a drain region.
    Type: Grant
    Filed: October 10, 2001
    Date of Patent: August 22, 2006
    Assignee: Sony Corporation
    Inventors: Hideo Yamanaka, Hisayoshi Yamoto, Yuichi Sato, Hajime Yagi
  • Publication number: 20060057820
    Abstract: A method for producing an ultra-thin semiconductor chip and an ultra-thin back-illuminated solid-state image pickup device utilizing a semiconductor layer formed on a support substrate via an insulating layer to improve separation performance of a semiconductor layer from a support substrate and thereby improve the productivity and quality. The method uses two porous peeling layers on opposite sides of a substrate to produce an ultra-thin substrate.
    Type: Application
    Filed: October 6, 2005
    Publication date: March 16, 2006
    Inventor: Hideo Yamanaka
  • Patent number: 7011866
    Abstract: A reaction gas made of a hydrogen-based carrier gas and a silane gas or the like is brought in contact with a heated catalyzer of tungsten or the like, and a DC voltage not higher than a glow discharge starting voltage or a voltage produced by superimposing an AV voltage or an RF voltage on the DC voltage is applied on the produced reactive species, so as to provide kinetic energy and carry out vapor growth of a predetermined film on a substrate, thereby providing a film of high quality.
    Type: Grant
    Filed: January 24, 2000
    Date of Patent: March 14, 2006
    Assignee: Sony Corporation
    Inventors: Hideo Yamanaka, Kikuo Kaise
  • Patent number: 6995916
    Abstract: A method of producing a microlens array includes a patterning step of forming a first optical resin layer having a first refractive index on a transparent substrate and forming a plurality of microlens planes arrayed in a two-dimensional pattern on the front surface of the first optical resin layer; a planarizing step of forming a planarized second optical resin layer; a joining step of providing a support layer on which a transparent protective film is previously formed; and a removing step of removing the support layer in such a manner that only the protective film remains on the second optical resin layer. The planarizing step is performed by filling irregularities of the microlens planes with a resin having a second refractive index and planarizing the front surface, opposed to the microlens planes, of the resin, to form the planarized second optical resin layer, and the joining step is performed by joining the support layer to the planarized second optical resin layer.
    Type: Grant
    Filed: April 13, 2005
    Date of Patent: February 7, 2006
    Assignee: Sony Corporation
    Inventors: Hideo Yamanaka, Kikuo Kaise
  • Patent number: 6992832
    Abstract: A method of producing a microlens array includes a patterning step of forming a first optical resin layer having a first refractive index on a transparent substrate and forming a plurality of microlens planes arrayed in a two-dimensional pattern on the front surface of the first optical resin layer; a planarizing step of forming a planarized second optical resin layer; a joining step of providing a support layer on which a transparent protective film is previously formed; and a removing step of removing the support layer in such a manner that only the protective film remains on the second optical resin layer. The planarizing step is performed by filling irregularities of the microlens planes with a resin having a second refractive index and planarizing the front surface, opposed to the microlens planes, of the resin, to form the planarized second optical resin layer, and the joining step is performed by joining the support layer to the planarized second optical resin layer.
    Type: Grant
    Filed: April 13, 2005
    Date of Patent: January 31, 2006
    Assignee: Sony Corporation
    Inventors: Hideo Yamanaka, Kikuo Kaise
  • Patent number: 6989933
    Abstract: A method of producing a microlens array includes a patterning step of forming a first optical resin layer having a first refractive index on a transparent substrate and forming a plurality of microlens planes arrayed in a two-dimensional pattern on the front surface of the first optical resin layer; a planarizing step of forming a planarized second optical resin layer; a joining step of providing a support layer on which a transparent protective film is previously formed; and a removing step of removing the support layer in such a manner that only the protective film remains on the second optical resin layer. The planarizing step is performed by filling irregularities of the microlens planes with a resin having a second refractive index and planarizing the front surface, opposed to the microlens planes, of the resin, to form the planarized second optical resin layer, and the joining step is performed by joining the support layer to the planarized second optical resin layer.
    Type: Grant
    Filed: April 13, 2005
    Date of Patent: January 24, 2006
    Assignee: Sony Corporation
    Inventors: Hideo Yamanaka, Kikuo Kaise
  • Patent number: 6985297
    Abstract: A method of producing a microlens array includes a patterning step of forming a first optical resin layer having a first refractive index on a transparent substrate and forming a plurality of microlens planes arrayed in a two-dimensional pattern on the front surface of the first optical resin layer; a planarizing step of forming a planarized second optical resin layer; a joining step of providing a support layer on which a transparent protective film is previously formed; and a removing step of removing the support layer in such a manner that only the protective film remains on the second optical resin layer. The planarizing step is performed by filling irregularities of the microlens planes with a resin having a second refractive index and planarizing the front surface, opposed to the microlens planes, of the resin, to form the planarized second optical resin layer, and the joining step is performed by joining the support layer to the planarized second optical resin layer.
    Type: Grant
    Filed: April 13, 2005
    Date of Patent: January 10, 2006
    Assignee: Sony Corporation
    Inventors: Hideo Yamanaka, Kikuo Kaise
  • Patent number: 6985298
    Abstract: A method of producing a microlens array includes a patterning step of forming a first optical resin layer having a first refractive index on a transparent substrate and forming a plurality of microlens planes arrayed in a two-dimensional pattern on the front surface of the first optical resin layer; a planarizing step of forming a planarized second optical resin layer; a joining step of providing a support layer on which a transparent protective film is previously formed; and a removing step of removing the support layer in such a manner that only the protective film remains on the second optical resin layer. The planarizing step is performed by filling irregularities of the microlens planes with a resin having a second refractive index and planarizing the front surface, opposed to the microlens planes, of the resin, to form the planarized second optical resin layer, and the joining step is performed by joining the support layer to the planarized second optical resin layer.
    Type: Grant
    Filed: April 13, 2005
    Date of Patent: January 10, 2006
    Assignee: Sony Corporation
    Inventors: Hideo Yamanaka, Kikuo Kaise
  • Publication number: 20050282306
    Abstract: A method of production of an ultra-thin semiconductor chip and an ultra-thin back-illuminated solid-state image pickup device utilizing a semiconductor layer formed on a support substrate via an insulating layer to improve separation performance of a semiconductor layer from a support substrate and thereby improve the productivity and quality-including the steps of forming a base comprised of a support substrate on which a porous layer or other peeling layer, a second semiconductor layer, an insulating layer, and a first semiconductor layer are stacked; forming solid-state image pickup sensor units and projecting connection electrodes to be connected to the solid-state image pickup sensor units in the first semiconductor layer; forming scores reaching the peeling layer along separation lines for separation into individual solid-state image pickup devices; forming a resin protective film filling the scores, covering the first semiconductor layer, and exposing the connection electrodes; peeling off the support
    Type: Application
    Filed: August 4, 2005
    Publication date: December 22, 2005
    Inventor: Hideo Yamanaka