Patents by Inventor Hideto Tamaso

Hideto Tamaso has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20130341646
    Abstract: A silicon carbide semiconductor device includes a silicon carbide substrate and a contact electrode. The silicon carbide substrate includes an n type region and a p type region that makes contact with the n type region. The contact electrode makes contact with the n type region and the p type region. The contact electrode contains Ni atoms and Si atoms. The number of the Ni atoms is not less than 87% and not more than 92% of the total number of the Ni atoms and the Si atoms. Accordingly, there can be provided a silicon carbide semiconductor device, which can achieve ohmic contact with an n type impurity region and can achieve a low contact resistance for a p type impurity region, as well as a method for manufacturing such a silicon carbide semiconductor device.
    Type: Application
    Filed: May 16, 2013
    Publication date: December 26, 2013
    Inventors: Shunsuke Yamada, Hideto Tamaso
  • Publication number: 20130341647
    Abstract: A silicon carbide semiconductor device includes a silicon carbide substrate, and a contact electrode. The silicon carbide substrate includes an n type region and a p type region in contact with the n type region. The contact electrode forms contact with the silicon carbide substrate. The contact electrode includes a first region containing TiSi, and a second region containing Al. The first region includes an n contact region in contact with the n type region and a p contact region in contact with the p type region. The second region is formed to contact the p type region and the n type region, and to surround the p contact region and the n contact region. Accordingly, there can be provided a silicon carbide semiconductor device including an electrode allowing ohmic contact with both a p type impurity region and an n type impurity region formed at a silicon carbide substrate.
    Type: Application
    Filed: May 16, 2013
    Publication date: December 26, 2013
    Applicant: Sumitomo Electric Industries, Ltd.
    Inventors: Shunsuke Yamada, Hideto Tamaso
  • Publication number: 20130143398
    Abstract: A method for manufacturing a MOSFET includes the steps of: preparing a substrate made of silicon carbide; forming a drain electrode making ohmic contact with the substrate; and forming a backside pad electrode on and in contact with the drain electrode. The drain electrode formed in the step of forming the drain electrode is made of an alloy containing Ti and Si. Further, the backside pad electrode formed is maintained at a temperature of 300° C. or smaller until completion of the MOSFET. Accordingly, the manufacturing process can be efficient while achieving excellent adhesion between the electrodes.
    Type: Application
    Filed: September 11, 2012
    Publication date: June 6, 2013
    Applicant: Sumitomo Electric Industries, Ltd.
    Inventors: Hiroyuki Kitabayashi, Hideto Tamaso, Taku Horii
  • Patent number: 8395163
    Abstract: A MOSFET capable of achieving decrease in the number of steps in a manufacturing process and improvement in integration includes an SiC wafer composed of silicon carbide and a source contact electrode arranged in contact with the SiC wafer and containing titanium, aluminum, silicon, and carbon as well as a remaining inevitable impurity. The SiC wafer includes an n+ source region having an n conductivity type and a p+ region having a p conductivity type. Both of the n+ source region and the p+ region are in contact with the source contact electrode. The source contact electrode contains aluminum and titanium in a region including an interface with the SiC wafer.
    Type: Grant
    Filed: April 13, 2009
    Date of Patent: March 12, 2013
    Assignee: Sumitomo Electric Industries, Ltd.
    Inventor: Hideto Tamaso
  • Publication number: 20130045592
    Abstract: A method for manufacturing a SiC semiconductor device includes: a step of forming an oxide film on a surface of a SiC substrate; and a step of removing the oxide film. In the step of forming the oxide film, ozone gas is used. In the step of removing the oxide film, it is preferable to use halogen plasma or hydrogen plasma. In this way, problems associated with a chemical solution can be reduced while obtaining a method and device for manufacturing a SiC semiconductor device, by each of which a cleaning effect can be improved.
    Type: Application
    Filed: November 4, 2011
    Publication date: February 21, 2013
    Applicant: SUMITOMO ELECTRIC INDUSTRIES, LTD.
    Inventors: Tomihito Miyazaki, Hiromu Shiomi, Hideto Tamaso, Takeyoshi Masuda
  • Patent number: 8373176
    Abstract: A MOSFET representing a semiconductor device capable of achieving decrease in the number of steps in a manufacturing process and improvement in integration by including an electrode that can be in contact with any of a p-type SiC region and an n-type SiC region with contact resistance being sufficiently suppressed includes an n+ SiC substrate, an n? SiC layer formed on the n+ SiC substrate, and a source electrode arranged in contact with the n? SiC layer. The n? SiC layer includes an n+ source region having an n conductivity type. The source electrode includes a source contact electrode arranged in contact with the n+ source region and containing Ti, Al and Si.
    Type: Grant
    Filed: April 9, 2009
    Date of Patent: February 12, 2013
    Assignee: Sumitomo Electric Industries, Ltd.
    Inventor: Hideto Tamaso
  • Publication number: 20120326167
    Abstract: A silicon carbide substrate has a substrate surface. A gate insulating film is provided to cover a part of the substrate surface. A gate electrode covers a part of the gate insulating film. A contact electrode is provided on the substrate surfaces, adjacent to and in contact with the gate insulating film, and it contains an alloy having Al atoms. Al atoms do not diffuse from the contact electrode into a portion of the gate insulating film lying between the substrate surface and the gate electrode.
    Type: Application
    Filed: October 19, 2011
    Publication date: December 27, 2012
    Applicant: SUMITOMO ELECTRIC INDUSTRIES, LTD.
    Inventor: Hideto Tamaso
  • Publication number: 20120319135
    Abstract: An electrode layer lies on a silicon carbide substrate in contact therewith and has Ni atoms and Si atoms. The number of Ni atoms is not less than 67% of the total number of Ni atoms and Si atoms. A side of the electrode layer at least in contact with the silicon carbide substrate contains a compound of Si and Ni. On a surface side of the electrode layer, C atom concentration is lower than Ni atom concentration. Thus, improvement in electrical conductivity of the electrode layer and suppression of precipitation of C atoms at the surface of the electrode layer can both be achieved.
    Type: Application
    Filed: October 19, 2011
    Publication date: December 20, 2012
    Applicant: Sumitomo Electric Industries, Ltd.
    Inventor: Hideto Tamaso
  • Publication number: 20120211770
    Abstract: There are provided a semiconductor device of low cost and high quality, a combined substrate used for manufacturing the semiconductor device, and methods for manufacturing them. The method for manufacturing the semiconductor device includes the steps of: preparing a single-crystal semiconductor member; preparing a supporting base; connecting the supporting base and the single-crystal semiconductor member to each other through a connecting layer containing carbon; forming an epitaxial layer on a surface of the single-crystal semiconductor member; forming a semiconductor element using the epitaxial layer; separating the single-crystal semiconductor member from the supporting base by oxidizing and accordingly decomposing the connecting layer after the step of forming the semiconductor element; and dividing the single-crystal semiconductor member separated from the supporting base.
    Type: Application
    Filed: May 2, 2011
    Publication date: August 23, 2012
    Applicant: Sumitomo Electric Industries, Ltd.
    Inventors: Hiromu Shiomi, Hideto Tamaso
  • Publication number: 20120175638
    Abstract: A MOSFET includes: a silicon carbide substrate having a main surface having an off angle of not less than 50° and not more than 65° relative to a {0001} plane; an active layer; a gate oxide film; a p type body region having p type conductivity and formed to include a region of the active layer, the region being in contact with the gate oxide film; an n+ region having n type conductivity and formed in the p type body region to include a main surface of the active layer opposite to the silicon carbide substrate; and a source contact electrode formed on the active layer in contact with the n+ region, the p type body region having a p type impurity density of 5×1017 cm?3 or greater, the source contact electrode and the p type body region being in direct contact with each other.
    Type: Application
    Filed: January 11, 2012
    Publication date: July 12, 2012
    Applicant: SUMITOMO ELECTRIC INDUSTRIES, LTD.
    Inventors: Toru HIYOSHI, Hideto TAMASO
  • Publication number: 20120126250
    Abstract: The present invention provides a silicon carbide semiconductor device having an ohmic electrode improved in adhesion of a wire thereto by preventing deposition of carbon so as not to form a Schottky contact, as well as a method for manufacturing such a silicon carbide semiconductor device. In the SiC semiconductor device, upon forming the ohmic electrode, a first metal layer made of one first metallic element is formed on one main surface of a SiC layer. Further, a Si layer made of Si is formed on an opposite surface of the first metal layer to its surface facing the SiC layer. The stacked structure thus formed is subjected to thermal treatment. In this way, there can be obtained a silicon carbide semiconductor device having an ohmic electrode adhered well to a wire by preventing deposition of carbon atoms on the surface layer of the electrode and formation of a Schottky contact resulting from Si and SiC.
    Type: Application
    Filed: April 14, 2010
    Publication date: May 24, 2012
    Applicant: SUMITOMO ELECTRIC INDUSTRIES, LTD.
    Inventor: Hideto Tamaso
  • Publication number: 20120129343
    Abstract: To provide a method of manufacturing a semiconductor device that can be in contact with both of an n-type SiC region and a p-type SiC region and can suppress increase in contact resistance due to oxidation, a method of manufacturing a semiconductor device includes the steps of preparing a SiC layer, and forming an ohmic electrode on a main surface of the SiC layer. The step of forming the ohmic electrode includes the steps of forming a conductor layer which will become the ohmic electrode on the main surface of the SiC layer, and performing heat treatment such that the conductor layer becomes the ohmic electrode. After the step of performing the heat treatment, a temperature of the ohmic electrode when a surface of the ohmic electrode is exposed to an atmosphere containing oxygen is set to 100° C. or lower.
    Type: Application
    Filed: July 30, 2010
    Publication date: May 24, 2012
    Applicant: SUMITOMO ELECTRIC INDUSTRIES, LTD.
    Inventors: Hideto Tamaso, Keiji Wada
  • Publication number: 20120129326
    Abstract: A method for manufacturing a semiconductor device includes the steps of: preparing a substrate made of silicon carbide; forming, on one main surface of the substrate, a detection film having a light transmittance different from that of silicon carbide; confirming presence of the substrate by applying light to the detection film; and forming an active region in the substrate whose presence has been confirmed.
    Type: Application
    Filed: November 17, 2011
    Publication date: May 24, 2012
    Applicant: SUMITOMO ELECTRIC INDUSTRIES, LTD.
    Inventors: Hideto TAMASO, Hiromu SHIOMI
  • Publication number: 20120119225
    Abstract: The present invention provides a silicon carbide substrate, an epitaxial layer provided substrate, a semiconductor device, and a method for manufacturing the silicon carbide substrate, each of which achieves reduced on-resistance. The silicon carbide substrate is a silicon carbide substrate having a main surface, and includes: a SiC single-crystal substrate formed in at least a portion of the main surface; and a base member disposed to surround the SiC single-crystal substrate. The base member includes a boundary region and a base region. The boundary region is adjacent to the SiC single-crystal substrate in a direction along the main surface, and has a crystal grain boundary therein. The base region is adjacent to the SiC single-crystal substrate in a direction perpendicular to the main surface, and has an impurity concentration higher than that of the SiC single-crystal substrate.
    Type: Application
    Filed: February 21, 2011
    Publication date: May 17, 2012
    Applicant: SUMITOMO ELECTRIC INDUSTRIES, LTD.
    Inventors: Hiromu Shiomi, Hideto Tamaso, Shin Harada, Takashi Tsuno, Yasuo Namikawa
  • Publication number: 20120068195
    Abstract: A method for manufacturing a silicon carbide substrate includes the steps of: preparing a plurality of SiC substrates each made of single-crystal silicon carbide; forming a base layer made of silicon carbide and holding the plurality of SiC substrates, which are arranged side by side when viewed in a planar view; and forming a filling portion filling a gap between the plurality of SiC substrates.
    Type: Application
    Filed: September 27, 2010
    Publication date: March 22, 2012
    Applicant: SUMITOMO ELECTRIC INDUSTRIES, LTD.
    Inventors: Shin Harada, Makoto Sasaki, Taro Nishiguchi, Hideto Tamaso, Yasuo Namikawa
  • Publication number: 20120032191
    Abstract: A method for manufacturing a silicon carbide substrate (1) having a large diameter provided readily includes the steps of: preparing a plurality of SiC substrates (20) each made of single-crystal silicon carbide; and connecting end surfaces (20B) of the plurality of SiC substrates (20) to one another such that the plurality of SiC substrates (20) are arranged side by side when viewed in a planar view.
    Type: Application
    Filed: September 27, 2010
    Publication date: February 9, 2012
    Applicant: SUMITOMO ELECTRIC INDUSTRIES, LTD.
    Inventors: Shin Harada, Makoto Sasaki, Taro Nishiguchi, Hideto Tamaso, Yasuo Namikawa
  • Publication number: 20120007104
    Abstract: A semiconductor device employing silicon carbide, and the like are provided. In the semiconductor device, even when an electrode material and an upper electrode material are different, a problem does not take place at an interface at which these different types of metals are in contact with each other, thus obtaining high reliability in long-term use. The semiconductor device includes: a contact electrode 16 in contact with silicon carbides 14, 18; and an upper electrode 19 electrically conductive to the contact electrode. The contact electrode 16 is formed of an alloy including titanium, aluminum, and silicon, the upper electrode 19 is formed of aluminum or an aluminum alloy, and the upper electrode achieves the electric conduction to the contact electrode with the upper electrode making contact with the contact electrode.
    Type: Application
    Filed: April 22, 2010
    Publication date: January 12, 2012
    Applicant: SUMITOMO ELECTRIC INDUSTRIES, LTD.
    Inventors: Keiji Wada, Hideto Tamaso, Takeyoshi Masuda, Misako Honaga
  • Publication number: 20120003811
    Abstract: A first silicon carbide substrate has a first front-side surface and a first side surface. A second silicon carbide substrate has a second front-side surface and a second side surface. The second side surface is disposed such that a gap having an opening between the first and second front-side surfaces of the first and second silicon carbide substrates is disposed between the first side surface and the second side surface. A closing portion is provided to close the gap over the opening. By depositing sublimates from the first and second side surfaces onto the closing portion, a connecting portion is formed to connect the first and second side surfaces to each other so as to close the opening. After the step of forming the connecting portion, the closing portion is removed.
    Type: Application
    Filed: September 28, 2010
    Publication date: January 5, 2012
    Applicant: SUMITOMO ELECTRIC INDUSTRIES, LTD.
    Inventors: Makoto Sasaki, Shin Harada, Taro Noshiguchi, Kyoto Okita, Hideto Tamaso, Yasuo Namikawa
  • Publication number: 20110227096
    Abstract: A semiconductor device having a construction capable of achieving suppressed deterioration of electric characteristics in an insulating member is provided. An n? SiC layer, a source contact electrode formed on a main surface of the n? SiC layer, a gate electrode arranged at a distance from the source contact electrode on the main surface of the n? SiC layer, and an interlayer insulating film located between the source contact electrode and the gate electrode are provided. A rate of lowering in electric resistance in the interlayer insulating film when heating to a temperature not higher than 1200° C. is carried out while the source contact electrode and the interlayer insulating film are adjacent to each other is not higher than 5%.
    Type: Application
    Filed: July 8, 2010
    Publication date: September 22, 2011
    Applicant: SUMITOMO ELECTRIC INDUSTRIES, LTD.
    Inventors: Keiji Wada, Hideto Tamaso
  • Publication number: 20110175111
    Abstract: Provided is a silicon carbide semiconductor device capable of lowering the contact resistance of an ohmic electrode and achieving high reverse breakdown voltage characteristics. A semiconductor device includes a substrate and a p+ region as an impurity layer. The substrate of the first conductive type (n type) is made of silicon carbide and has a dislocation density of 5×103 cm?2 or less. The p+ region is formed on the substrate, in which the concentration of the conductive impurities having the second conductive type different from the first conductive type is 1×1020 cm3 or more and 5×1021 cm3 or less.
    Type: Application
    Filed: August 7, 2009
    Publication date: July 21, 2011
    Applicants: SUMITOMO ELECTRIC INDUSTRIES, LTD., NATIONAL UNIVERSITY CORPORATION NARA INSTITUTE OF SCIENCE AND TECHNOLOGY
    Inventors: Shin Harada, Hideto Tamaso, Tomoaki Hatayama