Abstract: A JFET is a semiconductor device allowing more reliable implementation of the characteristics essentially achievable by employing SiC as a material and includes a wafer having at least an upper surface made of silicon carbide, and a gate contact electrode formed on the upper surface. The wafer includes a first p-type region serving as an ion implantation region formed so as to include the upper surface. The first p-type region includes a base region disposed so as to include the upper surface, and a protruding region. The base region has a width (w1) in the direction along the upper surface greater than a width (w2) of the protruding region. The gate contact electrode is disposed in contact with the first p-type region such that the gate contact electrode is entirely located on the first p-type region as seen in plan view.

Abstract: An ohmic electrode for SiC semiconductor that contains Si and Ni or an ohmic electrode for SiC semiconductor that further contains Au or Pt in addition to Si and Ni is provided. In addition, a method of manufacturing the ohmic electrode for SiC semiconductor, a semiconductor device including the ohmic electrode for SiC semiconductor, and a method of manufacturing the semiconductor device are provided.

Abstract: A method of manufacturing a semiconductor device includes a first step of forming an ion implantation mask on a portion of a surface of a semiconductor; a second step of implanting ions of a first dopant into at least a portion of an exposed region of the surface of the semiconductor other than the region where the ion implantation mask is formed, to form a first dopant implantation region; a third step of, after forming the first dopant implantation region, removing a portion of the ion implantation mask to increase the exposed region of the surface of the semiconductor; and a fourth step of implanting ions of a second dopant into at least a portion of the increased exposed region of the surface of the semiconductor to form a second dopant implantation region.