Patents by Inventor Hidetoshi Koike

Hidetoshi Koike has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9472591
    Abstract: According to one embodiment, a semiconductor image pickup device includes a pixel area and a non-pixel area. The device includes a first photoelectric conversion element formed in the pixel area, a first transistor formed in the pixel area and connected to the first photoelectric conversion element, a second photoelectric conversion element formed in the non-pixel area, a second transistor formed in the non-pixel area and connected to the second photoelectric conversion element, a metal wire formed at least in the non-pixel area, a first cap layer formed on the metal wire to prevent diffusion of metal contained in the metal wire, and a dummy via wire formed in the non-pixel area and penetrating the first cap layer.
    Type: Grant
    Filed: November 24, 2015
    Date of Patent: October 18, 2016
    Assignee: KABUSHIKI KAISHA TOSHIBA
    Inventor: Hidetoshi Koike
  • Publication number: 20160079299
    Abstract: According to one embodiment, a semiconductor image pickup device includes a pixel area and a non-pixel area. The device includes a first photoelectric conversion element formed in the pixel area, a first transistor formed in the pixel area and connected to the first photoelectric conversion element, a second photoelectric conversion element formed in the non-pixel area, a second transistor formed in the non-pixel area and connected to the second photoelectric conversion element, a metal wire formed at least in the non-pixel area, a first cap layer formed on the metal wire to prevent diffusion of metal contained in the metal wire, and a dummy via wire formed in the non-pixel area and penetrating the first cap layer.
    Type: Application
    Filed: November 24, 2015
    Publication date: March 17, 2016
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventor: Hidetoshi KOIKE
  • Patent number: 9240430
    Abstract: According to one embodiment, a semiconductor image pickup device includes a pixel area and a non-pixel area. The device includes a first photoelectric conversion element formed in the pixel area, a first transistor formed in the pixel area and connected to the first photoelectric conversion element, a second photoelectric conversion element formed in the non-pixel area, a second transistor formed in the non-pixel area and connected to the second photoelectric conversion element, a metal wire formed at least in the non-pixel area, a first cap layer formed on the metal wire to prevent diffusion of metal contained in the metal wire, and a dummy via wire formed in the non-pixel area and penetrating the first cap layer.
    Type: Grant
    Filed: March 27, 2015
    Date of Patent: January 19, 2016
    Assignee: KABUSHIKI KAISHA TOSHIBA
    Inventor: Hidetoshi Koike
  • Patent number: 9201611
    Abstract: According to one embodiment, an interface control apparatus includes an interface, a table, a command processor, and a controller. The interface transmits and receives information to and from a host. The table holds management information for managing an address in a memory space in the host. The command processor carries out a command process of accessing the memory space in the host using the management information. The controller releases the management information corresponding to the command process from the table in response to completion of the command process.
    Type: Grant
    Filed: September 10, 2013
    Date of Patent: December 1, 2015
    Assignee: KABUSHIKI KAISHA TOSHIBA
    Inventors: Hiroshi Tsurumi, Hidetoshi Koike, Nobuaki Yoshitake, Tomoo Utsumi
  • Patent number: 9171974
    Abstract: According to one embodiment, in a semiconductor device, a semiconductor substrate has a first surface and a second surface which is opposed to the first surface. An insulating layer is provided on the first surface of the semiconductor substrate. A metal wiring is provided within the insulating layer. A support substrate is bonded to the insulating layer. A poly silicon electrode is connected to the metal wiring through a contact. A pad is provided on the second surface of the semiconductor substrate and is connected to the poly silicon electrode through a metal film deposited in a via-hole to penetrate the semiconductor substrate and extend to the poly silicon electrode.
    Type: Grant
    Filed: February 11, 2013
    Date of Patent: October 27, 2015
    Assignee: KABUSHIKI KAISHA TOSHIBA
    Inventor: Hidetoshi Koike
  • Patent number: 9110856
    Abstract: According to one embodiment, an interface control apparatus includes an interface, and a controller. The interface is configured to transmit information between a host and a data storage apparatus. The controller is configured to fetch request information making a processing request for the data storage apparatus, from an element being a storage unit of a queue provided on the host through the interface. The controller is configured to execute read request processing of fetching first request information divided into a plurality of elements and stored, with priority over second request information which is different from the first request information, when the request information is fetched.
    Type: Grant
    Filed: June 19, 2013
    Date of Patent: August 18, 2015
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Hiroshi Tsurumi, Hidetoshi Koike, Nobuaki Yoshitake, Tomoo Utsumi
  • Publication number: 20150200225
    Abstract: According to one embodiment, a semiconductor image pickup device includes a pixel area and a non-pixel area. The device includes a first photoelectric conversion element formed in the pixel area, a first transistor formed in the pixel area and connected to the first photoelectric conversion element, a second photoelectric conversion element formed in the non-pixel area, a second transistor formed in the non-pixel area and connected to the second photoelectric conversion element, a metal wire formed at least in the non-pixel area, a first cap layer formed on the metal wire to prevent diffusion of metal contained in the metal wire, and a dummy via wire formed in the non-pixel area and penetrating the first cap layer.
    Type: Application
    Filed: March 27, 2015
    Publication date: July 16, 2015
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventor: Hidetoshi KOIKE
  • Patent number: 9048156
    Abstract: According to one embodiment, a semiconductor image pickup device includes a pixel area and a non-pixel area. The device includes a first photoelectric conversion element formed in the pixel area, a first transistor formed in the pixel area and connected to the first photoelectric conversion element, a second photoelectric conversion element formed in the non-pixel area, a second transistor formed in the non-pixel area and connected to the second photoelectric conversion element, a metal wire formed at least in the non-pixel area, a first cap layer formed on the metal wire to prevent diffusion of metal contained in the metal wire, and a dummy via wire formed in the non-pixel area and penetrating the first cap layer.
    Type: Grant
    Filed: September 14, 2011
    Date of Patent: June 2, 2015
    Assignee: KABUSHIKI KAISHA TOSHIBA
    Inventor: Hidetoshi Koike
  • Publication number: 20150069477
    Abstract: According to one embodiment, a solid-state imaging device includes a photodiode includes an N-type region and a P-type region, a floating diffusion region, and a transfer transistor. The N-type diffusion region of the photodiode comprises a first semiconductor region and a second semiconductor region formed shallower than the first semiconductor region. An end portion of the first semiconductor region is positioned on the floating diffusion region side rather than an end portion of a gate electrode of the transfer transistor. An end portion of the second semiconductor region is set in substantially the same position as that of the end portion of the gate electrode of the transfer transistor.
    Type: Application
    Filed: November 13, 2014
    Publication date: March 12, 2015
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventor: Hidetoshi KOIKE
  • Patent number: 8907387
    Abstract: According to one embodiment, a solid-state imaging device includes a photodiode includes an N-type region and a P-type region, a floating diffusion region, and a transfer transistor. The N-type diffusion region of the photodiode comprises a first semiconductor region and a second semiconductor region formed shallower than the first semiconductor region. An end portion of the first semiconductor region is positioned on the floating diffusion region side rather than an end portion of a gate electrode of the transfer transistor. An end portion of the second semiconductor region is set in substantially the same position as that of the end portion of the gate electrode of the transfer transistor.
    Type: Grant
    Filed: March 19, 2012
    Date of Patent: December 9, 2014
    Assignee: Kabushiki Kaisha Toshiba
    Inventor: Hidetoshi Koike
  • Publication number: 20140317362
    Abstract: According to one embodiment, an interface control apparatus includes an interface, a table, a command processor, and a controller. The interface transmits and receives information to and from a host. The table holds management information for managing an address in a memory space in the host. The command processor carries out a command process of accessing the memory space in the host using the management information. The controller releases the management information corresponding to the command process from the table in response to completion of the command process.
    Type: Application
    Filed: September 10, 2013
    Publication date: October 23, 2014
    Applicant: Kabushiki Kaisha Toshiba
    Inventors: Hiroshi TSURUMI, Hidetoshi Koike, Nobuaki Yoshitake, Tomoo Utsumi
  • Publication number: 20140281677
    Abstract: Error correction is carried out on first data stored in an external memory after determining that the first data contains a correctable error. Prior to starting the error correction of the first data, other accesses to the first data are blocked. Thereafter, the first data is corrected and overwritten by the corrected data (second data). After storing the second data in the external memory, accesses to the second data are permitted.
    Type: Application
    Filed: August 6, 2013
    Publication date: September 18, 2014
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventor: Hidetoshi KOIKE
  • Patent number: 8816413
    Abstract: Photoelectric conversion elements are arranged in a pixel area. A circuit area is arranged around the pixel area. An interconnect including copper is arranged in the pixel area and circuit area. A cap layer is arranged on the interconnect. Wherein the cap layer except a part on the interconnect is removed from the pixel area and circuit area.
    Type: Grant
    Filed: March 17, 2010
    Date of Patent: August 26, 2014
    Assignee: Kabushiki Kaisha Toshiba
    Inventor: Hidetoshi Koike
  • Publication number: 20140207980
    Abstract: According to one embodiment, an interface control apparatus includes an interface, and a controller. The interface is configured to transmit information between a host and a data storage apparatus. The controller is configured to fetch request information making a processing request for the data storage apparatus, from an element being a storage unit of a queue provided on the host through the interface. The controller is configured to execute read request processing of fetching first request information divided into a plurality of elements and stored, with priority over second request information which is different from the first request information, when the request information is fetched.
    Type: Application
    Filed: June 19, 2013
    Publication date: July 24, 2014
    Inventors: Hiroshi Tsurumi, Hidetoshi Koike, Nobuaki Yoshitake, Tomoo Utsumi
  • Patent number: 8659060
    Abstract: According to one embodiment, a solid-state imaging device includes a semiconductor layer including first and second regions, a pixel portion provided in the first region, electrodes provided in the second region and configured to penetrate the semiconductor layer, and a guard ring provided in the second region and configured to penetrate the semiconductor layer and electrically isolate the pixel portion from the electrodes. An upper surface of the semiconductor layer in the second region is lower than an upper surface of the semiconductor layer in the first region.
    Type: Grant
    Filed: March 14, 2012
    Date of Patent: February 25, 2014
    Assignee: Kabushiki Kaisha Toshiba
    Inventor: Hidetoshi Koike
  • Publication number: 20140008755
    Abstract: According to one embodiment, in a semiconductor device, a semiconductor substrate has a first surface and a second surface which is opposed to the first surface. An insulating layer is provided on the first surface of the semiconductor substrate. A metal wiring is provided within the insulating layer. A support substrate is bonded to the insulating layer. A poly silicon electrode is connected to the metal wiring through a contact. A pad is provided on the second surface of the semiconductor substrate and is connected to the poly silicon electrode through a metal film deposited in a via-hole to penetrate the semiconductor substrate and extend to the poly silicon electrode.
    Type: Application
    Filed: February 11, 2013
    Publication date: January 9, 2014
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventor: Hidetoshi KOIKE
  • Publication number: 20130198586
    Abstract: According to one embodiment, a data storage control apparatus includes an interface module and a controller. The interface module receives first data, in specific units, from a host and stores the data in a buffer memory. The controller generates second data from the first data stored in the buffer memory, and performs a control to write the second data to a nonvolatile storage medium. The controller generates the second data of a second format having the same size as the first format of the data stored in an ordinary recording area provided at the nonvolatile storage medium, and including a plurality of units of the first data and invalid data. The controller further performs a control to write the second data in a save area provided on the nonvolatile storage medium.
    Type: Application
    Filed: July 23, 2012
    Publication date: August 1, 2013
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventor: Hidetoshi KOIKE
  • Patent number: 8488028
    Abstract: According to one embodiment, a solid state imaging device includes a pixel region to be used for generating pixels, a black reference region provided outside the pixel region, and a dummy region provided between the black reference region and the pixel region, and including a light shielding pattern configured to shield the black reference against light coming from the pixel region.
    Type: Grant
    Filed: December 17, 2010
    Date of Patent: July 16, 2013
    Assignee: Kabushiki Kaisha Toshiba
    Inventor: Hidetoshi Koike
  • Patent number: 8399946
    Abstract: According to one embodiment, a solid-state imaging device includes a semiconductor substrate of a first conductive type having a diffusion layer region provided on a surface thereof, a diffusion layer of the first conductive type for a pixel separation whose bottom portion is formed at the deepest position of the diffusion layer region in a pixel region, and a first deep diffusion layer of the first conductive type provided at the deepest position of the diffusion layer region in a first peripheral logic region for electrically connecting the semiconductor substrate and the first peripheral logic region and having a first concentration gradient equal to that of the diffusion layer for pixel separation.
    Type: Grant
    Filed: October 24, 2012
    Date of Patent: March 19, 2013
    Assignee: Kabushiki Kaisha Toshiba
    Inventor: Hidetoshi Koike
  • Publication number: 20130049157
    Abstract: According to one embodiment, a solid-state imaging device includes a semiconductor substrate of a first conductive type having a diffusion layer region provided on a surface thereof, a diffusion layer of the first conductive type for a pixel separation whose bottom portion is formed at the deepest position of the diffusion layer region in a pixel region, and a first deep diffusion layer of the first conductive type provided at the deepest position of the diffusion layer region in a first peripheral logic region for electrically connecting the semiconductor substrate and the first peripheral logic region and having a first concentration gradient equal to that of the diffusion layer for pixel separation.
    Type: Application
    Filed: October 24, 2012
    Publication date: February 28, 2013
    Inventor: Hidetoshi KOIKE