Patents by Inventor Hideyuki Kojima

Hideyuki Kojima has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6072241
    Abstract: A method of manufacturing a semiconductor device having a self-aligned contact hole includes a step of forming first gate electrode structures having a high pattern density on a gate insulating film in a first area of a semiconductor substrate and second gate electrode structures having a low pattern density on the gate insulating film in a second area, a step of forming first and second insulating films having different etching characteristics over the semiconductor substrate, a step of anisotropically etching the first and second insulating films in the second area by masking the first area to form side spacers on the second gate electrode structures, a step of forming an interlayer insulating film over the semiconductor substrate, and a step of forming in a self-alignment manner an opening reaching the source/drain region in the first area, by using the second insulating film as an etching stopper. This method allows to reliably form a self-aligned contact hole even if the pattern density is high.
    Type: Grant
    Filed: March 5, 1998
    Date of Patent: June 6, 2000
    Assignee: Fujitsu Limited
    Inventor: Hideyuki Kojima
  • Patent number: 5953247
    Abstract: A plurality of word lines are disposed on the surface of a semiconductor substrate in a first direction. Two dummy word lines are disposed outside of the outermost word line among the word lines. MISFETs are disposed in correspondence with the word lines and dummy word lines. MISFETs are regularly disposed in the first direction and in a second direction crossing the first direction. One storage region among the source and drain regions of each MISFET is formed with a storage contact hole. The storage regions are distributed only in an area inside of the outermost dummy word line among the dummy word lines. A capacitor is connected to the storage region at the bottom of each storage contact hole. Different voltages are applied to the dummy word lines and the bit regions disposed outside of the outermost dummy word line. A semiconductor device capable of suppressing a standby current error is provided.
    Type: Grant
    Filed: December 29, 1998
    Date of Patent: September 14, 1999
    Assignee: Fujitsu Limited
    Inventors: Hideyuki Kojima, Toshiya Uchida
  • Patent number: 5150301
    Abstract: An air/fuel mixture ratio learning control system for an internal combustion engine using a mixed fuel employs a learnt correction coefficient which is used both in a FEEDBACK mode air/fuel ratio control and in an OPEN LOOP mode air/fuel ratio control. The learnt correction coefficient is derived based on a FEEDBACK air/fuel ratio dependent correction coefficient per one of preselected engine driving ranges and per one of preselected concentration ranges of one fuel component contained in the mixed fuel. The learnt correction coefficient is cyclically derived in a preselected stable engine driving condition during the FEEDBACK mode air/fuel ratio control for updating a previously derived and stored one to minimize a deviation of the FEEDBACK correction coefficient from a reference value.
    Type: Grant
    Filed: June 29, 1990
    Date of Patent: September 22, 1992
    Assignee: Japan Electronic Control Systems Company Limited
    Inventors: Masuo Kashiwabara, Hideyuki Kojima, Hiromitsu Yamaura, Seiichi Otani
  • Patent number: D419193
    Type: Grant
    Filed: April 30, 1999
    Date of Patent: January 18, 2000
    Assignee: Sanyo Electric Co., Ltd.
    Inventors: Hideyuki Kojima, Toshiro Fujii, Shingo Iwata, Yoshikazu Saito
  • Patent number: D420611
    Type: Grant
    Filed: May 10, 1999
    Date of Patent: February 15, 2000
    Assignee: Sanyo Electric Co., Ltd.
    Inventors: Toshiro Fujii, Hideyuki Kojima, Shingo Iwata