Patents by Inventor Hiraku Ishikawa

Hiraku Ishikawa has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20100304014
    Abstract: Functional groups on the outermost surface of an amorphous hydrocarbon film are substituted. The amorphous hydrocarbon film is formed on a silicon substrate Sub, which is coated with a low-k film. A heat treatment is performed on the amorphous hydrocarbon film in a non-silane gas atmosphere. Next, a heat treatment is performed on the amorphous hydrocarbon film in a silane gas atmosphere immediately after the heat treatment in a non-silane gas atmosphere. After the heat treatment, a film, such as a hard mask, is formed.
    Type: Application
    Filed: January 19, 2009
    Publication date: December 2, 2010
    Applicant: TOKYO ELECTRON LIMITED
    Inventor: Hiraku Ishikawa
  • Patent number: 7842356
    Abstract: Substrate processing methods involve forming an insulating film of amorphous carbon on a substrate by supplying acetylene gas and hydrogen gas with a volume ratio of 4:3 to 4:1, or alternatively, butyne gas, into a process vessel in which the substrate is accommodated. The methods further involve generating a plasma inside of the process vessel by emitting a microwave. The pressure inside of the process vessel is maintained to be 4.0 Pa or less and the substrate is maintained to be 200° C. or less while the insulating film is formed.
    Type: Grant
    Filed: June 15, 2006
    Date of Patent: November 30, 2010
    Assignee: Tokyo Electron Limited
    Inventor: Hiraku Ishikawa
  • Publication number: 20100243999
    Abstract: An organic element is protected by a protection film which has high sealing performance while relaxing a stress and does not change the characteristics of the organic element. In a substrate processing system Sys, a substrate processing apparatus 10, which includes a deposition apparatus PM1, a first microwave plasma processing apparatus PM3, and a second microwave plasma processing apparatus PM4, is arranged in a cluster structure, and an organic electronic device is manufactured by keeping a space where a substrate G moves from carry-in to carry-out in a desired depressurized state. An organic EL element is formed by the deposition apparatus PM1, butyne gas is plasmatized by microwave power by the first microwave plasma processing apparatus PM3, and an aCHx film 54 is formed adjacent to the organic EL element to cover the organic EL element.
    Type: Application
    Filed: August 26, 2008
    Publication date: September 30, 2010
    Applicant: TOKYO ELECTRON LIMITED
    Inventor: Hiraku Ishikawa
  • Publication number: 20100105213
    Abstract: An amorphous carbon film forming method is performed by using a parallel plate type plasma CVD apparatus in which an upper electrode and a lower electrode are installed within a processing chamber, and the method includes: disposing a substrate on the lower electrode; supplying carbon monoxide and an inert gas into the processing chamber; decomposing the carbon monoxide by applying a high frequency power to at least the upper electrode and generating plasma; and depositing amorphous carbon on the substrate. It is desirable that the upper electrode is a carbon electrode.
    Type: Application
    Filed: February 21, 2008
    Publication date: April 29, 2010
    Applicant: TOKYO ELECTRON LIMITED
    Inventors: Hiraku Ishikawa, Tadakazu Murai, Eisuke Morisaki
  • Publication number: 20100089871
    Abstract: Provided is a plasma processing apparatus including a processing vessel accommodating a target object; a microwave generator configured to generate a microwave; a waveguide configured to induce the microwave to the processing vessel; a planar antenna having a plurality of microwave radiation holes through which the microwave induced to the waveguide is radiated toward the processing vessel; a microwave transmission plate configured to serve as a ceiling wall of the processing vessel and transmit the microwave passed from the microwave radiation holes of the planar antenna; a processing gas inlet unit configured to introduce a processing gas into the processing vessel; and a magnetic field generating unit positioned above the planar antenna and configured to generate a magnetic field within the processing vessel and control a property of plasma of the processing gas by the magnetic field, the plasma being generated by the microwave within the processing vessel.
    Type: Application
    Filed: February 26, 2008
    Publication date: April 15, 2010
    Applicant: TOKYO ELECTRON LIMITED
    Inventors: Hiraku Ishikawa, Yasuhiro Tobe
  • Publication number: 20100062612
    Abstract: The present invention is an aftertreatment method further applied to an amorphous carbon film to which a treatment including heating is performed after the film has been formed on a substrate. The treatment of preventing oxidation of the amorphous carbon film is performed immediately after the treatment including heating.
    Type: Application
    Filed: July 4, 2007
    Publication date: March 11, 2010
    Applicant: Tokyo Electron Limited
    Inventor: Hiraku Ishikawa
  • Publication number: 20100032838
    Abstract: Provided is an amorphous carbon film having a high elastic modulus and a low thermal contraction rate with a suppressed low dielectric constant, a semiconductor device including the amorphous carbon film and a technology for forming the amorphous carbon film. Since the amorphous carbon film is formed by controlling an additive amount of Si (silicon) during film formation, it is possible to form the amorphous carbon film having a high elastic modulus and a low thermal contraction rate with a suppressed dielectric constant as low as 3.3 or less. Accordingly, when the amorphous carbon film is used as a film in the semiconductor device, troubles such as a film peeling can be suppressed.
    Type: Application
    Filed: November 30, 2007
    Publication date: February 11, 2010
    Applicant: TOKYO ELECTRON LIMITED
    Inventors: Yoshiyuki Kikuchi, Yasuo Kobayashi, Kohei Kawamura, Toshihisa Nozawa, Hiraku Ishikawa
  • Patent number: 7658799
    Abstract: The present invention ensures a uniform concentration of a plasma excitation gas supplied to a plasma generation region while preventing the plasma excitation gas from turning into plasma before supply. In a plasma film forming apparatus for forming a film on a substrate using plasma, a flat-plate structure partitioning the inside of a processing container into two, upper and lower, regions is disposed between a high frequency wave supply unit and a substrate mounting unit in the processing container. The plasma excitation gas is supplied into the processing container from the lower side toward the region on the high frequency wave supply unit side, and the structure is formed with a source gas supply port for supplying a source gas for film formation in the region on the mounting unit side and an opening for allowing plasma generated in the region on the high frequency wave supply unit side to pass to the region on the mounting unit side.
    Type: Grant
    Filed: November 18, 2004
    Date of Patent: February 9, 2010
    Assignee: Tokyo Electron Limited
    Inventor: Hiraku Ishikawa
  • Publication number: 20090011602
    Abstract: Disclosed is a film forming method of an amorphous carbon film, including: disposing a substrate in a processing chamber; supplying a processing gas containing carbon, hydrogen and oxygen into the processing chamber; and decomposing the processing gas by heating the substrate in the processing chamber and depositing the amorphous carbon film on the substrate.
    Type: Application
    Filed: February 23, 2007
    Publication date: January 8, 2009
    Applicant: TOKYO ELECTRON LIMITED
    Inventors: Toshihisa Nozawa, Hiraku Ishikawa
  • Publication number: 20080213504
    Abstract: The present invention ensures a uniform concentration of a plasma excitation gas supplied to a plasma generation region while preventing the plasma excitation gas from turning into plasma before supply. In a plasma film forming apparatus for forming a film on a substrate using plasma, a flat-plate structure partitioning the inside of a processing container into two, upper and lower, regions is disposed between a high frequency wave supply unit and a substrate mounting unit in the processing container. The plasma excitation gas is supplied into the processing container from the lower side toward the region on the high frequency wave supply unit side, and the structure is formed with a source gas supply port for supplying a source gas for film formation in the region on the mounting unit side and an opening for allowing plasma generated in the region on the high frequency wave supply unit side to pass to the region on the mounting unit side.
    Type: Application
    Filed: November 18, 2004
    Publication date: September 4, 2008
    Applicant: Tokyo Electron Limited
    Inventor: Hiraku Ishikawa
  • Publication number: 20070062453
    Abstract: In the present invention, Ar gas for plasma generation is supplied to a plasma generation region and butyne gas having a multiple bond is supplied to a film formation region at a substrate side as source gas, inside of a process vessel in an insulating film forming apparatus. A microwave is supplied inside of the process vessel from a radial line slot antenna under a state in which a bias voltage is not applied to a substrate W. A plasma is thereby generated in the plasma generation region, the butyne gas in the film formation region is activated by the plasma, and an insulating film of amorphous carbon is formed on the substrate.
    Type: Application
    Filed: June 15, 2006
    Publication date: March 22, 2007
    Applicant: Tokyo Electron Limited
    Inventor: Hiraku Ishikawa
  • Patent number: 6716725
    Abstract: A wafer W is placed on a lower electrode 108 provided inside a processing chamber 102 of a CVD apparatus 100 and is heated to achieve a temperature equal to or greater than 350° C. and lower than 450° C. SiH4 and SiF4 with both their flow rates set at 20 sccm, B2H6 with its flow rate set at 7 sccm, O2 with its flow rate set at 200 sccm and Ar with its flow rate set at 400 sccm are introduced into the processing chamber 102, and a pressure within the range of 0.01 Torr˜10 Torr is set. 20 W/cm2 power at a frequency of 27.12 MHz and 10 W/cm2 power at a frequency of 400 kHz are respectively applied to an upper electrode 116 and the lower electrode 108 to generate plasma, and a layer insulating film 204 constituted of an SiOB film containing F is formed on the wafer W.
    Type: Grant
    Filed: September 1, 1999
    Date of Patent: April 6, 2004
    Assignee: Tokyo Electron Limited
    Inventor: Hiraku Ishikawa
  • Patent number: 6528410
    Abstract: A semiconductor device is manufactured by forming a first fluorine doped plasma silicon oxide film having a high fluorine concentration on first metallic interconnections formed on a semiconductor substrate surface, forming a second fluorine doped plasma silicon oxide film having a low fluorine concentration on the first film, and carrying out chemical machine polishing (CMP) only on the second fluorine doped plasma silicon oxide film.
    Type: Grant
    Filed: September 25, 2000
    Date of Patent: March 4, 2003
    Assignee: NEC Corporation
    Inventors: Tatsuya Usami, Hiraku Ishikawa
  • Patent number: 6319847
    Abstract: A method for manufacturing a semiconductor device comprises forming a silicon nitride film, a BPSG film, and a SOG silicon oxide film containing boron or phosphorous on a transistor element, thermally treating the resultant wafer in a pressurized steam ambient, and thermally treating the wafer in an inactive gas ambient. The first thermal treatment causes hydrolysis of the SOG film to form a gel state of the SOG film, whereas the second thermal treatment hardens the SOG film by removing H2O content in the SOG film. The phosphorous or boron in the SOG film weakens the bonds in —Si—O—Si— chains in the SOG film to assist the separation of the —Si—O—Si— chains and the planarization of the SOG film.
    Type: Grant
    Filed: March 30, 1998
    Date of Patent: November 20, 2001
    Assignee: NEC Corporation
    Inventor: Hiraku Ishikawa
  • Patent number: 6277706
    Abstract: In fabrication of a semiconductor device, firstly an isolation trench is formed on a substrate to isolate a plurality of semiconductor elements, and then a thermal oxide film is formed on a sidewall of the trench, whereupon a silicon oxide film is formed on the substrate by chemical vapor deposition. Finally the entire substrate is annealed in a high-pressure ambient.
    Type: Grant
    Filed: June 8, 1998
    Date of Patent: August 21, 2001
    Assignee: NEC Corporation
    Inventor: Hiraku Ishikawa
  • Patent number: 6239016
    Abstract: In a multilevel interconnection structure for a semiconductor device, lower level interconnections 3 are formed on an insulator film 2 formed on a substrate 1, and a silicon oxide film 4a is formed to cover the lower level interconnections 3 and to fill up a region between adjacent lower level interconnections 3, by means of a biased ECR-CVD process so that a cavity 5 is formed in the silicon oxide film 4a between the adjacent lower level interconnections 3. The silicon oxide film 4a is selectively removed from a tolerable region covering the extent in which a hole for the metal pillar 6 is allowed to deviate from a target lower level interconnection 3, and then, another silicon oxide 4b is formed to fill up the removed portion and to cover the first silicon oxide film. The metal pillar 6 is formed to extended through the silicon oxide film 4b filling the removed portion off silicon oxide film 4a, so as to reach the target lower level interconnection 3.
    Type: Grant
    Filed: August 17, 1998
    Date of Patent: May 29, 2001
    Assignee: NEC Corporation
    Inventor: Hiraku Ishikawa
  • Patent number: 6157083
    Abstract: A semiconductor device is manufactured by forming a first fluorine doped plasma silicon oxide film having a high fluorine concentration on first metallic interconnections formed on a semiconductor substrate surface, forming, a second fluorine doped plasma silicon oxide film having a low fluorine concentrations on the first film, and carrying out chemical machine polishing (CMP) only on the second fluorine doped plasma silicon oxide film.
    Type: Grant
    Filed: May 28, 1997
    Date of Patent: December 5, 2000
    Assignee: NEC Corporation
    Inventors: Tatsuya Usami, Hiraku Ishikawa
  • Patent number: 6071832
    Abstract: A method for manufacturing a semiconductor device having a high durability against a hot carrier problem and reliable transistor characteristics comprises the steps of forming a first silicon oxide film by atmospheric pressure CVD, forming a silicon nitride film by low pressure CVD to a thickness of 30 to 200 angstroms, and forming a silicon oxide film by biased electron cyclotron resonance CVD (ECR-CVD) using a silane gas as a source material while applying a radio frequency electric field to the substrate. The ECR-CVD silicon oxide film provides a sufficient amount of active hydrogen ions, and silicon nitride film allows movement of an adequate amount of the active hydrogen ions to thereby eliminate the hot carrier problem and recovery of transistor characteristics from the plasma damage.
    Type: Grant
    Filed: March 21, 1997
    Date of Patent: June 6, 2000
    Assignee: NEC Corporation
    Inventor: Hiraku Ishikawa
  • Patent number: 5894170
    Abstract: A semiconductor device includes (a) a semiconductor substrate, (b) a first interlayer insulating film formed on the semiconductor substrate, (c) a wiring layer having a thickness T and a width W1 greater than the thickness T formed on the first interlayer insulating film, the wiring layer being divided into a plurality of wiring layer segments each of which has a width W2 equal to or smaller than the thickness T, and (d) a second interlayer insulating film covering the wiring layer segments therewith. The semiconductor device ensures that even when a second interlayer insulating film is formed on a wiring layer by means of bias sputtering or bias CVD, projections are not formed on the second interlayer insulating film above the wiring layer. Namely, it is possible to completely planarize the second interlayer insulating film.
    Type: Grant
    Filed: August 15, 1997
    Date of Patent: April 13, 1999
    Assignee: NEC Corporation
    Inventor: Hiraku Ishikawa
  • Patent number: 5882975
    Abstract: The method of fabricating a semiconductor device includes the steps of (a) forming a metal film over a semiconductor substrate including a gate electrode on a surface thereof, an insulating sidewall covering a side surface of the gate electrode therewith, and source and drain regions formed therein, (b) forming a metal silicide film both on the gate electrode and the source and drain regions by thermally treating the semiconductor substrate to cause the metal film to react with silicon, and (c) etching out a non-silicided portion of the metal film, and further includes the step of (d) removing a portion of the non-silicided portion remaining non-etched or the metal film, by means of plasma-enhanced chemical vapor deposition. The step (d) may be carried out between the steps (a) and (b), between the steps (b) and (c), or after the step (c).
    Type: Grant
    Filed: September 12, 1996
    Date of Patent: March 16, 1999
    Assignee: NEC Corporation
    Inventor: Hiraku Ishikawa