Abstract: Example comparators as discussed herein may include a second stage coupled to provide an output in response to an intermediate voltage, a first stage coupled to provide the intermediate voltage in response to an input. The first stage including a pair of cascode devices coupled to a current mirror, a low gain input coupled to inputs of the first stage via first switches, and further selectively coupled to the pair of cascode devices via second switches, and a high gain input coupled to the first and second inputs of the first stage via the first switches, and further selectively coupled to the pair of cascode devices via fourth switches.

Abstract: An image sensor includes a pixel array including a plurality of pixels. A bit line coupled to a column of pixels is separated in to a plurality of electrically portions that are coupled to corresponding portions of rows of the pixel array. A first switching circuit of a readout circuit is coupled to the bit line. A first switching circuit is configured to couple a bit line current source to the bit line to provide a DC current coupled to flow through the bit line and through the first switching circuit during a readout operation of a pixel coupled to the bit line. A second switching circuit is configured to couple and ADC to the bit line during the readout operation of the pixel. Substantially none of the DC current provided by the bit line current source flows through the second switching circuit during the readout operation of the pixel.

Abstract: An image sensor includes a pixel array including a plurality of pixels. A bit line is coupled to a column of pixels of the pixel array. The bit line is separated in to a plurality of portions coupled to the column of pixels. The portions of the bit line are electrically isolated from one another. A readout circuit is coupled to a first portion of the bit line coupled to a first portion of rows of pixels from the column of pixels to read image data from the first portion of rows of pixels from the column of pixels. The readout circuit is further coupled to a second portion of the bit line coupled to a second portion of rows of pixels from the column of pixels to read image data from the second portion of rows of pixels from the column of pixels.

Abstract: A method includes reading a first analog reference signal from a first storage node in a dual conversion gain pixel, and converting the first analog reference signal to a first digital reference signal using a comparator coupled to the dual conversion gain pixel. The method also includes reading a first analog image signal from the first storage node, and converting the first analog image signal to a first digital image signal using the comparator. A second analog image signal may be read from the first storage node and a second storage node in the dual conversion gain pixel, and the second analog image signal may be converted to a second digital image signal. A second analog reference signal may be read from the first storage node and the second storage node, and the second analog reference signal may be converted to a second digital reference signal using the comparator.

Abstract: A hybrid bonded image sensor has a photodiode die with macrocells having at least one photodiode and a bond contact; a supporting circuitry die with multiple supercells, each supercell having at least one macrocell unit having a bond contact coupled to the bond contact of a macrocell of the photodiode die. Each macrocell unit lies within a supercell and has a reset transistor adapted to reset photodiodes of the macrocell of the photodiode die. Each supercell has at least one common source amplifier adapted to receive signal from the bond contact of a selected macrocell unit of the supercell, the common source amplifier coupled to drive a column line through a selectable source follower. In embodiments, the common source amplifiers of several supercells drive the selectable source follower through a distributed differential amplifier.

Abstract: A method includes reading a first analog reference signal from a first storage node in a dual conversion gain pixel, and converting the first analog reference signal to a first digital reference signal using a comparator coupled to the dual conversion gain pixel. The method also includes reading a first analog image signal from the first storage node, and converting the first analog image signal to a first digital image signal using the comparator. A second analog image signal may be read from the first storage node and a second storage node in the dual conversion gain pixel, and the second analog image signal may be converted to a second digital image signal. A second analog reference signal may be read from the first storage node and the second storage node, and the second analog reference signal may be converted to a second digital reference signal using the comparator.

Abstract: Apparatuses and method for an image sensor with increased analog to digital conversion range and reduced noise are described herein. An example method may include disabling a first auto-zero switch of a comparator, the first auto-zero switch coupled to auto-zero a reference voltage input of the comparator, adjusting an auto-zero offset voltage of a ramp voltage provided to the reference voltage input of the comparator, and disabling a second auto-zero switch of the comparator, the second auto-zero switch coupled to auto-zero a bitline input of the comparator.

Abstract: A photodiode is adapted to accumulate image charges in response to incident light. A transfer transistor is coupled between the photodiode and a floating diffusion to transfer the image charges from the photodiode to the floating diffusion. A transfer gate voltage controls the transmission of the image charges from a transfer receiving terminal of the transfer transistor to the floating diffusion. A reset transistor is coupled to supply a supply voltage to the floating diffusion. A source follower transistor is coupled to receive voltage of the floating diffusion from a gate terminal of the source follower and provide an amplified signal to a source terminal of the source follower. A row select transistor is coupled to enable the amplified signal from the SF source terminal and output the amplified signal to a bitline. A bitline enable transistor is coupled to link between the bitline and a bitline source node. The bitline source node is coupled to a blacksun voltage generator.

Abstract: A hybrid-bonded image sensor has a photodiode die with multiple macrocells; each macrocell has at least one photodiode and a coupling region. The coupling regions couple to a coupling region of a macrocell unit of a supporting circuitry die where they feed an input of an amplifier and a feedback capacitor. The feedback capacitor also couples to output of the amplifier, and the amplifier inverts between the input and the output. The method includes resetting a photodiode of the photodiode die; coupling signal from photodiode through the bond point to the supporting circuitry die to a feedback capacitor and to an input of the amplifier, the feedback capacitor also coupled to an inverting output of the amplifier; and amplifying the signal with the amplifier, where a capacitance of the feedback capacitor determines a gain of the amplifier.

Abstract: A pixel circuit for use in a high dynamic range (HDR) image sensor includes a photodiode and a floating diffusion is disposed in the first semiconductor wafer. A transfer transistor is disposed in the first semiconductor wafer and is adapted to be switched on to transfer the charge carriers photogenerated in the photodiode to the floating diffusion. An in-pixel capacitor is disposed in a second semiconductor wafer. The first semiconductor wafer is stacked with and coupled to the second semiconductor wafer. A dual floating diffusion (DFD) transistor is disposed in the first semiconductor wafer. The in-pixel capacitor is selectively coupled to the floating diffusion through the DFD transistor. The floating diffusion is set to low conversion gain in response to the in-pixel capacitor being coupled to the floating diffusion, and high conversion gain in response to the in-pixel capacitor being decoupled from the floating diffusion.

Abstract: A photodiode is adapted to accumulate image charges. A transfer transistor transfers the image charges to the floating diffusion. A source follower transistor is coupled to receive the voltage of the floating diffusion and provide an amplified signal. A row select transistor enables the amplified signal and outputs the amplified signal to a bitline. A first current source generator is coupled between the bitline and a ground. The first current source generator sinks current through a first cascode transistor, a first bias transistor and a second bias transistor. The first cascode transistor is biased by a cascode control voltage. The first bias transistor and the second bias transistor are biased by a bias control voltage.

Abstract: A photodiode is adapted to accumulate image charges in response to incident light. A transfer transistor is coupled between the photodiode and a floating diffusion to transfer the image charges accumulated in the photodiode to the floating diffusion. A reset transistor is coupled to supply a supply voltage to the floating diffusion. A source follower transistor is coupled to receive voltage of the floating diffusion from a SF gate terminal and provide an amplified signal to a source follower source terminal. A row select transistor is coupled to receive the amplified signal from the SF source terminal and output the amplified signal to a bitline. A bitline enable transistor controlled by a bitline enable voltage is coupled to link between the bitline and a bitline source node. The bitline is coupled to an idle voltage generator, a blacksun voltage generator, and a clamp voltage generator.

Abstract: Apparatuses and method for an image sensor with increased analog to digital conversion range and reduced noise are described herein. An example method may include disabling a first auto-zero switch of a comparator, the first auto-zero switch coupled to auto-zero a reference voltage input of the comparator, adjusting an auto-zero offset voltage of a ramp voltage provided to the reference voltage input of the comparator, and disabling a second auto-zero switch of the comparator, the second auto-zero switch coupled to auto-zero a bitline input of the comparator.

Abstract: A comparator includes a first stage coupled to compare a reference voltage to an image charge voltage signal. The first stage includes first and second NMOS input transistors coupled between an enabling transistor and respective first and second cascode devices to receive the reference voltage and the image charge voltage signal. A first auto-zero switch is between a gate of the first NMOS input transistor and a first node. The first node is between the first NMOS input transistor and the first cascode device. A second auto-zero switch is between a gate of the second NMOS input transistor and a second node. The second node is between the second cascode device and a second PMOS transistor. A voltage difference between the first and second nodes during an auto-zero period reduces an amount of kickback that occurs during an ADC period.

Abstract: A photodiode is adapted to accumulate image charges in response to incident light. The accumulate image charges are transferred to a floating diffusion, amplified, row selected and the amplified row selected signal is output to a bitline. A bitline enable transistor is coupled to link between the bitline and a bitline source node. A current source is coupled to connect between the bitline source node and a ground. The current source generator sinks adjustable current from the bitline source node to the ground through a cascode transistor and a bias transistor. A cascode hold capacitor is coupled between the cascode control voltage and the ground. A bias hold capacitor is coupled between the bias control voltage and the ground. A bias boost driver is coupled to control the cascode control voltage and the bias control voltage.

Abstract: Example comparators as discussed herein may include a second stage coupled to provide an output in response to an intermediate voltage, a first stage coupled to provide the intermediate voltage in response to an input. The first stage including a pair of cascode devices coupled to a current mirror, a low gain input coupled to inputs of the first stage via first switches, and further selectively coupled to the pair of cascode devices via second switches, and a high gain input coupled to the first and second inputs of the first stage via the first switches, and further selectively coupled to the pair of cascode devices via fourth switches.

Abstract: A pixel circuit for use in a high dynamic range (HDR) image sensor includes a photodiode and a floating diffusion is disposed in the first semiconductor wafer. A transfer transistor is disposed in the first semiconductor wafer and is adapted to be switched on to transfer the charge carriers photogenerated in the photodiode to the floating diffusion. An in-pixel capacitor is disposed in a second semiconductor wafer. The first semiconductor wafer is stacked with and coupled to the second semiconductor wafer. A dual floating diffusion (DFD) transistor is disposed in the first semiconductor wafer. The in-pixel capacitor is selectively coupled to the floating diffusion through the DFD transistor. The floating diffusion is set to low conversion gain in response to the in-pixel capacitor being coupled to the floating diffusion, and high conversion gain in response to the in-pixel capacitor being decoupled from the floating diffusion.

Abstract: Apparatuses and method for an image sensor with increased analog to digital conversion range and reduced noise are described herein. An example method may include disabling a first auto-zero switch of a comparator, the first auto-zero switch coupled to auto-zero a reference voltage input of the comparator, adjusting an auto-zero offset voltage of a ramp voltage provided to the reference voltage input of the comparator, and disabling a second auto-zero switch of the comparator, the second auto-zero switch coupled to auto-zero a bitline input of the comparator.

Abstract: There is provided a solid state imaging apparatus including a pixel array in which a plurality of unit pixels are arranged two-dimensionally. Each pixel includes a photoelectric conversion element, a transfer transistor which transfers a charge accumulated in the photoelectric conversion element to floating diffusion, a reset transistor which resets the charge of the floating diffusion, and an output transistor which outputs the charge of the floating diffusion. The floating diffusion of at least one of the plurality of unit pixels is electrically connected via the output transistor.

Abstract: A hybrid bonded image sensor has a photodiode die with macrocells having at least one photodiode and a bond contact; a supporting circuitry die with multiple supercells, each supercell having at least one macrocell unit having a bond contact coupled to the bond contact of a macrocell of the photodiode die. Each macrocell unit lies within a supercell and has a reset transistor adapted to reset photodiodes of the macrocell of the photodiode die. Each supercell has at least one common source amplifier adapted to receive signal from the bond contact of a selected macrocell unit of the supercell, the common source amplifier coupled to drive a column line through a selectable source follower. In embodiments, the common source amplifiers of several supercells drive the selectable source follower through a distributed differential amplifier.