Abstract: A computer-readable, non-transitory medium stores a program that causes a computer to execute detecting in a circuit-under-test, a change in a signal output from each circuit element on a transmission-side, during one clock cycle on a reception-side at an asynchronous location; inputting to each circuit element on the reception-side, a signal for which a change is not detected at a detection time among detection times when a signal change is detected at the detecting and replacing with a random logic value, a signal for which a change has been detected at a detection time among the detection times and inputting the random logic value to each circuit element on the reception-side, in an action triggered by a rising edge of an operation clock on the reception-side after the one clock cycle; and outputting for each circuit element on the reception-side, an operation result obtained based on input at the inputting.

Abstract: Conditions necessary to be satisfied for execution of each use case from a use case description indicative of a requirements specification of the design object are acquired. Then a state satisfying the conditions, from among a set of states represented in a finite state machine model indicative of a design specification of the design object are detected. A presence or absence of an undetected state in the set of states in accordance with the detection is determined and output.

Abstract: A non-transitory computer-readable recording medium stores therein a monitoring program that causes a computer monitoring data transmission from a transmission source device to a transmission destination device to execute a process that includes detecting data transmitted in a sequence that differs from a specified sequence; determining whether the sequence that differs is permissible by a specified constraint, if data transmitted at the sequence that differs is detected at the detecting; and outputting a determination result obtained at the determining.

Abstract: A computer-readable, non-transitory medium stores therein a verification support program that causes a computer to execute first detecting a state change in a circuit and occurring when input data is given to the circuit; second detecting a state change in the circuit and occurring when the input data partially altered is given to the circuit; determining whether a difference exists between a series of state changes detected at the first detecting and a series of state changes detected at the second detecting; and outputting a determination result obtained at the determining.

Abstract: A timing diagram is displayed on GUI of a timing diagram editing apparatus. Numerical information indicating the repetition number for which a waveform image within the arbitrary number of clocks is repeated is received, and the repetition number is determined based on the numerical information. A sequence image is displayed on GUI by replaying the waveform image with a continuous waveform image that is formed by repeating the waveform image for the determined repetition number of times.

Abstract: A verification support system for supporting logic verification of a circuit including a transmitter clock domain and a receiver clock domain, the transmitter clock domain, the system includes a detector for receiving data to be transmitted from the transmitter clock domain, and for detecting a fluctuation of the received data due to any timing fluctuation responsive to the transmitter clock. The system includes an identification unit to identify whether or not any fluctuation of the data determined by the detector is propagated to the output of the combinational logic on the basis of propagation of the received data through at least one of logic gates of the receiver clock domain to combinational logic so as to determine any fluctuation of data that is to be inputted to the combinational logic.

Abstract: A travel mode setting device for a hybrid car capable of ensuring the security against car theft and convenience when the car is lent to the third party. The hybrid car has travel drive sources and selectively uses one of them and can travel in one of travel modes. Authenticating means separately authenticate the car user and creates authentication results. Limiting means limits the travel modes to the usable travel modes according to the results of the authentication by the authenticating means.

Abstract: A secret key registration system which registers a secret key in a portable key device and vehicle. A first transformation equation is stored in a writer and the vehicle. A second transformation equation is stored in the portable key device and the vehicle. The writer transmits a registration code to the portable key device and generates intermediate data with the first transformation equation of the writer. The intermediate data is transmitted to the portable key device, which generates the secret key from the intermediate data with the second transformation equation. The portable key device transmits the registration code to the vehicle. The vehicle generates intermediate data from the registration code with the first transformation equation of the vehicle, and then generates the secret key from the intermediate data with the second transformation equation.

Abstract: A verification support system for supporting logic verification of a circuit including a transmitter clock domain and a receiver clock domain, the transmitter clock domain, the system includes a detector for receiving data to be transmitted from the transmitter clock domain, and for detecting a fluctuation of the received data due to any timing fluctuation responsive to the transmitter clock. The system includes an identification unit to identify whether or not any fluctuation of the data determined by the detector is propagated to the output of the combinational logic on the basis of propagation of the received data through at least one of logic gates of the receiver clock domain to combinational logic so as to determine any fluctuation of data that is to be inputted to the combinational logic.

Abstract: A logic simulation apparatus includes: a jitter detector generation section 21 that generates information concerning a jitter circuit for determining whether a time variation occurs in signal passing between a first circuit and a second circuit, the first circuit configured to output a signal with a clock output from a predetermined clock source and the second circuit configured to output a signal with a clock output from a clock source different from the above predetermined clock source; and a constraint solver generation section 22 that generates information concerning a solver that is configured to create a signal to be output at an observation point using a logical expression of an output signal of the second circuit and output, based on the logical expression and output signal of the jitter detector circuit, a signal constrained by the output signal of the jitter detector circuit and output signal of the second circuit.

Abstract: A charging system that facilitates tracking of a stolen charging subject. The charging subject includes a battery and has a unique identification code. A charging device is connected to the battery of the charging subject by an electric cable, and the battery is chargeable. A server is connected to either one of the charging device and the charging subject and manages charging of the charging subject with the charging device. The server is cable of registering an identification code of the charging subject. The server obtains the identification code from the charging subject, determined whether or not the obtained identification code is registered in the server, and transmits to the charging device a charging prohibition command for prohibiting charging of the charging subject with the charging device when the obtained identification code is not registered in the server.

Abstract: A charging system that significantly increases the anti-theft capability of a charging subject. The charging subject includes a rechargeable battery. The rechargeable battery of the charging subject is connected to a power supply of a house by power lines. An authentication management device performs authentication of the charging subject by communicating with the charging subject through the power lines and permits charging of the rechargeable battery with the power supply of the house only when the authentication is established.

Abstract: In a verification support device, a logical expression expressing an operation of a pattern generator can be acquired. The pattern generator includes a basic pattern generator, priority pattern generators, priority pattern selection conditions, and selector circuits. The selector circuits connect the basic pattern generator, the priority pattern generators, and the priority pattern selection conditions. Output of the basic pattern generator and outputs of the priority pattern generators are respectively connected to a signal input of a corresponding selector circuit. Outputs of the priority pattern selection conditions are connected to an ON/OFF control input of each selector circuit. An n-th selector circuit, among all selector circuits, is connected to an input terminal of a verification subject.

Abstract: Conditions necessary to be satisfied for execution of each use case from a use case description indicative of a requirements specification of the design object are acquired. Then a state satisfying the conditions, from among a set of states represented in a finite state machine model indicative of a design specification of the design object are detected. A presence or absence of an undetected state in the set of states in accordance with the detection is determined and output.

Abstract: In a verification supporting apparatus, when an obtaining unit obtains a verification scenario, a substituting unit substitutes an undefined value for a variable value in the verification scenario. A first executing unit executes a logic simulation using an input pattern. From a result of the logic simulation, a determining unit generates code-coverage upper-limit information. A setting unit sets input patterns by giving an arbitrary logic value to the variable value. A second executing unit executes a logic simulation using the input patterns set. A generating unit generates code coverage from the input patterns set. A calculating unit calculates a level of achievement of the code coverage with respect to the code-coverage upper-limit information.

Abstract: A portable device for preventing communication errors caused by disturbance such as noise. The portable device receives a first request signal from a communication controller and transmits a first response signal corresponding to the first request signal. A transmitter transmits the first response signal with a selected one of a plurality of frequencies. A transmission control unit transmits the first response signal from the transmitter with the one of the plurality of frequencies. The portable device further receives a second request signal from the communication control unit, which receives the first response signal. When the second request signal cannot be received, the portable device retransmits the first response signal from the transmitter with a frequency that differs from the one of the plurality of frequencies.

Abstract: A computer-readable medium stores a program which, when executed by a computer, causes the computer to execute functions including an extraction operation of extracting a sequence of character strings that are arranged in order of transitions and indicate meanings of transition conditions of transition branches that are taken to reach each transition state starting from an initial state from a finite state machine model of a hardware module which is a check subject; a generation operation of generating message information which means transitions that are taken to reach each transition state starting from the initial state by burying the sequence of character strings extracted by the extraction operation at a burying position for a partial character string which is part of a character string indicating each state of the finite state machine model; and an output operation of outputting the message information generated by the generation operation.

Abstract: A timing diagram is displayed on GUI of a timing diagram editing apparatus. Numerical information indicating the repetition number for which a waveform image within the arbitrary number of clocks is repeated is received, and the repetition number is determined based on the numerical information. A sequence image is displayed on GUI by replaying the waveform image with a continuous waveform image that is formed by repeating the waveform image for the determined repetition number of times.

Abstract: In a verification support device, a logical expression expressing an operation of a pattern generator can be acquired. The pattern generator includes a basic pattern generator, priority pattern generators, priority pattern selection conditions, and selector circuits. The selector circuits connect the basic pattern generator, the priority pattern generators, and the priority pattern selection conditions. Output of the basic pattern generator and outputs of the priority pattern generators are respectively connected to a signal input of a corresponding selector circuit. Outputs of the priority pattern selection conditions are connected to an ON/OFF control input of each selector circuit. An n-th selector circuit, among all selector circuits, is connected to an input terminal of a verification subject.

Abstract: A logical verification device includes an input unit, a generator, an input constraint information calculator, an output constraint information calculator, an input/output constraint information calculator, a determining unit, and a logic verifying unit. The input unit inputs hardware description information and interface specification description information concerning a communication procedure of a hardware module. The generator generates a finite state machine model concerning a status transition of signals input to and output from the hardware module, based on the interface specification description information. The input constraint information calculator calculates input constraint information using the generated finite state machine model.