Patents by Inventor Hiroaki Kawano
Hiroaki Kawano has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 9425302Abstract: A semiconductor device includes a source electrode portion and a drain electrode formed on a semiconductor stacked body so as to be at an interval from each other, and a gate electrode formed between the source electrode portion and the drain electrode at an interval from the source electrode portion and the drain electrode. The source electrode portion includes a first recess electrode being directly in contact with a two-dimensional electron gas layer formed in the first nitride semiconductor layer, and a surface electrode formed between the gate electrode and the first recess electrode and connected conductively to the two-dimensional electron gas layer. A source potential is applied to the surface electrode and the recess electrode, and a width of the surface electrode in a gate-source direction is 0.4 times or more a distance between a gate-side end of the surface electrode and a source-side end of the gate electrode.Type: GrantFiled: January 20, 2016Date of Patent: August 23, 2016Assignee: PANASONIC INTELLECTUAL PROPERTY MANAGEMENT CO., LTD.Inventors: Wataru Kanaga, Hiroaki Kawano, Shingo Matsuda, Katsuhiko Kawashima
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Patent number: 9378890Abstract: When a voltage two times a rated voltage is applied between a first external electrode and a second external electrode of a ceramic capacitor, the electric field intensity generated at portion connected between a first internal electrode and an end of a portion of a second external electrode at a side of a first side surface by a shortest distance FS is about 0.34 kV/mm or less.Type: GrantFiled: March 7, 2013Date of Patent: June 28, 2016Assignee: Murata Manufacturing Co., Ltd.Inventors: Hiroaki Kawano, Toshimi Oguni
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Publication number: 20160133739Abstract: A semiconductor device includes a source electrode portion and a drain electrode formed on a semiconductor stacked body so as to be at an interval from each other, and a gate electrode formed between the source electrode portion and the drain electrode at an interval from the source electrode portion and the drain electrode. The source electrode portion includes a first recess electrode being directly in contact with a two-dimensional electron gas layer formed in the first nitride semiconductor layer, and a surface electrode formed between the gate electrode and the first recess electrode and connected conductively to the two-dimensional electron gas layer. A source potential is applied to the surface electrode and the recess electrode, and a width of the surface electrode in a gate-source direction is 0.4 times or more a distance between a gate-side end of the surface electrode and a source-side end of the gate electrode.Type: ApplicationFiled: January 20, 2016Publication date: May 12, 2016Inventors: WATARU KANAGA, HIROAKI KAWANO, SHINGO MATSUDA, KATSUHIKO KAWASHIMA
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Publication number: 20150070083Abstract: A boosting circuit of charge pump type includes: charging portion for applying an input voltage to a first capacitor; double boosting portion for applying the input voltage to a second capacitor and applying a sum of the input voltage and a voltage across the first capacitor to an output capacitor in a first predetermined period after start of a boosting operation; and triple boosting portion for repeating in order, after end of the first predetermined period, a step of applying the sum of the input voltage and the voltage across the first capacitor to the second capacitor and a step of applying a sum of the voltage across the first capacitor and a voltage across the second capacitor to the output capacitor.Type: ApplicationFiled: November 17, 2014Publication date: March 12, 2015Applicant: LAPIS SEMICONDUCTOR CO., LTD.Inventor: Hiroaki KAWANO
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Patent number: 8890605Abstract: A boosting circuit includes an input terminal to which a power voltage is applied, a first capacitor connected to the input terminal, second and third capacitors, a first circuit including a first switch through which one end of the first capacitor is connected to one end of the second capacitor, and a second switch through which another end of the first capacitor is connected to another end of the second capacitor, a second circuit including a third switch through which the one end of the first capacitor is connected to the other end of the second capacitor, and a fourth switch through which the one end of the second capacitor is connected to one end of the third capacitor, the other end of the first capacitor being connected to another end of the third capacitor, and a fifth switch through which the one end of the first capacitor is connected to the one end of the third capacitor.Type: GrantFiled: January 28, 2013Date of Patent: November 18, 2014Assignee: LAPIS Semiconductor Co., Ltd.Inventor: Hiroaki Kawano
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Patent number: 8692619Abstract: Provided is a compact high frequency power amplifier having a high degree of freedom of design with respect to a gain fluctuation immediately after start-up of an amplifier. The high frequency power amplifier includes a speed-up circuit that transiently increases a reference voltage during rise of a control voltage to increase an amount of bias supplied to an amplification transistor from a bias circuit. The speed-up circuit includes a capacitor and an overshoot control circuit. The overshoot control circuit determines an increasing amount of the reference voltage when the reference voltage is transiently increased according to a charge amount charged in the capacitor, and the overshoot control circuit also determines a time constant in charging and discharging the capacitor.Type: GrantFiled: July 9, 2013Date of Patent: April 8, 2014Assignee: Panasonic CorporationInventors: Kazuya Wakita, Haruhiko Koizumi, Shingo Enomoto, Hiroaki Kawano
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Publication number: 20130293311Abstract: Provided is a compact high frequency power amplifier having a high degree of freedom of design with respect to a gain fluctuation immediately after start-up of an amplifier. The high frequency power amplifier includes a speed-up circuit that transiently increases a reference voltage during rise of a control voltage to increase an amount of bias supplied to an amplification transistor from a bias circuit. The speed-up circuit includes a capacitor and an overshoot control circuit. The overshoot control circuit determines an increasing amount of the reference voltage when the reference voltage is transiently increased according to a charge amount charged in the capacitor, and the overshoot control circuit also determines a time constant in charging and discharging the capacitor.Type: ApplicationFiled: July 9, 2013Publication date: November 7, 2013Inventors: KAZUYA WAKITA, HARUHIKO KOIZUMI, SHINGO ENOMOTO, HIROAKI KAWANO
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Publication number: 20130242462Abstract: When a voltage two times a rated voltage is applied between a first external electrode and a second external electrode of a ceramic capacitor, the electric field intensity generated at portion connected between a first internal electrode and an end of a portion of a second external electrode at a side of a first side surface by a shortest distance FS is about 0.34 kV/mm or less.Type: ApplicationFiled: March 7, 2013Publication date: September 19, 2013Applicant: Murata Manufacturing Co., Ltd.Inventors: Hiroaki KAWANO, Toshimi OGUNI
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Patent number: 8373498Abstract: A boosting circuit of charge pump type includes: charging portion for applying an input voltage to a first capacitor; double boosting portion for applying the input voltage to a second capacitor and applying a sum of the input voltage and a voltage across the first capacitor to an output capacitor in a first predetermined period after start of a boosting operation; and triple boosting portion for repeating in order, after end of the first predetermined period, a step of applying the sum of the input voltage and the voltage across the first capacitor to the second capacitor and a step of applying a sum of the voltage across the first capacitor and a voltage across the second capacitor to the output capacitor.Type: GrantFiled: March 18, 2011Date of Patent: February 12, 2013Assignee: Lapis Semiconductor Co., Ltd.Inventor: Hiroaki Kawano
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Publication number: 20120112832Abstract: The present invention provides a radio frequency switch and a radio frequency module having excellent distortion characteristics without causing a further insertion loss and a greater chip size. The radio frequency switch includes: input-output terminals which are for inputting and outputting a radio frequency signal; a basic switching unit provided between two of the input-output terminals; and a control terminal which receives a control voltage for controlling conduction and interruption of the basic switching unit. The basic switching unit includes field effect transistors (FETs) connected in multiple stages, each of the FETs being a meandered FET having a meandered gate electrode, and among the FETs, one of the FETs has a finger length shorter than finger lengths of rest of the FETs, the one of the FETs electrically located closest to one of the input-output terminals.Type: ApplicationFiled: November 8, 2011Publication date: May 10, 2012Applicant: PANASONIC CORPORATIONInventors: Hiroaki KAWANO, Haruhiko KOIZUMI, Kazuya WAKITA
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Publication number: 20110318426Abstract: An antibacterial agent of the present invention contains a metal-containing compound containing a metal other than aluminum, and a phosphorus-adsorbing material. A method of using an antibacterial agent of the present invention is a method for improving an antibacterial property of a metal-containing compound containing a metal other than aluminum, wherein the metal-containing compound and a phosphorus-adsorbing compound are used in combination. Thus, the present invention provides an antibacterial agent, and a method of using an antibacterial agent, wherein an antibacterial property of a metal-containing compound containing a metal other than aluminum, particularly a silver-containing compound, is improved significantly.Type: ApplicationFiled: September 10, 2009Publication date: December 29, 2011Applicants: OSAKA MUNICIPAL TECHNICAL RESEARCH INSTITUTE, KANEKA CORPORATIONInventors: Kenji Yamashita, Takashi Omoto, Kunihiko Moriyoshi, Hiroaki Kawano
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Publication number: 20110294444Abstract: A small switching device capable of implementing low-distortion characteristics formed on a semiconductor substrate to switch radio frequency signal paths is provided. An FET which is an example of switching device formed on a semiconductor substrate 109 includes two source/drain electrodes each of which is comb-shaped, at least two gate electrodes meandering between the two source/drain electrodes, and a conductive layer interposed between adjacent gate electrodes along the adjacent gate electrodes, in which a layer immediately underneath straight-line portions of the gate electrode is electrically separated from a layer immediately underneath angled portions of the gate electrode, each of the straight-line portions being in parallel with each of teeth of said two source/drain electrodes, and each of the angled portions connecting a pair of adjacent straight-line portions.Type: ApplicationFiled: May 23, 2011Publication date: December 1, 2011Applicant: PANASONIC CORPORATIONInventor: Hiroaki KAWANO
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Patent number: 8049559Abstract: A semiconductor device and a radio frequency circuit which are appropriate for multiband, multimode performance can be realized as a semiconductor device including a field-effect transistor formed on a semiconductor substrate, and include: ohmic electrodes serving as source and drain electrodes of the field-effect transistor, first and second Schottky electrodes provided between the ohmic electrodes and serving as gate electrodes of the field-effect transistor, and a third Schottky electrode provided and grounded between the first and second Schottky electrodes.Type: GrantFiled: July 9, 2010Date of Patent: November 1, 2011Assignee: Panasonic CorporationInventors: Junji Kaido, Masahiko Inamori, Shinichi Sonetaka, Hiroaki Kawano
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Publication number: 20110254616Abstract: A boosting circuit of charge pump type includes: charging portion for applying an input voltage to a first capacitor; double boosting portion for applying the input voltage to a second capacitor and applying a sum of the input voltage and a voltage across the first capacitor to an output capacitor in a first predetermined period after start of a boosting operation; and triple boosting portion for repeating in order, after end of the first predetermined period, a step of applying the sum of the input voltage and the voltage across the first capacitor to the second capacitor and a step of applying a sum of the voltage across the first capacitor and a voltage across the second capacitor to the output capacitor.Type: ApplicationFiled: March 18, 2011Publication date: October 20, 2011Applicant: OKI SEMICONDUCTOR CO., LTD.Inventor: Hiroaki Kawano
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Publication number: 20110025579Abstract: A semiconductor device which detects a power level of a radio-frequency signal includes: a switch FET including: a semiconductor layer; a source electrode and a drain electrode; a first gate electrode; a second gate electrode formed between the first gate electrode and the drain electrode and on the semiconductor layer, each of the first gate electrode and the second gate electrode being in Schottky contact with the semiconductor layer, and the source electrode receiving the radio-frequency signal; a resistor having one end electrically connected to the first gate electrode and an other end electrically connected to the drain electrode via a capacitor; and a power detection terminal electrically connected to a connecting point between the resistor and the capacitor.Type: ApplicationFiled: July 21, 2010Publication date: February 3, 2011Applicant: PANASONIC CORPORATIONInventors: Hiroaki KAWANO, Masahiko INAMORI, Shinichi SONETAKA, Junji KAIDO
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Publication number: 20110012680Abstract: A semiconductor device and a radio frequency circuit which are appropriate for multiband, multimode performance can be realized as a semiconductor device including a field-effect transistor formed on a semiconductor substrate, and include: ohmic electrodes serving as source and drain electrodes of the field-effect transistor, first and second Schottky electrodes provided between the ohmic electrodes and serving as gate electrodes of the field-effect transistor, and a third Schottky electrode provided and grounded between the first and second Schottky electrodes.Type: ApplicationFiled: July 9, 2010Publication date: January 20, 2011Applicant: PANASONIC CORPORATIONInventors: Junji KAIDO, Masahiko INAMORI, Shinichi SONETAKA, Hiroaki KAWANO
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Publication number: 20090055896Abstract: The present invention prevents a computer, which is infected by an unauthorized program such as a virus or spyware when the computer is brought out, from being connected with a secure network such as an intracompany LAN. When a user terminal is started, a connection with the intracompany LAN is attempted. Then, a network connection is temporarily stopped and an environment is compared with the one where the user terminal operated at a previous time. When there is no difference between both of the environments, the connection with the intracompany LAN is restored. However, when it is determined that the user terminal is connected with a network other than the intracompany LAN when the user terminal was operated at a previous time, an inspection for a virus or the like is executed by a USB memory where the latest anti-virus software is stored. After it is confirmed that the user terminal is safe, the connection with the intracompany LAN is restored.Type: ApplicationFiled: February 6, 2006Publication date: February 26, 2009Inventors: Osamu Aoki, Hiroaki Kawano
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Publication number: 20080289032Abstract: A computer system and appertaining control method allow, when an operation of a computer is controlled in accordance with an authentication result due to biological information using an externally connected device, setting up an authentication authority regarding a plurality of users, and setting up an authority per application and operation. The authentication condition on a biological authentication needed per application or operation is stored in the externally connected device along with the biological information of a plurality of users for whom biological authentication is needed. When using an external computer, it is connected to the externally connected device which performs biological authentication.Type: ApplicationFiled: August 4, 2005Publication date: November 20, 2008Inventors: Osamu Aoki, Hiroaki Kawano, Yojiro Sonoda, Haruko Ikeda
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Publication number: 20080072289Abstract: An unauthorized connection detection system is provided for detecting and addressing unauthorized connection to the network of an improper terminal device without having connection authority by such as spoofing by rewriting an IP address or a MAC address. The terminal device having the connection authority to the network has a dedicated monitoring program product stored therein, to transmit a notification when the connection to the network is started or scheduled correspondence while connected to the network. When a connection startup notification or the scheduled correspondence is not received from the monitoring program product while the connection to the network is permitted by verification of such as the IP address, due to the terminal device connected in an unauthorized manner by spoofing not being provided with the monitoring program product, processing for interrupting communication of the terminal device is performed.Type: ApplicationFiled: July 9, 2004Publication date: March 20, 2008Inventors: Osamu Aoki, Hiroaki Kawano
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Publication number: 20070180516Abstract: An unauthorized-operation-judgment system judges whether an operation received by a computer is an unauthorized operation by referencing a profile to find a peculiar action. This system can handle an unauthorized operation due to a change of a computer be an authorized user and unauthorized operation by a new user whose user profile is not yet created. When a user executes a certain operation, the operation tendency and th operation tendency executed by the user are learned to create a node profile and a user, profile, which are stored in a node-profile-state table and a user-profile-state table of each user, respectively. The node profile and the user profile thus created are referenced so as to perform deviation calculation between the operation received and the normal operation pattern, thereby judging whether the operation is peculiar and calculating the possibility of an unauthorized operation as a score valve.Type: ApplicationFiled: May 13, 2004Publication date: August 2, 2007Inventors: Osamu Aoki, Masaharu Shirasugi, Kenichi Koide, Hiroaki Kawano