Patents by Inventor Hirofumi Yamashita

Hirofumi Yamashita has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11830104
    Abstract: An image processing apparatus includes a first signal processing unit for generating a first image of a first angle of view from an image captured by a camera attached to a vehicle body, and an image superimposing unit for superimposing an image representing a part of the vehicle body on the first image.
    Type: Grant
    Filed: November 21, 2019
    Date of Patent: November 28, 2023
    Assignee: Sony Semiconductor Solutions Corporation
    Inventors: Yutaro Yamashita, Hirofumi Owaki, Takuya Yamaguchi
  • Publication number: 20230369374
    Abstract: Image sensor structures are provided. In some embodiments, an image sensor structure is provided. The image sensor structure includes a substrate and a light-sensing region formed in the substrate and extending from the top surface to the bottom surface of the substrate. The image sensor structure further includes a first isolation structure extending from the top surface of the substrate to a middle portion of the substrate and a second isolation structure formed extending from the bottom surface of the substrate to the middle portion of the substrate and in contact with the first isolation structure. The image sensor structure further includes a gate structure overlapping the light-sensing region, the first isolation structure, and the second isolation structure and a cap layer overlapping the gate structure, the light-sensing region, the first isolation structure, and the second isolation structure in a top view.
    Type: Application
    Filed: July 27, 2023
    Publication date: November 16, 2023
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Yuichiro YAMASHITA, Chun-Hao CHUANG, Hirofumi SUMI
  • Patent number: 11798972
    Abstract: An imaging element according to an embodiment of the present disclosure includes: a first substrate, a second substrate, and a third substrate that are stacked in this order. The first substrate including a sensor pixel that performs photoelectric conversion and the second substrate including a readout circuit are electrically coupled to each other by a first through wiring line provided in an interlayer insulating film. The second substrate and the third substrate including a logic circuit are electrically coupled to each other by a junction between pad electrodes or a second through wiring line penetrating through a semiconductor substrate.
    Type: Grant
    Filed: December 12, 2022
    Date of Patent: October 24, 2023
    Assignee: Sony Semiconductor Solutions Corporation
    Inventors: Keiichi Nakazawa, Yoshiaki Kitano, Hirofumi Yamashita, Minoru Ishida
  • Publication number: 20230315484
    Abstract: Systems, methods, and other embodiments described herein relate to validating programs of a computing system in a vehicle by tracking a boot sequence. In one embodiment, a method includes, responsive to detecting initiation of a boot sequence in a computing system, tracking characteristics of programs executing as part of the boot sequence. The method includes determining whether the programs correspond with a program execution graph (PEG) by comparing the characteristics of the programs as the programs boot with the PEG. The method includes providing a response to thwart a malicious program when the boot sequence does not match the PEG.
    Type: Application
    Filed: April 5, 2022
    Publication date: October 5, 2023
    Inventors: Carlos Mora-Golding, Ameer Kashani, Gopalakrishnan Iyer, Hirofumi Yamashita
  • Patent number: 11776983
    Abstract: Image sensor structures are provided. The image sensor structure includes a substrate and a light-sensing region formed in the substrate. The image sensor structure further includes a first isolation structure surrounding the light sensing region and having an opening region in a top view and a second isolation structure formed in the substrate. In addition, the second isolation structure surrounds the light-sensing region and vertically overlaps both the opening region and the first isolation structure. The image sensor structure further includes a first gate structure formed over the substrate and overlapping the opening region, the first isolation structure, and the second isolation structure.
    Type: Grant
    Filed: April 7, 2021
    Date of Patent: October 3, 2023
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Yuichiro Yamashita, Chun-Hao Chuang, Hirofumi Sumi
  • Publication number: 20230306110
    Abstract: Systems, methods, and other embodiments described herein relate to adaptable canary values. In one embodiment, a method includes acquiring state information about a program executing within a vehicle. The state information specifies at least a security level of segments of the program. The method includes, responsive to the program satisfying a generating threshold, generating a canary value according to the state information. The method includes inserting the canary value into a memory address associated with the program.
    Type: Application
    Filed: March 8, 2022
    Publication date: September 28, 2023
    Inventors: Ameer Kashani, Gopalakrishnan Iyer, Carlos Mora-Golding, Hirofumi Yamashita
  • Publication number: 20230308070
    Abstract: A signal generation unit 2, a DA converter 3, variable attenuators 40, 42, 44, and 46, a measurement unit 6 that detects a level of the signal attenuated by the variable attenuators 40, 42, 44, and 46 and passed through one or more semiconductor components, a switch 48 that switches between an Internal path through which the signal attenuated by the variable attenuator 40, 42, 44, and 46 is transmitted to the measurement unit 6 and an External path through which the signal attenuated by the variable attenuator 40, 42, 44, and 46 is output from an output terminal 10, and a control unit 7 that obtains a correction value of an attenuation amount of the variable attenuators 40, 42, and 44 with the Internal path and obtains a correction value of an attenuation amount of the variable attenuator 46 with the External path.
    Type: Application
    Filed: December 21, 2022
    Publication date: September 28, 2023
    Inventors: Hirofumi ONO, Koji YAMASHITA, Shinichi ITO
  • Publication number: 20230289435
    Abstract: Systems, methods, and other embodiments described herein relate to improving incident response within a vehicle environment. In one embodiment, a method includes, responsive to detecting an attack on a threatened component of a computing system, gathering information about the threatened component, including at least a dependency list that specifies related components to the threatened component. The method includes determining a risk score for the attack according to a risk level associated with the attack, a risk type of the threatened component, and combined risks associated with compromising the related components. The method includes providing a report specifying information about the attack, including at least the risk score.
    Type: Application
    Filed: March 10, 2022
    Publication date: September 14, 2023
    Inventors: Carlos Mora-Golding, Ameer Kashani, Gopalakrishnan Iyer, Hirofumi Yamashita
  • Publication number: 20230290802
    Abstract: Provided is an imaging apparatus including an imaging unit having a plurality of pixels, the pixels each having: a conversion element converting incident light into photoelectrons; a floating diffusion layer electrically connected to the conversion element and converting the photoelectrons into a voltage signal; a differential amplifier circuit electrically connected to the floating diffusion layer, including an amplifier transistor to which a potential of the floating diffusion layer is input, and amplifying the potential of the floating diffusion layer; a feedback transistor electrically connected to the amplifier transistor and initializing the differential amplifier circuit; a clamp capacitance connected in series between the floating diffusion layer and the amplifier transistor; and a reset transistor connected in parallel between the floating diffusion layer and the clamp capacitance and initializing the potential of the floating diffusion layer.
    Type: Application
    Filed: February 27, 2023
    Publication date: September 14, 2023
    Inventor: Hirofumi Yamashita
  • Publication number: 20230246720
    Abstract: A signal generation unit 2, a DA converter 3, variable attenuators 40, 42, 44, and 46 that attenuate an analog signal converted by the DA converter 3, a measurement unit 6 that detects a level of the signal attenuated by the variable attenuators 40, 42, 44, and 46 and passed through one or more semiconductor components, and a control unit 7 that obtains a value of a step error, which is a correction value of an attenuation amount of the variable attenuators 40, 42, 44, and 46 in each of a plurality of steps obtained by dividing a maximum value of the attenuation amount of the variable attenuators 40, 42, 44, and 46 by a variation amount, which is a predetermined attenuation amount are included.
    Type: Application
    Filed: December 21, 2022
    Publication date: August 3, 2023
    Inventors: Hirofumi ONO, Koji YAMASHITA, Shinichi ITO
  • Publication number: 20230233823
    Abstract: Provided is a micro-needle array in which all fine needles can be more easily inserted into the skin regardless of positions where the fine needles of the micro-needle array are located on a substrate. The micro-needle array includes: a substrate; and a plurality of micro-needles arranged on one surface of the substrate. Tip parts of the plurality of micro-needles have a height difference, and the micro-needles have a needle length of 80 ?m or more and 2000 ?m or less. The height difference of the plurality of micro-needles is preferably based on unevenness of the substrate.
    Type: Application
    Filed: May 24, 2021
    Publication date: July 27, 2023
    Inventors: Ying-shu Quan, Ying-zhe Li, Kenji Kajiyama, Mio Saito, Hirofumi Yamashita, Fumio Kamiyama
  • Patent number: 11689192
    Abstract: A signal generation unit 2, a DA converter 3, variable attenuators 40, 42, 44, and 46 that attenuate the analog signal converted by the DA converter 3, a measurement unit 6 that detects a level of the signal attenuated by the variable attenuators 40, 42, 44, and 46 and passed through one or more semiconductor components, and a control unit 7 that obtains a value of a step error, which is a correction value of an attenuation amount of the variable attenuators 40, 42, 44, and 46 in each of a plurality of steps obtained by dividing a maximum value of the attenuation amount of the variable attenuators 40, 42, 44, and 46 by a variation amount, which is a predetermined attenuation amount are included.
    Type: Grant
    Filed: December 21, 2022
    Date of Patent: June 27, 2023
    Assignee: ANRITSU CORPORATION
    Inventors: Hirofumi Ono, Koji Yamashita, Shinichi Ito
  • Publication number: 20230154964
    Abstract: An imaging element according to an embodiment of the present disclosure includes: a first substrate, a second substrate, and a third substrate that are stacked in this order. The first substrate including a sensor pixel that performs photoelectric conversion and the second substrate including a readout circuit are electrically coupled to each other by a first through wiring line provided in an interlayer insulating film. The second substrate and the third substrate including a logic circuit are electrically coupled to each other by a junction between pad electrodes or a second through wiring line penetrating through a semiconductor substrate.
    Type: Application
    Filed: December 12, 2022
    Publication date: May 18, 2023
    Applicant: SONY SEMICONDUCTOR SOLUTIONS CORPORATION
    Inventors: Keiichi NAKAZAWA, Yoshiaki KITANO, Hirofumi YAMASHITA, Minoru ISHIDA
  • Patent number: 11610931
    Abstract: Provided is an imaging apparatus including an imaging unit having a plurality of pixels, the pixels each having: a conversion element converting incident light into photoelectrons; a floating diffusion layer electrically connected to the conversion element and converting the photoelectrons into a voltage signal; a differential amplifier circuit electrically connected to the floating diffusion layer, including an amplifier transistor to which a potential of the floating diffusion layer is input, and amplifying the potential of the floating diffusion layer; a feedback transistor electrically connected to the amplifier transistor and initializing the differential amplifier circuit; a clamp capacitance connected in series between the floating diffusion layer and the amplifier transistor; and a reset transistor connected in parallel between the floating diffusion layer and the clamp capacitance and initializing the potential of the floating diffusion layer.
    Type: Grant
    Filed: February 17, 2022
    Date of Patent: March 21, 2023
    Assignee: Sony Semiconductor Solutions Corporation
    Inventor: Hirofumi Yamashita
  • Patent number: 11600651
    Abstract: An imaging element according to an embodiment of the present disclosure includes: a first substrate, a second substrate, and a third substrate that are stacked in this order. The first substrate including a sensor pixel that performs photoelectric conversion and the second substrate including a readout circuit are electrically coupled to each other by a first through wiring line provided in an interlayer insulating film. The second substrate and the third substrate including a logic circuit are electrically coupled to each other by a junction between pad electrodes or a second through wiring line penetrating through a semiconductor substrate.
    Type: Grant
    Filed: December 27, 2018
    Date of Patent: March 7, 2023
    Assignee: SONY SEMICONDUCTOR SOLUTIONS CORPORATION
    Inventors: Keiichi Nakazawa, Yoshiaki Kitano, Hirofumi Yamashita, Minoru Ishida
  • Publication number: 20230067160
    Abstract: To provide a solid-state imaging device and an electronic apparatus capable of achieving both of a high dynamic range operation and an auto focus operation in a pixel configuration in which a plurality of unit pixels includes two or more subpixels. There is provided a solid-state imaging device including: a first pixel separation region that separates a plurality of unit pixels including two or more subpixels; a second pixel separation region that separates each of the plurality of unit pixels separated by the first pixel separation region; and an overflow region that causes signal charges accumulated in the subpixels to overflow to at least one of adjacent subpixels, in which the overflow region is formed between a first subpixel and a second subpixel.
    Type: Application
    Filed: November 8, 2022
    Publication date: March 2, 2023
    Inventors: HIROFUMI YAMASHITA, SHOHEI SHIMADA, YUSUKE OTAKE, YUSUKE TANAKA, TOSHIFUMI WAKANO
  • Patent number: 11569279
    Abstract: There is provided a solid-state imaging device that includes a photoelectric conversion unit, a transfer gate, a floating diffusion unit, and a transistor. The photoelectric conversion unit produces a charge according to incident light. The transfer gate has a columnar shape having an opening that is continuous in a vertical direction, and transfers the charge from the photoelectric conversion unit. The floating diffusion unit is formed extending to a region surrounded by the opening of the transfer gate, and converts the transferred charge into a voltage signal. The transistor is electrically connected to the floating diffusion unit via a diffusion layer.
    Type: Grant
    Filed: September 14, 2018
    Date of Patent: January 31, 2023
    Assignee: SONY SEMICONDUCTOR SOLUTIONS CORPORATION
    Inventors: Hironobu Fukui, Hirofumi Yamashita
  • Patent number: 11523078
    Abstract: Provided is a solid-state imaging device and an electronic apparatus capable of achieving both of a high dynamic range operation and an auto focus operation in a pixel configuration in which a plurality of unit pixels includes two or more subpixels. The solid-state imaging device includes a first pixel separation region that separates a plurality of unit pixels including two or more subpixels, a second pixel separation region that separates each of the plurality of unit pixels separated by the first pixel separation region and an overflow region that causes signal charges accumulated in the subpixels to overflow to at least one of adjacent subpixels, in which the overflow region is formed between a first subpixel and a second subpixel.
    Type: Grant
    Filed: July 8, 2019
    Date of Patent: December 6, 2022
    Assignee: SONY SEMICONDUCTOR SOLUTIONS CORPORATION
    Inventors: Hirofumi Yamashita, Shohei Shimada, Yusuke Otake, Yusuke Tanaka, Toshifumi Wakano
  • Publication number: 20220359602
    Abstract: A second substrate including a pixel circuit that outputs a pixel signal on a basis of electric charges outputted from the sensor pixel and a third substrate including a processing circuit that performs signal processing on the pixel signal are provided. The first substrate, the second substrate, and the third substrate are stacked in this order. A semiconductor layer including the pixel circuit is divided by an insulating layer. The insulating layer divides the semiconductor layer to allow a center position of a continuous region of the semiconductor layer or a center position of a region that divides the semiconductor layer to correspond to a position of an optical center of the sensor pixel, in at least one direction on a plane of the sensor pixel perpendicular to an optical axis direction.
    Type: Application
    Filed: June 23, 2020
    Publication date: November 10, 2022
    Applicant: SONY SEMICONDUCTOR SOLUTIONS CORPORATION
    Inventor: Hirofumi YAMASHITA
  • Publication number: 20220271070
    Abstract: There is provided a solid-state imaging device including: a first semiconductor layer including a photoelectric converter and an electric charge accumulation section for each pixel, the electric charge accumulation section in which a signal electric charge generated in the photoelectric converter is accumulated; a pixel separation section that is provided in the first semiconductor layer, and partitions a plurality of the pixels from each other; a second semiconductor layer that is provided with a pixel transistor and is stacked on the first semiconductor layer, the pixel transistor that reads the signal electric charge of the electric charge accumulation section; and a first shared coupling section that is provided between the second semiconductor layer and the first semiconductor layer, and is provided to straddle the pixel separation section and is electrically coupled to a plurality of the electric charge accumulation sections.
    Type: Application
    Filed: June 26, 2020
    Publication date: August 25, 2022
    Applicant: SONY SEMICONDUCTOR SOLUTIONS CORPORATION
    Inventors: Keiichi NAKAZAWA, Koichiro ZAITSU, Nobutoshi FUJII, Yohei HIURA, Shigetaka MORI, Shintaro OKAMOTO, Keiji OHSHIMA, Shuji MANDA, Junpei YAMAMOTO, Yui YUGA, Shinichi MIYAKE, Tomoki KAMBE, Ryo OGATA, Tatsuki MIYAJI, Shinji NAKAGAWA, Hirofumi YAMASHITA, Yasushi HAMAMOTO, Naohiko KIMIZUKA