Patents by Inventor Hirofumi Yamashita

Hirofumi Yamashita has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8542304
    Abstract: According to one embodiment, a solid-state imaging device includes first and second pixel portions, first and second transfer transistors, first and second accumulation portions, an element isolation region, first and second amplifier transistors, and a first and second signal lines. The first and second pixel portions include photoelectric conversion elements, respectively. The first and second transfer transistors transfer first and second charges photoelectrically converted by the first and second pixel portions, respectively. The first and second accumulation portions are interposed between the first and second pixel portions, and accumulate the first and second charges, respectively. The element isolation region is interposed between the first and second accumulation portions. The first and second amplifier transistors amplify voltages generated in accordance with the first and second charges accumulated in the first and second accumulation portions, respectively.
    Type: Grant
    Filed: March 21, 2011
    Date of Patent: September 24, 2013
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Motohiro Maeda, Hirofumi Yamashita, Nagataka Tanaka
  • Patent number: 8476573
    Abstract: According to one embodiment, a solid-state imaging device with a plurality of light-receiving layers for acquiring different color signals stacked one on top of another in the optical direction. Each of the light-receiving layers includes a photoelectric conversion part that receives light entering the back side of the layer and generates signal charges and a read transistor that is provided on the front side of the layer and reads the signal charges generated at the photoelectric conversion part. A semiconductor layer is stacked via an insulating film on the front side of the top layer of the plurality of light-receiving layers. At the semiconductor layer, there is provided a signal scanning circuit which processes a signal read by each of the read transistors and outputs a different color signal from each of the light-receiving layers to the outside.
    Type: Grant
    Filed: August 23, 2010
    Date of Patent: July 2, 2013
    Assignee: Kabushiki Kaisha Toshiba
    Inventor: Hirofumi Yamashita
  • Publication number: 20130119238
    Abstract: According to one embodiment, a solid-state imaging device includes a pixel region which is configured such that a photoelectric conversion unit and a signal scanning circuit unit are included in a semiconductor substrate, and a matrix of unit pixels is disposed, and a driving circuit region which is configured such that a device driving circuit for driving the signal scanning circuit unit is disposed on the semiconductor substrate, wherein the photoelectric conversion unit is provided on a back surface side of the semiconductor substrate, which is opposite to a front surface of the semiconductor substrate where the signal scanning circuit unit is formed, and the unit pixel includes an insulation film which is provided in a manner to surround a boundary part with the unit pixel that neighbors and defines a device isolation region.
    Type: Application
    Filed: December 5, 2012
    Publication date: May 16, 2013
    Inventor: Hirofumi YAMASHITA
  • Patent number: 8435823
    Abstract: According to one embodiment, a method of manufacturing a back-illuminated solid-state imaging device including forming a mask with apertures corresponding to a pixel pattern on the surface of a semiconductor layer, implanting second-conductivity-type impurity ions into the semiconductor layer from the front side of the layer to form second-conductivity-type photoelectric conversion parts and forming a part where no ion has been implanted into a pixel separation region, forming at the surface of the semiconductor layer a signal scanning circuit for reading light signals obtained at the photoelectric conversion parts after removing the mask, and removing the semiconductor substrate and a buried insulating layer from the semiconductor layer after causing a support substrate to adhere to the front side of the semiconductor layer.
    Type: Grant
    Filed: August 2, 2010
    Date of Patent: May 7, 2013
    Assignee: Kabushiki Kaisha Toshiba
    Inventor: Hirofumi Yamashita
  • Patent number: 8416327
    Abstract: A plurality of image pickup areas is disposed in a semiconductor substrate so as to be separate from one another. Disposed in each of the image pickup areas are rows and columns of unit pixels, each of which includes a photoelectric conversion part and signal scanning circuit parts. Formed on the image pickup areas of the semiconductor substrate and opposite a interconnect layer formed on the semiconductor substrate are optical image formation lenses used for forming object images. Further, between the image pickup areas on the semiconductor substrate is a driving circuit area in which driving circuits are formed for driving the signal scanning circuit parts.
    Type: Grant
    Filed: September 18, 2009
    Date of Patent: April 9, 2013
    Assignee: Kabushiki Kaisha Toshiba
    Inventor: Hirofumi Yamashita
  • Patent number: 8390707
    Abstract: According to one embodiment, a solid-state imaging device includes a pixel region which is configured such that a photoelectric conversion unit and a signal scanning circuit unit are included in a semiconductor substrate, and a matrix of unit pixels is disposed, and a driving circuit region which is configured such that a device driving circuit for driving the signal scanning circuit unit is disposed on the semiconductor substrate, wherein the photoelectric conversion unit is provided on a back surface side of the semiconductor substrate, which is opposite to a front surface of the semiconductor substrate where the signal scanning circuit unit is formed, and the unit pixel includes an insulation film which is provided in a manner to surround a boundary part with the unit pixel that neighbors and defines a device isolation region.
    Type: Grant
    Filed: August 27, 2010
    Date of Patent: March 5, 2013
    Assignee: Kabushiki Kaisha Toshiba
    Inventor: Hirofumi Yamashita
  • Patent number: 8319873
    Abstract: A solid-state imaging device includes a photodiode array having a plurality of photodiodes, read transistors each having one terminal and the other terminal of a current path, one terminal of the current path being connected to one of four photodiodes corresponding to two photodiodes adjacent in a row direction and two photodiodes adjacent in a column direction, the other terminal of the current path being connected in common to a first node, the first node provided as a set of four photodiodes being in a floating-state, read control lines to connect the gate of the read transistor corresponding to each set of the read transistors in common, and independently supplied with a read signal, and vertical signal lines supplied with a signal converted by two photodiodes adjacent in a row direction of the photodiodes for an independent period within one horizontal blanking period of image scanning.
    Type: Grant
    Filed: July 16, 2009
    Date of Patent: November 27, 2012
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Hirofumi Yamashita, Junji Naruse
  • Publication number: 20120267695
    Abstract: According to one embodiment, a solid-state imaging device includes a pixel array unit arrayed unit pixels in a matrix pattern, each of the unit pixels including a photoelectric conversion element and a floating diffusion region, signal lines provided for respective pixel columns and configured to read signals from the unit pixels, capacitive interconnections provided for the respective pixel columns and capacitively coupled to the floating diffusion regions, first switch elements configured to switch a connection state between the signal lines and the capacitive interconnections, and second switch elements configured to switch a connection state between the capacitive interconnections and a power supply line.
    Type: Application
    Filed: March 23, 2012
    Publication date: October 25, 2012
    Inventor: Hirofumi YAMASHITA
  • Publication number: 20120199894
    Abstract: According to one embodiment, a solid-state imaging device includes a first element formation region surrounded by an element isolation region in a semiconductor substrate having a first and a second surface, an upper element isolation layer on the first surface in the element formation region, a lower element isolation layer between the second surface and the upper element isolation layer, a first photodiode in the element formation region, a floating diffusion in the element formation region, and a first transistor disposed between the first photodiode and the floating diffusion. A side surface of the lower element isolation layer protrudes closer to the transistor than a side surface of the upper element isolation layer.
    Type: Application
    Filed: February 3, 2012
    Publication date: August 9, 2012
    Inventors: Shogo FURUYA, Hirofumi Yamashita, Tetsuya Yamaguchi
  • Patent number: 8144928
    Abstract: A method includes a pixel-value correction step that causes an average and variance of pixel values in a second subregion inclusive of a first subregion inclusive of being formed of only one pixel in a comparison image resolved into pixels to match with an average and variance of pixel values in a subregion corresponding to the second subregion on a reference image similarly resolved into pixels, thereby to execute calculation that corrects the pixel value of each pixel in the first subregion in the comparison image by recognizing each of subregions to be the first subregion, the subregions being obtained when the comparison image is divided into the subregions respectively inclusive of being formed of only one pixel; and a change determination step that determines the presence/absence of a change in the object by comparing the reference image with a post-correction comparison image acquired through the pixel value correction step.
    Type: Grant
    Filed: November 22, 2006
    Date of Patent: March 27, 2012
    Assignees: Kansai Coke and Chemicals Co., Ltd., Yamatake Corporation
    Inventors: Ryoji Ohba, Hirofumi Yamashita, Isao Hayashi
  • Publication number: 20110259968
    Abstract: A throttle passage is formed by providing a step portion by expanding an open end side of a refrigerant passage of the refrigeration cycle, placing a throttle passage member on the step portion, and squashing the throttle passage member using a columnar squashing jig to widen a rim of the outer periphery, thereby causing the throttle passage member to be fixedly engaged to an inner wall of the refrigerant passage. The throttle passage member has a simple shape formed only by machining a circular plate having a hole formed in a center thereof into a truncated conical shape, and therefore can be made at low cost. Throttle passage member is only squashed to be fixedly engaged in the refrigerant passage, and therefore can be easily formed.
    Type: Application
    Filed: April 18, 2011
    Publication date: October 27, 2011
    Applicant: TGK CO., LTD.
    Inventors: Takanao Kumakura, Hirofumi Yamashita
  • Publication number: 20110257273
    Abstract: A low-molecular-weight polyester resin which can elasticize a resin suitably and can be used for various purposes, various resins obtained by using the resin, and the purposes thereof. The polyester resin is obtained by polymerizing a monomer composition containing 10 to 90 weight % of a linear dicarboxylic acid and/or diol having at least 8 carbon atoms (I), 5 to 80 weight % of a branched dicarboxylic acid and/or diol having at least 4 carbon atoms (II-1) and/or 2 to 40 weight % of at least one polyfunctional monomer (II-2) selected from the group consisting of polyols, polycarboxylic acids and hydroxycarboxylic acids having 3 or more functional groups respectively and which has the number average molecular weight of 500 to 5000 and is amorphous.
    Type: Application
    Filed: April 11, 2011
    Publication date: October 20, 2011
    Applicant: NIPPON BEE CHEMICAL CO., LTD.
    Inventors: Naoya YABUUCHI, Hirofumi YAMASHITA, Koji MORITA, Yasunori MIWA
  • Patent number: 8031250
    Abstract: A solid-state imaging device includes a pixel array section which includes a plurality of pixels arranged in a two-dimensional manner, and a vertical scanning circuit which successively performs selection and scanning for a plurality of rows of the pixel array section. Each of the pixels includes a photoelectric conversion element, a transfer transistor which transfers a signal charge of the photoelectric conversion element to a detecting section, a reset transistor which sets a voltage of the detecting section to a voltage of a power supply terminal, and an amplifying transistor which amplifies and reads a signal charge of the detecting section. A first voltage which is lower than a power supply voltage is applied to the detecting section, in a charge-storage period of the photoelectric conversion element.
    Type: Grant
    Filed: February 7, 2008
    Date of Patent: October 4, 2011
    Assignee: Kabushiki Kaisha Toshiba
    Inventor: Hirofumi Yamashita
  • Publication number: 20110234875
    Abstract: According to one embodiment, a solid-state imaging device includes first and second pixel portions, first and second transfer transistors, first and second accumulation portions, an element isolation region, first and second amplifier transistors, and a first and second signal lines. The first and second pixel portions include photoelectric conversion elements, respectively. The first and second transfer transistors transfer first and second charges photoelectrically converted by the first and second pixel portions, respectively. The first and second accumulation portions are interposed between the first and second pixel portions, and accumulate the first and second charges, respectively. The element isolation region is interposed between the first and second accumulation portions. The first and second amplifier transistors amplify voltages generated in accordance with the first and second charges accumulated in the first and second accumulation portions, respectively.
    Type: Application
    Filed: March 21, 2011
    Publication date: September 29, 2011
    Inventors: Motohiro MAEDA, Hirofumi Yamashita, Nagataka Tanaka
  • Publication number: 20110140177
    Abstract: According to one embodiment, a solid-state imaging device includes a semiconductor region, a first diffusion layer, a second diffusion layer, a third diffusion layer, an insulating film, a potential layer, and a read electrode. The semiconductor region includes first and second surfaces. The first diffusion layer is formed in the first surface. The first diffusion layer's concentration is a maximum value in a position at a first depth. The charge accumulation layer has a second depth. The second diffusion layer contacts the first diffusion layer. The third diffusion layer is formed in a position which faces the second diffusion layer in respect to the first diffusion layer. The insulating film is formed on the first surface. The potential layer is formed on the insulating film and has a predetermined potential. The read electrode is formed on the insulating film.
    Type: Application
    Filed: September 17, 2010
    Publication date: June 16, 2011
    Inventor: Hirofumi YAMASHITA
  • Publication number: 20110049331
    Abstract: According to one embodiment, a method of manufacturing a back-illuminated solid-state imaging device including forming a mask with apertures corresponding to a pixel pattern on the surface of a semiconductor layer, implanting second-conductivity-type impurity ions into the semiconductor layer from the front side of the layer to form second-conductivity-type photoelectric conversion parts and forming a part where no ion has been implanted into a pixel separation region, forming at the surface of the semiconductor layer a signal scanning circuit for reading light signals obtained at the photoelectric conversion parts after removing the mask, and removing the semiconductor substrate and a buried insulating layer from the semiconductor layer after causing a support substrate to adhere to the front side of the semiconductor layer.
    Type: Application
    Filed: August 2, 2010
    Publication date: March 3, 2011
    Inventor: Hirofumi YAMASHITA
  • Publication number: 20110049333
    Abstract: According to one embodiment, a solid-state imaging device with a plurality of light-receiving layers for acquiring different color signals stacked one on top of another in the optical direction. Each of the light-receiving layers includes a photoelectric conversion part that receives light entering the back side of the layer and generates signal charges and a read transistor that is provided on the front side of the layer and reads the signal charges generated at the photoelectric conversion part. A semiconductor layer is stacked via an insulating film on the front side of the top layer of the plurality of light-receiving layers. At the semiconductor layer, there is provided a signal scanning circuit which processes a signal read by each of the read transistors and outputs a different color signal from each of the light-receiving layers to the outside.
    Type: Application
    Filed: August 23, 2010
    Publication date: March 3, 2011
    Inventor: Hirofumi YAMASHITA
  • Publication number: 20110042552
    Abstract: According to one embodiment, a solid-state imaging device with an array arrangement of unit pixels including photoelectric conversion parts configured to generate signal charges by photoelectric conversion and a signal scanning circuit part, the signal scanning circuit part being provided on a second semiconductor layer different from a first semiconductor layer including the photoelectric conversion parts, the second semiconductor layer being stacked above the front side of the first semiconductor layer via an insulating film, and the first semiconductor layer being so configured that a pixel separation insulating film is buried in pixel boundary parts and read transistors configured to read signal charges generated by the photoelectric conversion parts are formed at the front side of the first semiconductor layer.
    Type: Application
    Filed: August 9, 2010
    Publication date: February 24, 2011
    Inventors: Shogo FURUYA, Hirofumi Yamashita, Yusuke Kohyama
  • Patent number: 7889255
    Abstract: Each of the unit cells provided on a semiconductor substrate of a solid-state imaging device comprises a first p-type well which isolates the semiconductor substrate into an n-type photoelectric conversion region, a second p-type well which is formed in the surface of the photoelectric conversion region and in which a signal scanning circuit section is formed, and a signal storage section which is comprised of a highly doped n-type layer which is formed in the surface of the photoelectric conversion region apart from the second p-type well and higher in impurity concentration than the photoelectric conversion region. The signal storage section having its part placed under a signal readout gate adapted to transfer a packet of signal charge from the storage section to the signal scanning circuit section and its part at which the potential becomes deepest located under the readout gate.
    Type: Grant
    Filed: October 18, 2005
    Date of Patent: February 15, 2011
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Ikuko Inoue, Hirofumi Yamashita, Nagataka Tanaka, Hisanori Ihara, Tetsuya Yamaguchi, Hiroshige Goto
  • Publication number: 20110019050
    Abstract: According to one embodiment, a solid-state imaging device includes a pixel region which is configured such that a photoelectric conversion unit and a signal scanning circuit unit are included in a semiconductor substrate, and a matrix of unit pixels is disposed, and a driving circuit region which is configured such that a device driving circuit for driving the signal scanning circuit unit is disposed on the semiconductor substrate, wherein the photoelectric conversion unit is provided on a back surface side of the semiconductor substrate, which is opposite to a front surface of the semiconductor substrate where the signal scanning circuit unit is formed, and the unit pixel includes an insulation film which is provided in a manner to surround a boundary part with the unit pixel that neighbors and defines a device isolation region.
    Type: Application
    Filed: August 27, 2010
    Publication date: January 27, 2011
    Inventor: Hirofumi YAMASHITA