Patents by Inventor Hirohiko Nishiki

Hirohiko Nishiki has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9177974
    Abstract: An active matrix substrate includes a plurality of pixels arranged in a matrix, a plurality of capacitor lines (11b) extending in one of directions in which the pixels are aligned and in parallel to each other, a plurality of TFTs (5), one for each of the pixels, a protective film (16a) covering the TFTs (5), a plurality of pixel electrodes (18a) arranged in a matrix on the protective film (16a) and connected to the respective corresponding TFTs (5), and a plurality of auxiliary capacitors (6), one for each of the pixels. Each of the auxiliary capacitors (6) includes the corresponding capacitor line (11b), the corresponding pixel electrode (18a), and the protective film (16a) between the corresponding capacitor line (11b) and the corresponding pixel electrode (18a).
    Type: Grant
    Filed: July 26, 2010
    Date of Patent: November 3, 2015
    Assignee: Sharp Kabushiki Kaisha
    Inventors: Yoshimasa Chikama, Hirohiko Nishiki, Yoshifumi Ohta, Hinae Mizuno, Takeshi Hara, Tetsuya Aita, Masahiko Suzuki, Michiko Takei, Okifumi Nakagawa, Yoshiyuki Harumoto
  • Publication number: 20150303307
    Abstract: This semiconductor device is provided with: a semiconductor film that comprises an oxide semiconductor, and includes a channel region; a first inorganic insulating film formed on the semiconductor film; a first organic insulating film formed on the first inorganic insulating film; and an inorganic film group. The inorganic film group has: a first electrode comprising an inorganic conductive film formed on the first organic insulating film; a second inorganic insulating film formed on the first electrode; and a second electrode that comprises an inorganic conductive film formed on the second inorganic insulating film, and is electrically connected to the semiconductor film via openings formed in such a manner as to penetrate the first inorganic insulating film, the first organic insulating film, the first electrode and the second inorganic insulating film. The first organic insulating film is disposed between the first inorganic insulating film and the inorganic film group.
    Type: Application
    Filed: September 30, 2013
    Publication date: October 22, 2015
    Applicant: Sharp Kabushiki Kaisha
    Inventors: Takeshi HARA, Hirohiko NISHIKI, Izumi ISHIDA, Shogo MURASHIGE
  • Publication number: 20150286082
    Abstract: A liquid crystal display device, which includes: a liquid crystal layer; and a first substrate and a second substrate that are arranged so as to face each other with the liquid crystal layer being sandwiched therebetween. On the liquid crystal layer side of the first substrate, there are provided: a plurality of first thin film transistors that are arranged in a display region; a peripheral drive circuit which includes a plurality of second thin film transistors and is arranged in the periphery of the display region so as to supply drive signals to the plurality of first thin film transistors; an organic insulating film that is formed so as to cover the plurality of first thin film transistors and the plurality of second thin film transistors; and an inorganic insulating film that is formed on the organic insulating film.
    Type: Application
    Filed: November 20, 2013
    Publication date: October 8, 2015
    Inventors: Hirohiko Nishiki, Takeshi Hara, Tohru Okabe
  • Publication number: 20150287799
    Abstract: The present invention suppresses electrochemical corrosion in a TFT between an oxide conductor and a source/drain wiring line containing aluminum. In this semiconductor device, a gate layer containing a gate line and a gate electrode is formed on a substrate, and a semiconductor layer made of an oxide semiconductor is formed so as to overlap the gate electrode of the gate layer, with a gate insulating film therebetween. A source electrode and a drain electrode are formed by spacing apart a source wiring layer on the semiconductor layer. The source wiring layer is configured by laminating first conductive layers made of Al and a second conductive layer constituted by a metal film made of a metal other than an amphoteric metal. The drain electrode and a pixel electrode are electrically connected to each other via a contact hole in protective layers formed on the source wiring layer.
    Type: Application
    Filed: September 18, 2013
    Publication date: October 8, 2015
    Applicant: Sharp Kabushiki Kaisha
    Inventors: Shogo Murashige, Takeshi Hara, Hirohiko Nishiki, Izumi Ishida
  • Publication number: 20150279865
    Abstract: This semiconductor device is provided with: a semiconductor film made of an oxide semiconductor film and having a channel region; a first insulating film that is formed on the semiconductor film in a form that covers the channel region; and a first electrode that is electrically connected to the semiconductor film via an opening formed in a location that does not overlap with the channel region in the first insulating film, and has an overlapping portion that overlaps with at least the semiconductor film on the first insulating film.
    Type: Application
    Filed: September 30, 2013
    Publication date: October 1, 2015
    Applicant: Sharp Kabushiki Kaisha
    Inventors: Takeshi Hara, Hirohiko Nishiki, Izumi Ishida, Shogo Murashige
  • Publication number: 20150255616
    Abstract: This semiconductor device is provided with: a semiconductor film that comprises an oxide semiconductor film, and has a channel region; a protective film that is formed on the semiconductor film in a form that covers the channel region; a first inorganic insulating film that is formed on the protective film in a form having an area that overlaps with the channel region; and an organic insulating film that comprises a resin film formed on the first inorganic insulating film, and has a first opening that exposes the first inorganic insulating film in the area that overlaps with the channel region.
    Type: Application
    Filed: September 30, 2013
    Publication date: September 10, 2015
    Applicant: SHARP KABUSHIKI KAISHA
    Inventors: Takeshi Hara, Hirohiko Nishiki, Izumi Ishida, Shogo Murashige
  • Publication number: 20150241724
    Abstract: An array board (a semiconductor device) 11b includes a display area TFT (a display area transistor) 17, a non-display area TFT (a non-display area transistor) 29, an upper insulator 31, and a lower insulator 30. The display area TFT 17 is arranged in a display area AA. The non-display area TFT 29 is arranged in a non-display area NAA. The upper insulator 31 is arranged in the non-display area NAA and formed from a second interlayer insulation film 41. The lower insulator 30 is arranged in the non-display area and formed from a first interlayer insulation film 39. The lower insulator 30 is arranged below the upper insulator 31 such that they are layered.
    Type: Application
    Filed: September 13, 2013
    Publication date: August 27, 2015
    Inventors: Tohru Okabe, Hirohiko Nishiki, Takeshi Hara, Kenichi Kitoh, Hisao Ochi
  • Publication number: 20150236687
    Abstract: A semiconductor device is provided with an oxide semiconductor thin-film transistor (TFT); a calibration electrode that is positioned so as to face an oxide semiconductor layer with an insulating layer therebetween, and, when viewed from the direction of the substrate normal line, overlaps at least part of a gate electrode with the oxide semiconductor layer interposed therebetween; and a calibration voltage setting circuit that determines the voltage to be applied to the calibration electrode. The calibration voltage setting circuit is provided with: a monitor TFT that is configured using a second oxide semiconductor layer, which is substantially the same as the oxide semiconductor layer of the oxide semiconductor TFT; a detection circuit that is configured so as to be able to measure the device characteristics of the monitor TFT; and a voltage determination circuit that determines the voltage to be applied to the calibration electrode on the basis of the measured device characteristics.
    Type: Application
    Filed: September 9, 2013
    Publication date: August 20, 2015
    Applicant: Sharp Kabushiki Kaisha
    Inventors: Yukimine Shimada, Hirohiko Nishiki, Kenichi Kitoh
  • Publication number: 20150221677
    Abstract: The present invention provides an active matrix substrate including a thin film transistor that sufficiently achieves high reliability and a low capacitance, a production method for the active matrix substrate without an increase in the number of photomasks, a display device including the active matrix substrate, and a production method for the display device. The active matrix substrate of the present invention includes a thin film transistor that includes a semiconductor layer consisting of an oxide semiconductor. The active matrix substrate includes at least the semiconductor layer consisting of the oxide semiconductor, an etching stopper layer, and an interlayer insulating film formed from a spin-on-glass material. In the plan view of the principal surface of the substrate, the etching stopper layer covers at least part of the semiconductor layer, and the interlayer insulating film covers at least part of the etching stopper layer.
    Type: Application
    Filed: September 17, 2013
    Publication date: August 6, 2015
    Inventors: Tohru Okabe, Hirohiko Nishiki, Takeshi Hara, Kenichi Kitoh, Hisao Ochi
  • Publication number: 20150214374
    Abstract: The present invention provides a circuit substrate and a display device in which oxide semiconductor layers that TFTs include are produced according to areas where the oxide semiconductor layers are present, whereby the reliability thereof is sufficiently enhanced. This circuit substrate is a circuit substrate obtained by arranging semiconductor elements on a transparent substrate, each of the semiconductor elements including an oxide semiconductor layer. The circuit substrate includes a protective film arranged above the semiconductor element, and an organic insulating film arranged above the protective film. The organic insulating films have openings above at least a part of oxide semiconductor layers.
    Type: Application
    Filed: August 26, 2013
    Publication date: July 30, 2015
    Applicant: Sharp Kabushiki Kaisha
    Inventors: Takeshi Hara, Hirohiko Nishiki, Izumi Ishida, Tohru Okabe, Manabu Daio
  • Publication number: 20150206979
    Abstract: This semiconductor device (101) includes: a substrate (1); a thin-film transistor (10) which includes an oxide semiconductor layer (6) as its active layer; a protective layer (11) covering the thin-film transistor; a metal layer (9d, 9t) interposed between the protective layer (11) and the substrate (1); a transparent conductive layer (13, 13t) formed on the protective layer (11); and a connecting portion (20, 30) to electrically connect the metal layer (9d, 9t) and the transparent conductive layer (13, 13t) together. The connecting portion (20, 30) includes an oxide connecting layer (6a, 6t) which is formed out of a same oxide film as a oxide semiconductor layer (6) and which has a lower electrical resistance than the oxide semiconductor layer (6). The metal layer (9d, 9t) is electrically connected to the transparent conductive layer (13, 13t) via the oxide connecting layer (6a, 6t).
    Type: Application
    Filed: September 9, 2013
    Publication date: July 23, 2015
    Inventors: Yukimine Shimada, Hirohiko Nishiki, Kenichi Kitoh
  • Patent number: 9087749
    Abstract: An active matrix substrate (20a) includes a gate electrode (25) formed on an insulating substrate (10a), and a planarizing film (26) formed on the gate electrode (25) and made of a baked SOG material. The gate electrode (25) is a multilayer film including a first conductive film (27) formed on the insulating substrate (10a) and made of a metal except copper, a second conductive film (28) formed on the first conductive film (27) and made of copper, and a third conductive film (29) formed on the second conductive film (28) and made of the metal except copper.
    Type: Grant
    Filed: December 20, 2011
    Date of Patent: July 21, 2015
    Assignee: Sharp Kabushiki Kaisha
    Inventors: Takeshi Hara, Hirohiko Nishiki, Hisao Ochi, Tetsuya Aita, Tohru Okabe, Yuya Nakano
  • Patent number: 9076718
    Abstract: The present invention provides an oxide semiconductor capable of achieving a thin film transistor having stable transistor characteristics, a thin film transistor having a channel layer formed of the oxide semiconductor and a production method thereof, and a display device equipped with the thin film transistor. The oxide semiconductor of the present invention is an oxide semiconductor for a thin film transistor. The oxide semiconductor includes indium, gallium, zinc, and oxygen as constituent atoms, and the oxygen content of the oxide semiconductor is 87% to 95% of the stoichiometric condition set as 100%, in terms of atomic units.
    Type: Grant
    Filed: September 5, 2014
    Date of Patent: July 7, 2015
    Assignee: Sharp Kabushiki Kaisha
    Inventors: Yoshifumi Ohta, Go Mori, Hirohiko Nishiki, Yoshimasa Chikama, Tetsuya Aita, Masahiko Suzuki, Okifumi Nakagawa, Michiko Takei, Yoshiyuki Harumoto, Takeshi Hara
  • Patent number: 9024311
    Abstract: The present invention provides a thin film transistor including an oxide semiconductor layer (4) for electrically connecting a signal electrode (6a) and a drain electrode (7a), the an oxide semiconductor layer being made from an oxide semiconductor; and a barrier layer (6b) made from at least one selected from the group consisting of Ti, Mo, W, Nb, Ta, Cr, nitrides thereof, and alloys thereof, the barrier layer (6b) being in touch with the signal electrode (6a) and the oxide semiconductor layer (4) and separating the signal electrode (6a) from the oxide semiconductor layer (4). Because of this configuration, the thin film transistor can form and maintain an ohmic contact between the first electrode and the channel layer, thereby being a thin film transistor with good properties.
    Type: Grant
    Filed: April 6, 2010
    Date of Patent: May 5, 2015
    Assignee: Sharp Kabushiki Kaisha
    Inventors: Takeshi Hara, Hirohiko Nishiki, Yoshimasa Chikama, Kazuo Nakagawa, Yoshifumi Ohta, Tetsuya Aita, Masahiko Suzuki, Okifumi Nakagawa, Yoshiyuki Miyajima, Michiko Takei, Yoshiyuki Harumoto, Hinae Mizuno
  • Publication number: 20140367683
    Abstract: The present invention provides an oxide semiconductor capable of achieving a thin film transistor having stable transistor characteristics, a thin film transistor having a channel layer formed of the oxide semiconductor and a production method thereof, and a display device equipped with the thin film transistor. The oxide semiconductor of the present invention is an oxide semiconductor for a thin film transistor. The oxide semiconductor includes indium, gallium, zinc, and oxygen as constituent atoms, and the oxygen content of the oxide semiconductor is 87% to 95% of the stoichiometric condition set as 100%, in terms of atomic units.
    Type: Application
    Filed: September 5, 2014
    Publication date: December 18, 2014
    Inventors: Yoshifumi OHTA, Go MORI, Hirohiko NISHIKI, Yoshimasa CHIKAMA, Tetsuya AITA, Masahiko SUZUKI, Okifumi NAKAGAWA, Michiko TAKEI, Yoshiyuki HARUMOTO, Takeshi HARA
  • Patent number: 8865516
    Abstract: The present invention provides an oxide semiconductor capable of achieving a thin film transistor having stable transistor characteristics, a thin film transistor having a channel layer formed of the oxide semiconductor and a production method thereof, and a display device equipped with the thin film transistor. The oxide semiconductor of the present invention is an oxide semiconductor for a thin film transistor. The oxide semiconductor includes indium, gallium, zinc, and oxygen as constituent atoms, and the oxygen content of the oxide semiconductor is 87% to 95% of the stoichiometric condition set as 100%, in terms of atomic units.
    Type: Grant
    Filed: March 10, 2010
    Date of Patent: October 21, 2014
    Assignee: Sharp Kabushiki Kaisha
    Inventors: Yoshifumi Ohta, Go Mori, Hirohiko Nishiki, Yoshimasa Chikama, Tetsuya Aita, Masahiko Suzuki, Okifumi Nakagawa, Michiko Takei, Yoshiyuki Harumoto, Takeshi Hara
  • Patent number: 8829513
    Abstract: The present invention provides an oxide semiconductor that realizes a TFT excellent in electric properties and process resistance, a TFT comprising a channel layer formed of the oxide semiconductor, and a display device equipped with the TFT. The oxide semiconductor of the present invention is an oxide semiconductor for a thin film transistor, wherein the oxide semiconductor contains Ga (gallium), In (indium), Zn (zinc), and O (oxygen) as constituent atoms, and the oxide semiconductor has Zn atomic composition satisfying the equation of 0.01?Zn/(In+Zn)?0.22.
    Type: Grant
    Filed: March 29, 2010
    Date of Patent: September 9, 2014
    Assignee: Sharp Kabushiki Kaisha
    Inventors: Yoshifumi Ota, Hirohiko Nishiki, Yoshimasa Chikama, Takeshi Hara, Tetsuya Aita, Masahiko Suzuki, Okifumi Nakagawa, Kazuo Nakagawa, Michiko Takei, Yoshiyuki Harumoto, Hinae Mizuno
  • Patent number: 8810765
    Abstract: An electroluminescence element includes an electroluminescence substrate including a thin film transistor substrate, and a light-emitting layer provided over the thin film transistor substrate and divided by picture-element separating portions so as to correspond to unit picture elements; and a sealing substrate arranged to hermetically seal the light-emitting layer of the electroluminescence substrate. At least one of the electroluminescence substrate and the sealing substrate is a flexible substrate. Spacers are provided between the electroluminescence substrate and the sealing substrate.
    Type: Grant
    Filed: January 11, 2008
    Date of Patent: August 19, 2014
    Assignee: Sharp Kabushiki Kaisha
    Inventors: Tohru Okabe, Hirohiko Nishiki
  • Patent number: 8685803
    Abstract: A semiconductor device includes: a thin film transistor having a gate line (3a), a first insulating film (5), an island-shaped oxide semiconductor layer (7a), a second insulating film (9), a source line (13as), a drain electrode (13ad), and a passivation film; and a terminal portion having a first connecting portion (3c) made of the same conductive film as the gate line, a second connecting portion (13c) made of the same conductive film as the source line and the drain electrode, and a third connecting portion (19c) formed on the second connecting portion.
    Type: Grant
    Filed: December 3, 2010
    Date of Patent: April 1, 2014
    Assignee: Sharp Kabushiki Kaisha
    Inventors: Yoshimasa Chikama, Hirohiko Nishiki, Yoshifumi Ohta, Takeshi Hara, Tetsuya Aita, Masahiko Suzuki, Michiko Takei, Okifumi Nakagawa, Yoshiyuki Harumoto, Hinae Mizuno
  • Publication number: 20140014950
    Abstract: An active matrix substrate (20a) includes a gate electrode (25) formed on an insulating substrate (10a), and a planarizing film (26) formed on the gate electrode (25) and made of a baked SOG material. The gate electrode (25) is a multilayer film including a first conductive film (27) formed on the insulating substrate (10a) and made of a metal except copper, a second conductive film (28) formed on the first conductive film (27) and made of copper, and a third conductive film (29) formed on the second conductive film (28) and made of the metal except copper.
    Type: Application
    Filed: December 20, 2011
    Publication date: January 16, 2014
    Applicant: SHARP KABUSHIKI KAISHA
    Inventors: Takeshi Hara, Hirohiko Nishiki, Hisao Ochi, Tetsuya Aita, Tohru Okabe, Yuya Nakano