Patents by Inventor Hirokazu Ezawa

Hirokazu Ezawa has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 5529634
    Abstract: An evaporation chamber for forming fine metal particles is separated from a film formation chamber in which the substrate having a metal film such as a metal column thereon is placed during metal film deposition. The pressure of the film formation chamber is set to be lower than that of the evaporation chamber, and the fine metal particles are sprayed on the substrate by the pressure difference to form the metal column. Therefore, a wiring layer, a connection electrode for connecting the wiring layer to another wiring layer, and the like can easily be formed by a small number of steps.
    Type: Grant
    Filed: April 19, 1995
    Date of Patent: June 25, 1996
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Masahiro Miyata, Hidemitsu Egawa, Johta Fukuhara, Shinzi Takeda, Hirokazu Ezawa
  • Patent number: 5500559
    Abstract: In a semiconductor device and a method for manufacturing the same according to the present invention, for example, an insulating film is deposited on a silicon substrate, and a concave groove is formed in the insulating film in accordance with a predetermined wiring pattern. Titanium and palladium are deposited in sequence on the insulating film to form a titanium film and a palladium film, respectively. A silver film is formed on the palladium film by electroplating, and a groove-shaped silver wiring layer is formed by polishing. The resultant structure is annealed at a temperature of about 700.degree. C., and an intermetallic compound is formed by alloying the titanium film and palladium film with each other. Consequently, a burying type wiring layer whose resistance is lower than that of aluminum, is constituted by the silver wiring layer and intermetallic compound.
    Type: Grant
    Filed: May 25, 1994
    Date of Patent: March 19, 1996
    Assignees: Kabushiki Kaisha Toshiba, Ebara Corporation
    Inventors: Masahiro Miyata, Hirokazu Ezawa, Naoaki Ogure, Manabu Tsujimura, Takeyuki Ohdaira, Hiroaki Inoue, Yukio Ikeda
  • Patent number: 5480839
    Abstract: With a semiconductor device manufacturing method, a lower-layer interconnection is formed on a circuit board on which a plurality of semiconductor chips are mounted. Using a screen plate with openings corresponding to desired positions on the lower-layer interconnection, screen printing of a metal paste is effected, and the printed metal paste is dried and calcined by heat treatment to form a metal pillar on the lower-layer interconnection. An insulating film covering the lower-layer interconnection and the metal pillar is formed so that the tip of the metal pillar may be exposed. An upper-layer interconnection is formed on the insulating film so that this layer may contact with the exposed tip of the metal pillar.
    Type: Grant
    Filed: January 11, 1994
    Date of Patent: January 2, 1996
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Hirokazu Ezawa, Masahiro Miyata
  • Patent number: 5473197
    Abstract: Pads are formed on a semiconductor substrate and the pads are covered with a passivation film. Openings are formed in the passivation film and the pads are exposed via the openings. A barrier metal layer is formed on the bottom surface and side surface of each of the openings and the upper surface of the passivation film lying on the periphery of each of the openings. Bump electrodes are filled in the openings and project upwardly from the openings. The area of the upper surface of the bump electrode is larger than the area of the bottom surface thereof connected to the pad. The cross section of the bump electrode in a direction along the periphery of the semiconductor substrate takes a rectangular form and the cross section of the bump electrode in a direction perpendicular to the periphery of the semiconductor substrate takes a trapezium form having an upper side longer than a bottom side thereof.
    Type: Grant
    Filed: May 20, 1994
    Date of Patent: December 5, 1995
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Toshiaki Idaka, Hirokazu Ezawa
  • Patent number: 5136363
    Abstract: A semiconductor device having a bump electrode on a semiconductor substrate above an electrode pad and metal film. The shape of the bump electrode is composed of a cubical portion and a skirt extending outward from the bottom of the cubical portion. In manufacturing such a semiconductor device, a dry film is used which is laminated on the metal film under a certain laminating condition and formed with an opening. A bump material is formed as a deposit on the metal film within the opening, through electrolytic plating. The deposit has the cubical portion corresponding in shape to the opening, and the skirt extending outward into a space between the dry film and the metall film, from the bottom of the cubical portion. The metal film is etched out using the deposit as a mask to make the deposit as a bump electrode of the semiconductor device.
    Type: Grant
    Filed: November 26, 1990
    Date of Patent: August 4, 1992
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Takashi Endo, Hirokazu Ezawa
  • Patent number: 5057453
    Abstract: A semiconductor device having a bump electrode on a semiconductor substrate above an electrode pad and metal film. The shape of the bump electrode is composed of a cubical portion and a skirt extending outward from the bottom of the cubical portion. In manufacturing such a semiconductor device, a dry film is used which is laminated on the metal film under a certain laminating condition and formed with an opening. A bump material is formed as a deposit on the metal film within the opening, through electrolytic plating. The deposit has the cubical portion corresponding in shape to the opening, and the skirt extending outward into a space between the dry film and the metal film, from the bottom of the cubical portion. The metal film is etched out using the deposit as a mask to thereby make the deposit as a bump electrode of the semiconductor device.
    Type: Grant
    Filed: May 29, 1990
    Date of Patent: October 15, 1991
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Takashi Endo, Hirokazu Ezawa