Patents by Inventor Hiroki Hiyama

Hiroki Hiyama has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9667901
    Abstract: Provided is an imaging apparatus and an imaging system that can suppress high-brightness darkening phenomenon without preventing achievement of high-speed operation. The imaging apparatus includes: pixels each outputting a signal based on photoelectric conversion to each of signal lines; clip units each having a first transistor for clipping the voltage of each of the signal lines; a holding capacitor having a first electrode connected to a control electrode of the first transistor, and having a second electrode; a shift unit configured to supply, to the second electrodes, a plurality of voltages having values different from each other; and a voltage supplying unit provided separately from the shift unit and supplying a first voltage to the second electrodes.
    Type: Grant
    Filed: June 24, 2015
    Date of Patent: May 30, 2017
    Assignee: CANON KABUSHIKI KAISHA
    Inventors: Seiichirou Sakai, Hiroki Hiyama, Kazuo Yamazaki
  • Publication number: 20170150075
    Abstract: In a period in which a pixel signal of another pixel is read out from the pixel, a transistor connected to a floating diffusion region of a pixel not performing reading out of a pixel signal from the pixel is turned off.
    Type: Application
    Filed: November 21, 2016
    Publication date: May 25, 2017
    Inventors: Hiroki Hiyama, Hiroaki Kameyama, Yasuji Ikeda, Kazuhiro Sonoda, Hideo Kobayashi
  • Patent number: 9654716
    Abstract: The present invention relates to a technology for providing a selection unit configured to perform selection of a bit memory that holds a signal of a first bit of a digital signal from among a plurality of bit memories commonly in a memory unit in each of a plurality of AD conversion units.
    Type: Grant
    Filed: November 23, 2015
    Date of Patent: May 16, 2017
    Assignee: CANON KABUSHIKI KAISHA
    Inventors: Hidetoshi Hayashi, Hiroki Hiyama, Tetsuya Itano, Toshiaki Ono, Tatsuhiko Yamazaki
  • Publication number: 20170133417
    Abstract: An object of the present invention is to prevent a sensitivity difference between pixels. There are disposed plural unit cells each including plural photodiodes 101A and 101B, plural transfer MOSFETs 102A and 102B arranged corresponding to the plural photodiodes, respectively, and a common MOSFET 104 which amplifies and outputs signals read from the plural photodiodes. Each pair within the unit cell, composed of the photodiode and the transfer MOSFET provided corresponding to the photodiode, has translational symmetry with respect to one another. Within the unit cell, there are included a reset MOSFET and selecting MOSFET.
    Type: Application
    Filed: January 19, 2017
    Publication date: May 11, 2017
    Inventors: HIROKI HIYAMA, MASANORI OGURA, SEIICHIRO SAKAI
  • Patent number: 9648266
    Abstract: There are provided a driving method for an image pickup device, a driving method for an imaging system, an image pickup device, and an imaging system, which changes an operation for mixing signals generated by a plurality of pixels in accordance with an amplification factor of a signal processing circuit in the image pickup device or an amplification unit externally provided to the image pickup device.
    Type: Grant
    Filed: May 5, 2015
    Date of Patent: May 9, 2017
    Assignee: CANON KABUSHIKI KAISHA
    Inventors: Takahiro Yamasaki, Keisuke Ota, Hiroki Hiyama, Yasuhiro Oguro, Nobuhiro Takeda, Satoshi Suzuki
  • Patent number: 9641775
    Abstract: During a period in which an electric potential of one node of a holding capacitance shifts from a first electric potential to a second electric potential, the other node of the holding capacitance is in an electrically-floating state.
    Type: Grant
    Filed: June 30, 2015
    Date of Patent: May 2, 2017
    Assignee: CANON KABUSHIKI KAISHA
    Inventors: Seiichirou Sakai, Hiroki Hiyama, Kazuo Yamazaki
  • Patent number: 9635298
    Abstract: An object of the present invention is to provide a comparator which has an input voltage range larger than the case where a conventional offset cancel technique is used, while reducing an offset voltage. A comparator circuit includes: a comparator having an inverting input terminal, a non-inverting input terminal and an output terminal; a first switch having one terminal connected to the inverting input terminal and having the other terminal connected to the output terminal; a first capacitor which has one end connected with the inverting input terminal; a first signal input terminal which is another end of the first capacitor; and a second signal input terminal which selectively inputs either one of a fixed voltage and a comparing signal into the non-inverting input terminal.
    Type: Grant
    Filed: October 17, 2014
    Date of Patent: April 25, 2017
    Assignee: CANON KABUSHIKI KAISHA
    Inventors: Kohichi Nakamura, Hideo Kobayashi, Hiroki Hiyama, Kazuo Yamazaki
  • Patent number: 9595559
    Abstract: An object of the present invention is to prevent a sensitivity difference between pixels. There are disposed plural unit cells each including plural photodiodes with plural transfer MOSFETs arranged respectively corresponding to the plural photodiodes, and a common MOSFET that amplifies and outputs signals read from the plural photodiodes. The unit cell includes reset and selecting MOSFETs. Within the unit cell, each pair of photodiode and corresponding transfer MOSFET has translational symmetry with respect to one another.
    Type: Grant
    Filed: October 27, 2015
    Date of Patent: March 14, 2017
    Assignee: CANON KABUSHIKI KAISHA
    Inventors: Hiroki Hiyama, Masanori Ogura, Seiichiro Sakai
  • Patent number: 9549139
    Abstract: The imaging apparatus has a plurality of pixels each of which has a plurality of photoelectric conversion units; generates a plurality of first combined signals obtained by combining signals based on electric charges of photoelectric conversion units in one side with each other, and a plurality of second signals obtained by combining signals based on electric charges of the plurality of photoelectric conversion units with each other; and outputs a part of the first combined signals out of the plurality of first combined signals.
    Type: Grant
    Filed: August 6, 2014
    Date of Patent: January 17, 2017
    Assignee: Canon Kabushiki Kaisha
    Inventors: Yasuji Ikeda, Hiroki Hiyama, Yu Arishima, Seiji Hashimoto
  • Patent number: 9509931
    Abstract: A solid-state imaging apparatus, comprising a pixel array in which a plurality of pixels are arrayed, a plurality of processing units, forming a plurality of groups each including two or more processing units, an output line, a power supply line, a plurality of signal lines corresponding to the plurality of groups and connecting output nodes of the two or more processing units in the corresponding group, a plurality of connecting units provided between the output line and the plurality of signal lines, and a control unit configured to control the plurality of processing units and the plurality of connecting units based on a group including the two or more processing units being to output signals.
    Type: Grant
    Filed: March 20, 2015
    Date of Patent: November 29, 2016
    Assignee: Canon Kabushiki Kaisha
    Inventors: Hideo Kobayashi, Hiroki Hiyama, Kazuo Yamazaki, Hiroaki Kameyama
  • Patent number: 9467636
    Abstract: A photoelectric conversion device includes a plurality of pixels arranged in a plurality of columns, a plurality of comparators provided correspondingly to the respective columns, a reference signal generation unit configured to supply a reference signal to the plurality of comparators, a counter configured to generate a count signal that includes a plurality of bits in synchronization with a first clock signal, a synchronization unit configured to synchronize the plurality of bits with a second clock signal to generate a synchronized count signal and to output the generated synchronized count signal, and a plurality of memories provided correspondingly to the respective comparators, the memories each being configured to store the synchronized count signal in response to a change in an output of a corresponding one of the comparators.
    Type: Grant
    Filed: October 1, 2013
    Date of Patent: October 11, 2016
    Assignee: CANON KABUSHIKI KAISHA
    Inventors: Kohichi Nakamura, Koichiro Iwata, Kazuhiro Saito, Takeshi Akiyama, Tetsuya Itano, Hiroki Hiyama, Takashi Muto
  • Patent number: 9438841
    Abstract: A solid-state imaging apparatus includes a pixel section in which a plurality of pixels are arranged in a matrix, a column signal line configured to output a pixel signal from the pixel section, a column amplifier circuit configured to invert and amplify the pixel signal, a bypass circuit configured to bypass the column amplifier circuit, an AD converter, and a control unit configured to change an operation mode of the AD converter in accordance with the operation of the bypass circuit.
    Type: Grant
    Filed: February 2, 2016
    Date of Patent: September 6, 2016
    Assignee: Canon Kabushiki Kaisha
    Inventors: Kazuo Yamazaki, Tetsuya Itano, Hiroki Hiyama
  • Patent number: 9438839
    Abstract: A solid state imaging apparatus includes: a pixel array in which pixels having color filters are arrayed in a matrix shape in accordance with a predetermined color arrangement, with each pixel including a plurality of divided pixels having a color filter of the same color; and an adding circuit that performs addition averaging of a plurality of signals output from the divided pixels included in a plurality of pixels having color filters of the same color. Among a plurality of pixels that are an object of the addition averaging, a number of signals output from the respective divided pixels of which the adding circuit performs addition averaging is different for at least one pixel relative to the other pixels.
    Type: Grant
    Filed: December 9, 2014
    Date of Patent: September 6, 2016
    Assignee: CANON KABUSHIKI KAISHA
    Inventors: Hiroki Hiyama, Yasuji Ikeda
  • Publication number: 20160255248
    Abstract: An electronic circuit includes a generating circuit for generating a first group of signals and a second group of signals, and a transmission path for transmitting the first group of signals and the second group of signals. The first group of signals are composed of signals synchronized with a first edge that is one of the rising edge and the falling edge of a reference clock, and the second group of signals are composed of signals synchronized with a second edge that is the other of the rising edge and falling edge. The transmission path includes first transmission lines for transmitting the signals composing the first group and second transmission lines for transmitting the signals composing the second group, and the first and second transmission lines are alternately arranged.
    Type: Application
    Filed: February 16, 2016
    Publication date: September 1, 2016
    Inventors: Hideo Kobayashi, Kazuo Yamazaki, Hiroki Hiyama
  • Publication number: 20160156868
    Abstract: A solid-state imaging apparatus includes a pixel section in which a plurality of pixels are arranged in a matrix, a column signal line configured to output a pixel signal from the pixel section, a column amplifier circuit configured to invert and amplify the pixel signal, a bypass circuit configured to bypass the column amplifier circuit, an AD converter, and a control unit configured to change an operation mode of the AD converter in accordance with the operation of the bypass circuit.
    Type: Application
    Filed: February 2, 2016
    Publication date: June 2, 2016
    Inventors: Kazuo Yamazaki, Tetsuya Itano, Hiroki Hiyama
  • Publication number: 20160156865
    Abstract: The present invention relates to a technology for providing a selection unit configured to perform selection of a bit memory that holds a signal of a first bit of a digital signal from among a plurality of bit memories commonly in a memory unit in each of a plurality of AD conversion units.
    Type: Application
    Filed: November 23, 2015
    Publication date: June 2, 2016
    Inventors: Hidetoshi Hayashi, Hiroki Hiyama, Tetsuya Itano, Toshiaki Ono, Tatsuhiko Yamazaki
  • Publication number: 20160156866
    Abstract: An image pickup apparatus includes a plurality of pixels arranged in rows and columns, a plurality of comparators, each of the comparators including a switch for controlling an operation, a signal line which is provided commonly to the switches of the plurality of comparators and through which a control signal for controlling the switches of the plurality of comparators is supplied, a control signal generation unit, and a signal line control unit configured to control an electric potential of the signal line to be set as a fixed electric potential.
    Type: Application
    Filed: November 30, 2015
    Publication date: June 2, 2016
    Inventors: Kohichi Nakamura, Tetsuya Itano, Hiroki Hiyama, Hiroaki Kameyama, Kazuhiro Saito
  • Publication number: 20160150176
    Abstract: An imaging apparatus includes: a first signal processing circuit arranged in a first direction to process a signal from a first group of pixels; a second signal processing circuit arranged in a second direction to process a signal from a second group of pixels; a first external connecting terminal arranged in the first direction to supply a first potential to the first signal processing circuit; a second external connecting terminal arranged in the second direction to supply the first potential to the second signal processing circuit; a third external connecting terminal arranged in the first direction to supply a second potential to the first group of pixels; and a fourth external connecting terminal arranged in the second direction to supply the second potential to the second group of pixels.
    Type: Application
    Filed: November 2, 2015
    Publication date: May 26, 2016
    Inventors: Hiroki Hiyama, Takamasa Sakuragi, Junji Iwata, Hiroaki Kameyama, Tomoya Kumagai, Keisuke Ota
  • Patent number: 9307174
    Abstract: A solid-state imaging apparatus includes a plurality of pixels arrayed in a matrix, and configured to generate signals by photoelectric conversion; a plurality of read-out circuits disposed on each column of the plurality of pixels arrayed in a matrix pattern, and configured to read out the signals from the plurality of pixels; a plurality of comparison units configured to compare the signals output from the plurality of read-out circuits with a reference signal whose level changes with time; a counter configured to count a clock signal after the level of the reference signal starts a change; a storage unit configured, when a magnitude relationship between the signals output from the plurality of the read-out circuits and the reference signal is reversed; and a reset unit configured to reset the count value stored in the storage unit.
    Type: Grant
    Filed: September 11, 2012
    Date of Patent: April 5, 2016
    Assignee: CANON KABUSHIKI KAISHA
    Inventors: Tetsuya Itano, Hiroki Hiyama, Kazuhiro Saito, Kohichi Nakamura, Yu Maehashi
  • Patent number: 9288415
    Abstract: A solid-state imaging apparatus includes a pixel section in which a plurality of pixels are arranged in a matrix, a column signal line configured to output a pixel signal from the pixel section, a column amplifier circuit configured to invert and amplify the pixel signal, a bypass circuit configured to bypass the column amplifier circuit, an AD converter, and a control unit configured to change an operation mode of the AD converter in accordance with the operation of the bypass circuit.
    Type: Grant
    Filed: August 27, 2014
    Date of Patent: March 15, 2016
    Assignee: Canon Kabushiki Kaisha
    Inventors: Kazuo Yamazaki, Tetsuya Itano, Hiroki Hiyama