Patents by Inventor Hiroki Hiyama

Hiroki Hiyama has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8692920
    Abstract: In an A/D converter, a first analog signal which is input to an input terminal in a state in which the input terminal and a reference voltage line are connected via a first capacitor is converted into digital data when a reference signal is supplied to the reference signal line in a state in which the reference signal line and a first input terminal of a comparator are connected via the first capacitor. A second analog signal which is input to the input terminal in a state in which the input terminal and the reference voltage line are connected via a second capacitor is converted into digital data when the reference signal is supplied to the reference signal line in a state in which the reference signal line and the first input terminal of the comparator are connected via the second capacitor.
    Type: Grant
    Filed: August 9, 2012
    Date of Patent: April 8, 2014
    Assignee: Canon Kabushiki Kaisha
    Inventors: Hiroki Hiyama, Kohichi Nakamura, Kazuhiro Saito, Tetsuya Itano
  • Publication number: 20140092286
    Abstract: A photoelectric conversion device includes a pixel array including a plurality of pixels arranged in a matrix, a plurality of blocks including a plurality of pairs, each of the pairs including a comparator provided correspondingly with a column in the pixel array and a memory provided correspondingly with the comparator, and a block information supply unit configured to supply block information which indicates a location of a block, to the plurality of memories included in the blocks.
    Type: Application
    Filed: September 30, 2013
    Publication date: April 3, 2014
    Inventors: Hiroki Hiyama, Kohichi Nakamura, Kazuo Yamazaki, Kazuhiro Saito
  • Patent number: 8643765
    Abstract: An output level difference in the case of using a joint line as a boundary, a bright line, a black bar, or the like is suppressed. A solid-state image pick-up apparatus in which, on a substrate having a plurality of photoelectric converting areas (photodiodes), a solid-state image pick-up element provided with at least one pattern layer formed by divisional exposure and a lens for introducing light into the plurality of photoelectric converting areas of the solid-state image pick-up element are formed. By setting a center of an optical axis of the lens to an approximate joint position between the pattern layers where the pattern layers have been joined by the divisional exposure, the output level difference of a pixel output of the solid-state image pick-up element on the right and left sides of the joint position is suppressed.
    Type: Grant
    Filed: March 21, 2011
    Date of Patent: February 4, 2014
    Assignee: Canon Kabushiki Kaisha
    Inventors: Hideaki Takada, Akira Okita, Hiroki Hiyama
  • Publication number: 20140002690
    Abstract: An object of the present invention is to prevent a sensitivity difference between pixels. There are disposed plural unit cells each including plural photodiodes 101A and 101B, plural transfer MOSFETs 102A and 102B arranged corresponding to the plural photodiodes, respectively, and a common MOSFET 104 which amplifies and outputs signals read from the plural photodiodes. Each pair within the unit cell, composed of the photodiode and the transfer MOSFET provided corresponding to the photodiode, has translational symmetry with respect to one another. Within the unit cell, there are included a reset MOSFET and selecting MOSFET.
    Type: Application
    Filed: September 3, 2013
    Publication date: January 2, 2014
    Applicant: Canon Kabushiki Kaisha
    Inventors: Hiroki Hiyama, Masanori Ogura, Seiichiro Sakai
  • Publication number: 20140002684
    Abstract: A solid-state image sensing device comprises a first readout circuit configured to read out a signal from a pixel array including a plurality of pixels, a signal holding unit configured to hold the signal read out from the first readout circuit, a second readout circuit configured to read out the signal held in the signal holding unit, and a current control unit configured to control an electric current flowing through at least part of the first readout circuit while the first readout circuit reads out the signal. The current control unit controls an electric current flowing through the at least part of the first readout circuit in a moving image capturing mode to be smaller than an electric current flowing through the at least part of the first readout circuit in a still image capturing mode.
    Type: Application
    Filed: September 3, 2013
    Publication date: January 2, 2014
    Applicant: Canon Kabushiki Kaisha
    Inventors: Akira Okita, Hiroki Hiyama, Masaru Fujimura
  • Publication number: 20140002689
    Abstract: There is provided an image pickup apparatus including a pixel including a photoelectric conversion element and an amplification element for amplifying and outputting a signal generated at the photoelectric conversion element, a load transistor for controlling an electric current flowing at the amplification element, and a potential control element for suppressing potential fluctuation in a first main electrode region of the load transistor which is an output side of the amplification element.
    Type: Application
    Filed: September 3, 2013
    Publication date: January 2, 2014
    Applicant: KANON KABUSHIKI KAISHA
    Inventors: Katsuhito Sakurai, Toru Koizumi, Hiroki Hiyama
  • Patent number: 8610811
    Abstract: An image pickup apparatus comprises plural pixels each including a photoelectric converting element; plural capacitors which receive signals from the plural pixels at first terminals; plural clamping switches for setting a second terminal of each of the plural capacitors into a predetermined electric potential; plural first storing units for storing signals from the second terminals of the plural capacitors; plural second storing units for storing the signals from the second terminals of the plural capacitors; a first common output line to which the signals from the plural first storing units are sequentially output; a second common output line to which the signals from the plural second storing units are sequentially output; and a difference circuit for operating a difference between the signal from the first common output line and the signal from the second common output line.
    Type: Grant
    Filed: November 23, 2011
    Date of Patent: December 17, 2013
    Assignee: Canon Kabushiki Kaisha
    Inventors: Hiroki Hiyama, Katsuhito Sakurai, Akira Okita, Hideaki Takada
  • Patent number: 8598901
    Abstract: A system includes: a plurality of pixels arranged in a matrix; a reference signal generating unit for generating a ramp signal; A/D converters each arranged correspondingly to each of columns to A/D-convert a signal from the pixel; a counter that performs a count operation according to an output of the ramp signal, and supplies the count signal through the count signal line to the A/D converter; and a counter test circuit that is provided independently from the A/D converter, and tests the counter, based on a matching of the expected value of the count signal with the count signal supplied through the count signal line from the counter. This configuration allows the count signal to be checked concurrently with imaging of an object.
    Type: Grant
    Filed: September 21, 2012
    Date of Patent: December 3, 2013
    Assignee: Canon Kabushiki Kaisha
    Inventors: Hiroki Hiyama, Tetsuya Itano, Kazuhiro Saito, Yu Maehashi, Koichiro Iwata, Kohichi Nakamura
  • Patent number: 8553120
    Abstract: There is provided an image pickup apparatus including a pixel including a photoelectric conversion element and an amplification element for amplifying and outputting a signal generated at the photoelectric conversion element, a load transistor for controlling an electric current flowing at the amplification element, and a potential control element for suppressing potential fluctuation in a first main electrode region of the load transistor which is an output side of the amplification element.
    Type: Grant
    Filed: June 13, 2011
    Date of Patent: October 8, 2013
    Assignee: Canon Kabushiki Kaisha
    Inventors: Katsuhito Sakurai, Toru Koizumi, Hiroki Hiyama
  • Patent number: 8553101
    Abstract: A solid-state image sensing device comprises a first readout circuit configured to read out a signal from a pixel array including a plurality of pixels, a signal holding unit configured to hold the signal read out from the first readout circuit, a second readout circuit configured to read out the signal held in the signal holding unit, and a current control unit configured to control an electric current flowing through at least part of the first readout circuit while the first readout circuit reads out the signal. The current control unit controls an electric current flowing through the at least part of the first readout circuit in a moving image capturing mode to be smaller than an electric current flowing through the at least part of the first readout circuit in a still image capturing mode.
    Type: Grant
    Filed: January 20, 2012
    Date of Patent: October 8, 2013
    Assignee: Canon Kabushiki Kaisha
    Inventors: Akira Okita, Hiroki Hiyama, Masaru Fujimura
  • Patent number: 8552481
    Abstract: An object of the present invention is to prevent a sensitivity difference between pixels. There are disposed plural unit cells each including plural photodiodes 101A and 101B, plural transfer MOSFETs 102A and 102B arranged corresponding to the plural photodiodes, respectively, and a common MOSFET 104 which amplifies and outputs signals read from the plural photodiodes. Each pair within the unit cell, composed of the photodiode and the transfer MOSFET provided corresponding to the photodiode, has translational symmetry with respect to one another. Within the unit cell, there are included a reset MOSFET and selecting MOSFET.
    Type: Grant
    Filed: November 17, 2009
    Date of Patent: October 8, 2013
    Assignee: Canon Kabushiki Kaisha
    Inventors: Hiroki Hiyama, Masanori Ogura, Seiichiro Sakai
  • Publication number: 20130235241
    Abstract: A solid-state imaging apparatus that shortens a time for reading out pixel signals of all pixels and improves the aperture ratio of pixels is provided. The solid-state imaging apparatus includes a plurality of pixels (3) arranged in a matrix along a plurality of rows and columns, in which each of the pixels includes a photoelectric conversion element and a color filter; a plurality of buffers (2) arranged with each one corresponding to a plurality of pixels; and a plurality of vertical output lines (1) arranged such that two or more of the vertical output lines (1) are arranged correspondingly to one of the columns of the pixels; in which an input node of each of the buffers is connected commonly to a plurality of pixels having color filters of different colors, and output nodes of the plurality of buffers are connected alternately to a plurality of vertical output lines.
    Type: Application
    Filed: April 26, 2013
    Publication date: September 12, 2013
    Applicant: Canon Kabushiki Kaisha
    Inventors: Kohichi Nakamura, Hiroki Hiyama
  • Patent number: 8493487
    Abstract: In a photoelectric conversion apparatus having a plurality of unit cells, wherein each of the unit cells has a photoelectric conversion element, a transfer transistor and a floating diffusion region, a light shielding portion arranged on an upper portion of the floating diffusion region is included. The respective light shielding portions are separated from one another, and are in a floating state without being electrically connected to the floating diffusion region.
    Type: Grant
    Filed: August 26, 2009
    Date of Patent: July 23, 2013
    Assignee: Canon Kabushiki Kaisha
    Inventors: Hideaki Takada, Masanori Ogura, Hiroki Hiyama
  • Patent number: 8462242
    Abstract: An image capture device includes a plurality of image capture elements for capturing an object image, a plurality of vertical output lines for reading signals out of the plurality of image capture elements, and a plurality of processing circuits. Each processing circuit includes a first capacitor element having a first electrode connected to one of the plurality of vertical output lines, a differential amplifier having a first input terminal connected to a second electrode of the first capacitor element, a second capacitor element connected between the first input terminal and an output terminal of the differential amplifier, and a first switch configured to control conduction between the first input terminal and the output terminal of the differential amplifier.
    Type: Grant
    Filed: January 11, 2011
    Date of Patent: June 11, 2013
    Assignee: Canon Kabushiki Kaisha
    Inventors: Hiroki Hiyama, Akira Okita, Hideaki Takada, Katsuhito Sakurai
  • Patent number: 8451360
    Abstract: A solid-state imaging apparatus that shortens a time for reading out pixel signals of all pixels and improves the aperture ratio of pixels is provided. The solid-state imaging apparatus includes a plurality of pixels (3) arranged in a matrix along a plurality of rows and columns, in which each of the pixels includes a photoelectric conversion element and a color filter; a plurality of buffers (2) arranged with each one corresponding to a plurality of pixels; and a plurality of vertical output lines (1) arranged such that two or more of the vertical output lines (1) are arranged correspondingly to one of the columns of the pixels; in which an input node of each of the buffers is connected commonly to a plurality of pixels having color filters of different colors, and output nodes of the plurality of buffers are connected alternately to a plurality of vertical output lines.
    Type: Grant
    Filed: April 26, 2010
    Date of Patent: May 28, 2013
    Assignee: Canon Kabushiki Kaisha
    Inventors: Kohichi Nakamura, Hiroki Hiyama
  • Patent number: 8427565
    Abstract: A solid-state imaging apparatus includes a reference signal generating circuit for supplying, commonly to the plurality of A/D conversion circuits, at least two reference signals of which signal levels change toward different directions of electric potential, and the A/D conversion circuit includes an amplifier; an input capacitor having one terminal receiving the analog signal and the reference signal supplied from the reference signal generating circuit, and the other terminal connected to one input terminal of the amplifier; a feedback capacitor connected between the one input terminal and an output terminal of the amplifier; a comparator for comparing, with a comparing level, an output from the output terminal of the amplifier; and a connection capacitor having one terminal connected to the output terminal of the amplifier, and the other terminal connected to one input terminal of the comparator.
    Type: Grant
    Filed: May 7, 2012
    Date of Patent: April 23, 2013
    Assignee: Canon Kabushiki Kaisha
    Inventor: Hiroki Hiyama
  • Patent number: 8421889
    Abstract: An apparatus includes a pixel array in which pixels for outputting an analog signal are arranged in a matrix, vertical output lines each of which is connected to pixels in a same column, A/D conversion units, which are individually connected to the vertical output lines, for converting the analog signal into a digital signal, and a constant current supply unit for supplying a constant current to the A/D conversion units. Each of the A/D conversion units includes an integration unit for integrating the constant current, a comparison unit for comparing the integrated constant current with the analog signal and outputting a comparison signal, and a digital signal storage unit for storing a digital signal corresponding to the comparison signal. The integration unit includes an input capacitor for receiving the constant current. The comparison unit is connected to the constant current supply unit via the input capacitor.
    Type: Grant
    Filed: October 28, 2009
    Date of Patent: April 16, 2013
    Assignee: Canon Kabushiki Kaisha
    Inventors: Hiroki Hiyama, Masaaki Iwane, Kazuo Yamazaki
  • Publication number: 20130087686
    Abstract: A solid-state imaging apparatus includes a plurality of pixels arrayed in a matrix, and configured to generate signals by photoelectric conversion; a plurality of read-out circuits disposed on each column of the plurality of pixels arrayed in a matrix pattern, and configured to read out the signals from the plurality of pixels; a plurality of comparison units configured to compare the signals output from the plurality of read-out circuits with a reference signal whose level changes with time; a counter configured to count a clock signal after the level of the reference signal starts a change; a storage unit configured, when a magnitude relationship between the signals output from the plurality of the read-out circuits and the reference signal is reversed; and a reset unit configured to reset the count value stored in the storage unit.
    Type: Application
    Filed: September 11, 2012
    Publication date: April 11, 2013
    Applicant: CANON KABUSHIKI KAISHA
    Inventors: Tetsuya Itano, Hiroki Hiyama, Kazuhiro Saito, Kohichi Nakamura, Yu Maehashi
  • Publication number: 20130088627
    Abstract: A photoelectric conversion device includes a counter circuit configured to count a first clock signal to output a count signal thereof, a second clock signal generation unit configured to generate a second clock signal based on the first clock signal, and a clock synchronization unit configured to output a count start signal in synchronization with the second clock signal, wherein the counter circuit performs a counting operation in response to the count start signal synchronized with the second clock signal.
    Type: Application
    Filed: September 12, 2012
    Publication date: April 11, 2013
    Applicant: CANON KABUSHIKI KAISHA
    Inventors: Kohichi Nakamura, Hiroki Hiyama, Tetsuya Itano, Kazuhiro Saito, Yu Machashi, Koichiro Iwata
  • Publication number: 20130088292
    Abstract: A solid-state imaging apparatus includes: an amplifier circuit configured to amplify a signal from pixel; and a reference signal generating circuit configured to generate a ramp signal, wherein feedback capacitor elements having the same structure are electrically connected to a capacitive feedback type amplifier of the amplifier circuit and to a capacitive feedback type amplifier of the reference signal generating circuit respectively, and a connecting configuration between an amplifier of the amplifier circuit and the feedback capacitor element and a connecting configuration between an amplifier of the reference signal generating circuit and the feedback capacitor element are the same.
    Type: Application
    Filed: September 13, 2012
    Publication date: April 11, 2013
    Applicant: CANON KABUSHIKI KAISHA
    Inventors: Yu Maehashi, Hiroki Hiyama, Tetsuya Itano, Kazuhiro Saito, Kohichi Nakamura