Patents by Inventor Hiroki Honda

Hiroki Honda has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 5596221
    Abstract: An n type collector region is formed at a main surface of a p type silicon substrate. A p type base region is formed at a surface of the collector region. An n type emitter region is formed at a surface of the base region. A polycrystalline silicon layer is formed on a surface of the emitter region. An interlayer insulation layer is formed so as to cover the polycrystalline silicon layer. A contact hole is formed on the emitter region through the interlayer insulation layer and the polycrystalline silicon layer and reaching the surface of the emitter region. A metal electrode is formed within contact hole so as to provide contact with the surface of the emitter region. According to this structure, the emitter resistance can be reduced. Thus, the operation speed of a bipolar transistor can be improved.
    Type: Grant
    Filed: June 5, 1995
    Date of Patent: January 21, 1997
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventor: Hiroki Honda
  • Patent number: 5592013
    Abstract: In a semiconductor memory device, an n-well is formed in the memory cell area on the surface of a p-type semiconductor substrate. A p-well is formed on the surface of the n-well, and a memory cell transistor is formed on the surface of the p-well. Another p-well is formed in the peripheral circuit area on the substrate surface, and a peripheral transistor is formed on the surface of the p-well. The p-wells are connected electrically by a conductor layer so that these regions have the same voltage level. The memory cell transistor has its threshold voltage set higher than that of the peripheral transistor. The memory device consumes less power, has less decay of gate oxide film, and is suitable for high-density integration.
    Type: Grant
    Filed: June 6, 1995
    Date of Patent: January 7, 1997
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventor: Hiroki Honda
  • Patent number: 5495120
    Abstract: In a semiconductor device having a bipolar transistor including, on a main surface of a semiconductor substrate, the bipolar transistor and an impurity region of a conductivity type which is different from that of a base region of this bipolar transistor, an impurity for forming the base region is implanted into the entire main surface of a semiconductor substrate to form the base region. Accordingly, the manufacturing costs can be reduced without degrading the performance of the device.
    Type: Grant
    Filed: October 26, 1994
    Date of Patent: February 27, 1996
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventor: Hiroki Honda
  • Patent number: 5480816
    Abstract: On an epitaxial layer (4) serving as a collector layer are formed an emitter layer (10), an intrinsic base layer (9) surrounding the emitter layer (10) while permitting the surface of the emitter layer (10) to be exposed, external base layers (8) and link base layers (7) lying between the intrinsic base layer (9) and external base layers (8). The intrinsic base layer between the emitter layer and the epitaxial layer serving as the collector layer has a relatively high impurity concentration, so that a collector-emitter breakdown voltage is not decreased. The link base layers between the intrinsic base layer and external base layers has a relatively low impurity concentration to suppress decrease in emitter-base junction breakdown voltage.
    Type: Grant
    Filed: July 12, 1994
    Date of Patent: January 2, 1996
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventors: Kimiharu Uga, Hiroki Honda, Masahiro Ishida, Yoshiyuki Ishigaki
  • Patent number: 5471085
    Abstract: An n.sup.+ buried layer is formed on a surface of p.sup.- semiconductor substrate. An n.sup.- epitaxial growth layer and an n.sup.+ diffusion layer are formed on a surface of n.sup.+ buried layer. A p.sup.- base region and p.sup.+ external base region adjoining to each other are formed on a surface of n.sup.- epitaxial growth layer. An an n.sup.+ emitter region is formed at a surface of p.sup.- base region. An emitter electrode is formed adjacently to n.sup.+ emitter region. The emitter electrode is made of polycrystalline silicon doped with phosphorus at a concentration from 1.times.10.sup.20 cm.sup.-3 to 6.times.10.sup.20 cm.sup.-3.
    Type: Grant
    Filed: September 22, 1994
    Date of Patent: November 28, 1995
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventors: Yoshiyuki Ishigaki, Hiroki Honda, Kimiharu Uga, Masahiro Ishida
  • Patent number: 5400723
    Abstract: A method of incinerating wastes while controlling the production of dioxins wherein water vapor or water is sprayed in the main combustion zone of an incinerator. An apparatus for practicing the method of waste incineration, including a line for supplying main combustion air, either alone or together with a line for supplying recycled combustion gas, to the incinerator from below its hearth, is provided with a line for supplying water vapor or water in communication with the line or lines.
    Type: Grant
    Filed: October 29, 1992
    Date of Patent: March 28, 1995
    Assignee: Mitsubishi Jukogyo Kabushiki Kaisha
    Inventors: Satoshi Okuno, Hirotami Yamamoto, Susumu Nishikawa, Hiroki Honda, Yoshinori Terasawa
  • Patent number: 5355009
    Abstract: Insulator films (5) formed on an epitaxial layer (3) are opened such that external base regions (17) are not covered with the insulator films (5). Cross sections (14a) of the insulator films (5) are concavely sloped downward from the insulator films (5) toward an intrinsic base region (18) in the vicinity of the epitaxial layer (3). Base electrodes (15) which are in contact with the insulator films (5) along the cross sections (14a) are connected to the external base regions (17), so that coverage of the base electrodes (15) over the external base regions (17) is improved. The base resistance of a bipolar transistor (101) is reduced.
    Type: Grant
    Filed: April 28, 1992
    Date of Patent: October 11, 1994
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventors: Hiroki Honda, Kimiharu Uga, Masahiro Ishida, Yoshiyuki Ishigaki
  • Patent number: 5350939
    Abstract: An n.sup.- epitaxial layer 4 is formed on the top face of a p type semiconductor substrate 1. A p.sup.+ buried layer 20 is formed by implanting ions in the region extending over the p type semiconductor substrate 1 and the n.sup.- epitaxial layer 4. A p.sup.+ channel stop is formed in the upper layer of the p.sup.+ buried layer 20 by ion implantation. A p well is formed extending from the upper layer of the p.sup.+ channel stop to the top face of the n.sup.- epitaxial layer. An n channel MOS type field effect transistor 200 is formed in the p well 22. It is possible to reliably isolate an element from an adjacent element thereto because of the structure.
    Type: Grant
    Filed: March 25, 1993
    Date of Patent: September 27, 1994
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventors: Hiroki Honda, Kimiharu Uga, Masahiro Ishida, Yoshiyuki Ishigaki
  • Patent number: 5319234
    Abstract: There is disclosed a C-BiCMOS semiconductor device in which a base electrode (300) of an NPN bipolar transistor and a drain electrode (360) of a PMOS transistor are formed of the same polycrystalline semiconductor, in which a base electrode (310) of a PNP bipolar transistor and a drain electrode (350) of an NMOS transistor are formed of the same polycrystalline semiconductor, and in which a source electrode (530) of the PMOS transistor and a source electrode (520) of the NMOS transistor are formed of aluminium wiring. The C-BiCMOS semiconductor device achieves preferable electric conductivity in the source electrodes, size reduction in the drain electrodes, and simplified process steps in the formation of the base electrodes of the bipolar transistors, so that the size of the devices is reduced in simple process steps without deterioration of the electric conductivity.
    Type: Grant
    Filed: July 22, 1992
    Date of Patent: June 7, 1994
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventors: Kimiharu Uga, Hiroki Honda, Masahiro Ishida, Yoshiyuki Ishigaki
  • Patent number: 5269236
    Abstract: A method of preventing dust from adhering to a wall of a combustion apparatus, such as a furnace wall or exhaust duct, is carried out by forcing gas through a porous refractory member forming the wall. Specifically, the furnace wall or exhaust duct wall to which dust might otherwise adhere is made of a porous refractory member and gas is injected through the pores of the refractory member. In an incinerator, the refractory porous member extends around the periphery of a liquid injection nozzle, so that gas fed to the inside of the incinerator through the refractory porous member prevents flower from accumulating at the periphery of the end of the nozzle and attenuates the wake of the injected liquid so as to suppress the entrainment of dust in the liquid. In a melting furnace, the refractory porous members provide the ceiling of a slag separating chamber and the entrance of an exhaust gas duct open to the upper portion of the slag separating chamber.
    Type: Grant
    Filed: May 21, 1992
    Date of Patent: December 14, 1993
    Assignee: Mitsubishi Jukogyo Kabushiki Kaisha
    Inventors: Satoshi Okuno, Toshihisa Gouda, Kazuo Sato, Shizuo Yasuda, Hiroki Honda, Susumu Nishikawa
  • Patent number: 4886068
    Abstract: An ultrasonic coupling agent of low viscosity which comprises at least one aqueous solution selected from an aqueous ethyl alcohol solution and an aqueous glycerin solution, and 75 to 0.1% by weight based on the total weight of the agent of silicone-based oil which is substantially soluble in the aqueous solution. The ethyl alcohol solution is preferably included in the ultrasonic coupling agent in an amount sufficient to invest the agent with a disinfection effect.
    Type: Grant
    Filed: August 11, 1988
    Date of Patent: December 12, 1989
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Nagao Kaneko, Moriyasu Wada, Shiroh Saitoh, Hiroki Honda
  • Patent number: 4651310
    Abstract: There is disclosed a polymeric piezoelectric ultrasonic probe using a polymeric piezoelectric member which comprises a polymeric piezoelectric member; a common electrode formed on one surface of the polymeric piezoelectric member; and electrodes for driving provided as opposed to the common electrode with the polymeric piezoelectric member being interposed therebetween, the electrodes for driving being formed on a polymeric thin film.The polymeric piezoelectric ultrasonic probe of the present invention has advantages that not only breaking or short circuit of electrodes shaped in rectangular strips can be prevented, but also it becomes possible to connect lead wires with good reliability. Besides, not only cumbersomeness is registration of electrodes shaped in rectangular strips during lamination of polymeric piezoelectric members can be cancelled, but also acoustic-electrical coupling or cross-talk can be reduced.
    Type: Grant
    Filed: December 16, 1985
    Date of Patent: March 17, 1987
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Nagao Kaneko, Nanao Nakamura, Masao Koyama, Shiroh Saitoh, Hiroki Honda
  • Patent number: 4583018
    Abstract: Disclosed is an ultrasonic probe comprising a piezoelectric element in which a first and second electrodes provided respectively on both surfaces of a piezoelectric material are arranged in such a way that said electrodes have end portions facing each other near the center of, and with the interposition of, the piezoelectric material.
    Type: Grant
    Filed: November 25, 1983
    Date of Patent: April 15, 1986
    Assignee: Tokyo Shibaura Denki Kabushiki Kaisha
    Inventors: Mamoru Izumi, Syuuzi Suzuki, Hiroki Honda, Isao Uchiumi
  • Patent number: 4320092
    Abstract: Improvements in a reaction vessel which includes a lower cylindrical section conically reduced in diameter toward the outlet end and an upper cylindrical section conically increased in diameter from the inlet end, the two sections being joined endways, and wherein a gas stream is tangentially introduced into the lower cylindrical section and is caused to react, inside the upper section, with a reactant liquid injected into the latter. A horizontal partition is provided within the lower cylindrical section conically reduced in diameter to divide the space therein into an upper and a lower spaces, whereby the gas stream is divided and separately passed, in a spiral flow from the upper space and in a piston flow from the lower space, into the upper cylindrical section.
    Type: Grant
    Filed: August 15, 1980
    Date of Patent: March 16, 1982
    Assignee: Mitsubishi Jukogyo Kabushiki Kaisha
    Inventors: Jyunichi Kondo, Akira Sensyu, Hidetaka Ono, Hiroki Honda