Patents by Inventor Hiroki Miyashita
Hiroki Miyashita has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11964930Abstract: An organic compound represented by formula [1]. In the formula rings Q represented by formula [1-1] are each independently present at positions *1 and *2 such that positions * of the rings Q correspond to the positions *1 and *2. The rings Q may be the same or different. R4 and R5 represent groups each independently selected from the group consisting of a hydrogen atom and a substituted or unsubstituted aryl group. The rings Q are aromatic hydrocarbons. R1 to R3 represent groups each independently selected from the group consisting of a hydrogen atom, a substituted or unsubstituted alkyl group, a substituted or unsubstituted aryl group, and a cyano group. At least one of R1 to R3 represents a cyano group.Type: GrantFiled: September 2, 2020Date of Patent: April 23, 2024Assignee: CANON KABUSHIKI KAISHAInventors: Hiroki Ohrui, Hirokazu Miyashita, Satoru Shiobara, Yosuke Nishide, Naoki Yamada, Jun Kamatani
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Patent number: 11963532Abstract: Soil plant productivity is improved by manipulation of soil microflora. The soil microflora is manipulated by addition of a bacterium belonging to Rhizobium (Rhizobiales) to the soil.Type: GrantFiled: October 1, 2020Date of Patent: April 23, 2024Assignee: MOSIL CO., LTD.Inventor: Hiroki Miyashita
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Publication number: 20240130151Abstract: The present disclosure provides an organic light-emitting element including: a first electrode; a light-emitting layer; and a second electrode, wherein the light-emitting layer contains at least a first compound in which a naphthalene ring and a tricyclic or higher cyclic fused ring are bonded together by a single bond and a second compound in which the naphthalene ring and the fused polycyclic ring of the first compound are further cyclized.Type: ApplicationFiled: September 22, 2023Publication date: April 18, 2024Inventors: HIROKI OHRUI, YOSUKE NISHIDE, HIRONOBU IWAWAKI, TAKAYUKI HORIUCHI, HIROKAZU MIYASHITA, NAOKI YAMADA
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Patent number: 11937526Abstract: A control device for a work vehicle configured or programmed to travel autonomously includes a vehicle position calculator to calculate a vehicle position, a travel direction calculator to calculate a travel direction that is a front-back direction of the vehicle body, a steering state detector to obtain data on a steering state, a vehicle position estimator to calculate an estimated vehicle position at which the work vehicle is to be present after performing predetermined travel from the vehicle position of the work vehicle, a deviation calculator to calculate a deviation of the work vehicle at the estimated vehicle position from the target travel path, a target steering amount calculator to calculate a target steering amount based on the deviation, and an autonomous travel controller to control steering based on the target steering amount.Type: GrantFiled: December 9, 2019Date of Patent: March 26, 2024Assignee: KUBOTA CORPORATIONInventors: Hiroki Suga, Shunsuke Miyashita
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Publication number: 20240099135Abstract: An organic compound represented by the following formula [1]: Ar is selected from the group consisting of a substituted or unsubstituted aryl group and a substituted or unsubstituted heteroaryl group. R1 and R2 are independently selected from the group consisting of a hydrogen atom and a substituent. m and n are selected from integers of 1 or more and 3 or less.Type: ApplicationFiled: August 25, 2023Publication date: March 21, 2024Inventors: HIRONOBU IWAWAKI, HIROKI OHRUI, YOSUKE NISHIDE, HIROKAZU MIYASHITA, TAKAYUKI HORIUCHI, NAOKI YAMADA
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Publication number: 20220361505Abstract: Soil plant productivity is improved by manipulation of soil microflora. The soil microflora is manipulated by addition of a bacterium belonging to Rhizobium (Rhizobiales) to the soil.Type: ApplicationFiled: October 1, 2020Publication date: November 17, 2022Applicant: MOSIL CO., LTD.Inventor: Hiroki Miyashita
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Publication number: 20140140145Abstract: A data input buffer is changed from an inactive to an active state after the reception of instruction for a write operation effected on a memory unit. The input buffer is a differential input buffer having interface specs based on SSTL, for example, which is brought to an active state by turning on a power switch to cause a through current to flow and receives a signal therein while immediately following a small change in small-amplitude signal. Since the input buffer is brought to the active state only when the write operation's instruction for the memory unit is provided, it is rendered inactive in advance before the instruction is provided, whereby wasteful power consumption is reduced. In another aspect, power consumption is reduced by changing from the active to the inactive state in a time period from a write command issuing to a next command issuing.Type: ApplicationFiled: January 26, 2014Publication date: May 22, 2014Applicants: HITACHI DEVICE ENGINEERING CO., LTD., RENESAS ELECTRONICS CORPORATIONInventors: Binhaku TARUISHI, Hiroki MIYASHITA, Ken SHIBATA, Masashi HORIGUCHI
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Patent number: 8644090Abstract: A data input buffer is changed from an inactive to an active state after the reception of instruction for a write operation effected on a memory unit. The input buffer is a differential input buffer having interface specs based on SSTL, for example, which is brought to an active state by turning on a power switch to cause a through current to flow and receives a signal therein while immediately following a small change in small-amplitude signal. Since the input buffer is brought to the active state only when the write operation's instruction for the memory unit is provided, it is rendered inactive in advance before the instruction is provided, whereby wasteful power consumption is reduced. In another aspect, power consumption is reduced by changing from the active to the inactive state in a time period from a write command issuing to a next command issuing.Type: GrantFiled: June 25, 2013Date of Patent: February 4, 2014Assignees: Renesas Electronics Corporation, Hitachi Device Engineering Co., Ltd.Inventors: Binhaku Taruishi, Hiroki Miyashita, Ken Shibata, Masashi Horiguchi
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Publication number: 20130286753Abstract: A data input buffer is changed from an inactive to an active state after the reception of instruction for a write operation effected on a memory unit. The input buffer is a differential input buffer having interface specs based on SSTL, for example, which is brought to an active state by turning on a power switch to cause a through current to flow and receives a signal therein while immediately following a small change in small-amplitude signal. Since the input buffer is brought to the active state only when the write operation's instruction for the memory unit is provided, it is rendered inactive in advance before the instruction is provided, whereby wasteful power consumption is reduced. In another aspect, power consumption is reduced by changing from the active to the inactive state in a time period from a write command issuing to a next command issuing.Type: ApplicationFiled: June 25, 2013Publication date: October 31, 2013Applicant: HITACHI DEVICE ENGINEERING CO., LTD.Inventors: Binhaku TARUISHI, Hiroki MIYASHITA, Ken SHIBATA, Masashi HORIGUCHI
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Patent number: 8482991Abstract: A data input buffer is changed from an inactive to an active state after the reception of instruction for a write operation effected on a memory unit. The input buffer is a differential input buffer having interface specs based on SSTL, for example, which is brought to an active state by turning on a power switch to cause a through current to flow and receives a signal therein while immediately following a small change in small-amplitude signal. Since the input buffer is brought to the active state only when the write operation's instruction for the memory unit is provided, it is rendered inactive in advance before the instruction is provided, whereby wasteful power consumption is reduced. In another aspect, power consumption is reduced by changing from the active to the inactive state in a time period from a write command issuing to a next command issuing.Type: GrantFiled: August 31, 2012Date of Patent: July 9, 2013Assignee: Renesas Electronics CorporationInventors: Binhaku Taruishi, Hiroki Miyashita, Ken Shibata, Masashi Horiguchi
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Publication number: 20120327723Abstract: A data input buffer is changed from an inactive to an active state after the reception of instruction for a write operation effected on a memory unit. The input buffer is a differential input buffer having interface specs based on SSTL, for example, which is brought to an active state by turning on a power switch to cause a through current to flow and receives a signal therein while immediately following a small change in small-amplitude signal. Since the input buffer is brought to the active state only when the write operation's instruction for the memory unit is provided, it is rendered inactive in advance before the instruction is provided, whereby wasteful power consumption is reduced. In another aspect, power consumption is reduced by changing from the active to the inactive state in a time period from a write command issuing to a next command issuing.Type: ApplicationFiled: August 31, 2012Publication date: December 27, 2012Inventors: Binhaku Taruishi, Hiroki Miyashita, Ken Shibata, Masashi Horiguchi
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Patent number: 8264893Abstract: A data input buffer is changed from an inactive to an active state after the reception of instruction for a write operation effected on a memory unit. The input buffer is a differential input buffer having interface specs based on SSTL, for example, which is brought to an active state by turning on a power switch to cause a through current to flow and receives a signal therein while immediately following a small change in small-amplitude signal. Since the input buffer is brought to the active state only when the write operation's instruction for the memory unit is provided, it is rendered inactive in advance before the instruction is provided, whereby wasteful power consumption is reduced. In another aspect, power consumption is reduced by changing from the active to the inactive state in a time period from a write command issuing to a next command issuing.Type: GrantFiled: September 21, 2011Date of Patent: September 11, 2012Assignees: Renesas Electronics Corporation, Hitachi Device Engineering Co., Ltd.Inventors: Binhaku Taruishi, Hiroki Miyashita, Ken Shibata, Masashi Horiguchi
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Patent number: 8179733Abstract: A clock-generating circuit for forming internal clock signals by comparing a signal obtained by delaying, through a variable delay circuit, an input clock signal input through an external terminal with the input clock signal through a phase comparator circuit, and so controlling the delay time of the variable delay circuit that they are brought into agreement with each other, wherein the clock-generating circuit and an internal circuit to be operated by the clock signals formed thereby are formed on a common semiconductor substrate, and an element-forming region in which the clock-generating circuit is formed is electrically isolated from an element-forming region in which the digital circuit is constituted on the semiconductor substrate relying upon the element-isolation technology. The power-source passages, too, are formed independently of other digital circuits.Type: GrantFiled: April 6, 2011Date of Patent: May 15, 2012Assignee: Renesas Electronics CorporationInventors: Yuichi Okuda, Masaru Kokubo, Yoshinobu Nakagome, Hideharu Yahata, Hiroki Miyashita
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Publication number: 20120069692Abstract: A data input buffer is changed from an inactive to an active state after the reception of instruction for a write operation effected on a memory unit. The input buffer is a differential input buffer having interface specs based on SSTL, for example, which is brought to an active state by turning on a power switch to cause a through current to flow and receives a signal therein while immediately following a small change in small-amplitude signal. Since the input buffer is brought to the active state only when the write operation's instruction for the memory unit is provided, it is rendered inactive in advance before the instruction is provided, whereby wasteful power consumption is reduced. In another aspect, power consumption is reduced by changing from the active to the inactive state in a time period from a write command issuing to a next command issuing.Type: ApplicationFiled: September 21, 2011Publication date: March 22, 2012Inventors: BINHAKU TARUISHI, HIROKI MIYASHITA, KEN SHIBATA, MASASHI HORIGUCHI
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Patent number: 8031546Abstract: In a semiconductor device having a data input buffer capable of inputting write data to each of memory units, the data input buffer is changed from an inactive state to an active state after the reception of instruction for a write operation effected on the memory unit. The data input buffer is a differential input buffer having interface specs based on SSTL, for example, which is brought to an active state by the turning on of a power switch to thereby cause a through current to flow and receives a signal therein while immediately following a small change in small-amplitude signal. Since the input buffer is brought to the active state only when the write operation's instruction for the memory unit is provided, the data input buffer is rendered inactive in advance, before the instruction for the write operation is provided, whereby wasteful power consumption is reduced.Type: GrantFiled: February 23, 2010Date of Patent: October 4, 2011Assignees: Renesas Electronics Corporation, Hitachi Device Engineering Co., Ltd.Inventors: Binhaku Taruishi, Hiroki Miyashita, Ken Shibata, Masashi Horiguchi
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Publication number: 20110182127Abstract: A clock-generating circuit for forming internal clock signals by comparing a signal obtained by delaying, through a variable delay circuit, an input clock signal input through an external terminal with the input clock signal through a phase comparator circuit, and so controlling the delay time of the variable delay circuit that they are brought into agreement with each other, wherein the clock-generating circuit and an internal circuit to be operated by the clock signals formed thereby are formed on a common semiconductor substrate, and an element-forming region in which the clock-generating circuit is formed is electrically isolated from an element-forming region in which the digital circuit is constituted on the semiconductor substrate relying upon the element-isolation technology. The power-source passages, too, are formed independently of other digital circuits.Type: ApplicationFiled: April 6, 2011Publication date: July 28, 2011Inventors: YUICHI OKUDA, Masaru Kokubo, Yoshinobu Nakagome, Hideharu Yahata, Hiroki Miyashita
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Publication number: 20110158908Abstract: Disclosed are: a composition and a method for the diagnosis and/or the treatment of a CSABP-related disease, the regulation of the proliferation of an RNA virus and the regulation of an RNA-metabolizing system, which targets a cyclosporin A-binding protein (CSABP); a method for the screening of a component that targets a CSABP; a composition and a method for the detection/inhibition of CsA, NS5B or cyclosphilin B by utilizing a CSABP; a promoter for a CSABP; a method for the screening of a substance capable of regulating the expression of a CSABP by utilizing the promoter; and a method for the determination of the occurrence or clinical stage of a CSABP-related disease.Type: ApplicationFiled: August 22, 2008Publication date: June 30, 2011Applicant: Sapporo Medical UniversityInventors: Hiroeki Sahara, Yoko Mori, Nobuaki Takahashi, Noriyuki Sato, Fumio Sugawara, Kengo Sakaguchi, Kengo Morohashi, Kazuki Iwabata, Koichi Watashi, Kunitada Shimotohno, Kokichi Kikuchi, Wataru Tsutae, Hiroki Miyashita
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Patent number: 7936621Abstract: A clock-generating circuit for forming internal clock signals by comparing a signal obtained by delaying, through a variable delay circuit, an input clock signal input through an external terminal with the input clock signal through a phase comparator circuit, and so controlling the delay time of the variable delay circuit that they are brought into agreement with each other, wherein the clock-generating circuit and an internal circuit to be operated by the clock signals formed thereby are formed on a common semiconductor substrate, and an element-forming region in which the clock-generating circuit is formed is electrically isolated from an element-forming region in which the digital circuit is constituted on the semiconductor substrate relying upon the element-isolation technology. The power-source passages, too, are formed independently of other digital circuits.Type: GrantFiled: October 12, 2009Date of Patent: May 3, 2011Assignee: Renesas Electronics CorporationInventors: Yuichi Okuda, Masaru Kokubo, Yoshinobu Nakagome, Hideharu Yahata, Hiroki Miyashita
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Publication number: 20100149883Abstract: In a semiconductor device having a data input buffer capable of inputting write data to each of memory units, the data input buffer is changed from an inactive state to an active state after the reception of instruction for a write operation effected on the memory unit. The data input buffer is a differential input buffer having interface specs based on SSTL, for example, which is brought to an active state by the turning on of a power switch to thereby cause a through current to flow and receives a signal therein while immediately following a small change in small-amplitude signal. Since the input buffer is brought to the active state only when the write operation's instruction for the memory unit is provided, the data input buffer is rendered inactive in advance, before the instruction for the write operation is provided, whereby wasteful power consumption is reduced.Type: ApplicationFiled: February 23, 2010Publication date: June 17, 2010Inventors: Binhaku Taruishi, Hiroki Miyashita, Ken Shibata, Masashi Horiguchi
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Patent number: 7693000Abstract: In a semiconductor device having a data input buffer capable of inputting write data to each of memory units, the data input buffer is changed from an inactive state to an active state after the reception of instruction for a write operation effected on the memory unit. The data input buffer is a differential input buffer having interface specs based on SSTL, for example; which is brought to an active state by the turning on of a power switch to thereby cause a through current to flow and receives a signal therein while immediately following a small change in small-amplitude signal. Since the input buffer is brought to the active state only when the write operation's instruction for the memory unit is provided, the data input buffer is rendered inactive in advance, before the instruction for the write operation is provided, whereby wasteful power consumption is reduced.Type: GrantFiled: October 15, 2008Date of Patent: April 6, 2010Assignees: Renesas Technology Corp., Hitachi Device Engineering Co., LtdInventors: Binhaku Taruishi, Hiroki Miyashita, Ken Shibata, Masashi Horiguchi