Abstract: A reference voltage generation circuit of the invention includes: PMOS transistors P1 and P2 configured to provide current sources with same current to a first current path and a second current path; a bipolar transistor Q1 connected to the PMOS transistors P1 on the first current path; a bipolar transistor Q2 connected to the PMOS transistors P2 on the second current path; a differential amplifier AMP controlling the gates of the PMOS transistors P1 and P2, such that a voltage of a node VN and a voltage of a node VP are equal; an output node BGR outputting a reference voltage Vref; and a reference voltage guarantee portion 130 outputting a detecting signal BGRDET when a differences between the voltage of the node VN and the voltage of the node VP is maintained below a determined value.

Abstract: In an air-conditioning apparatus in which air sucked into a casing of an outdoor unit by a fan is discharged from an upper portion of the casing, each of liquid header portions is configured to be connected with each of heat transfer tubes of a plurality of divided regions formed by dividing the outdoor heat exchangers in an up and down direction. Further, a shunt is configured to supply two-phase refrigerant, in which quality is adjusted by a gas-liquid separator, to each of the liquid header portions. To each of the liquid header portions, the shunt supplies the two-phase refrigerant of the amount corresponding to the air quantity of the divided region connected to each of the liquid header portions.

Abstract: A protection method is provided to make it difficult to reverse engineer operational information. The present invention provides a protection method for preventing reverse engineering, including: generating an expected value during normal operation; monitoring voltage waveforms at monitoring points of the semiconductor integrated circuit; comparing a measured value generated in the monitored voltage waveforms with the expected value; determining whether reverse engineering is taking place or not based on comparison results; and when reverse engineering is taking place, controlling the semiconductor integrated circuit to run in a protection mode, which different from its normal operation.

Abstract: A torque sensor is configured to detect torque even when an abnormality has occurred in one magnetic sensor among multiple magnetic sensors. An electric power steering apparatus using the torque sensor is provided. The torque sensor includes a first magnetic sensor between a first magnetic collection mechanism and a second magnetic collection mechanism, a second magnetic sensor between the first and second magnetic collection mechanisms and disposed at a same position as or a symmetric position to a magnetic environment of the first magnetic sensor, and a third magnetic sensor between the first and second magnetic collection mechanisms and disposed at a same position as or a symmetric position to the magnetic environments of the first and second magnetic sensors. The torque sensor detects torque generated on a rotational member based on an output signal of the first, second, or third magnetic sensor.

Abstract: A charge pump circuit that suppresses low boost efficiency is provided. The charge pump circuit 100 of the invention includes a main pump circuit CPn_M and a gate controlling pump circuit CPn_G controlling the main pump circuit CPn_M. The main pump circuit has the same basic configuration as the controlling pump circuit, which are both KER-type pump circuits. The controlling pump circuit controls the operation of a transistor of the main pump circuit after the main pump circuit is boosted, so that reverse current will not flow from the main pump circuit to the forward section of the pump circuit.

Abstract: There is provided a substrate processing method including: reducing an oxide of a ruthenium film by supplying a hydrogen-containing gas to a substrate including the ruthenium film; etching the ruthenium film by supplying an oxygen-containing gas to the substrate so as to oxidize the ruthenium film; and repeating, multiple times, a cycle including reducing the oxide of the ruthenium film and etching the ruthenium film.

Abstract: A liquid blow molding method of molding a preform into a liquid-containing container includes: a first nozzle descending step of descending a blow nozzle to a first position at which the blow nozzle does not seal the mouth part; a gas-liquid replacement step of supplying a liquid into the preform from the blow nozzle at the first position and discharging air inside the preform to outside; a second nozzle descending step of descending the blow nozzle to a second position at which the blow nozzle seals the mouth part, after the gas-liquid replacement step; and a blow molding step of supplying the liquid into the preform from the blow nozzle at the second position to blow mold the preform into the predetermined shape.

Abstract: A charge pump circuit that suppresses low boost efficiency is provided. The charge pump circuit 100 of the invention includes a main pump circuit CPn_M and a gate controlling pump circuit CPn_G controlling the main pump circuit CPn_M. The main pump circuit has the same basic configuration as the controlling pump circuit, which are both KER-type pump circuits. The controlling pump circuit controls the operation of a transistor of the main pump circuit after the main pump circuit is boosted, so that reverse current will not flow from the main pump circuit to the forward section of the pump circuit.

Abstract: An object of the present invention is to provide a connector that restricts a movement amount in a direction of detachment between connectors even when an engagement mechanism between the connectors is disengaged. A connector is configured to be used to electrically connect a first electronic device and a second electronic device to each other. This connector includes a fixation-side connector provided on a first electronic device side and including a tubularly formed insertion portion, an electric wire-side connector connected to the second electronic device via an electric wire and configured to be inserted in the insertion portion of the fixation-side connector, and a restriction portion provided on an opposite side of the electric wire-side connector from an insertion direction that is a direction in which the electric wire-side connector is inserted into the insertion portion outside the fixation-side connector and the electric wire-side connector.

Abstract: In a mask pattern forming method, a resist film is formed over a thin film, the resist film is processed into resist patterns having a predetermined pitch by photolithography, slimming of the resist patterns is performed, and an oxide film is formed on the thin film and the resist patterns after an end of the slimming step in a film deposition apparatus by supplying a source gas and an oxygen radical or an oxygen-containing gas. In the mask pattern forming method, the slimming and the oxide film forming are continuously performed in the film deposition apparatus.

Abstract: It is configured to include: a light irradiation unit that emits light; a three-dimensional coordinate measurement unit that measures light reflected from a marker attached to a work and a torch and calculates three-dimensional coordinate data of the work and the torch, the work or the marker reflecting the emitted light; and an arithmetic unit that converts a shape of the work into coordinates based on input three-dimensional graphic data and the three-dimensional coordinate data of the work and generates coordinate data of a shape of the work.

Abstract: A power steering apparatus according to the present invention comprises: a steering mechanism having a steering shaft and a rack bar which steers steer steerable wheels by a movement in an axial direction of the rack bar in association with a rotation of steering shaft; an electrically driven motor having a stator, a rotor, and a drive shaft integrally rotated with the rotor; a worm gear transmitting the rotation of the drive shaft to the steering mechanism; a housing member having a reduction gear housing section, a rack bar housing section, and a motor ECU housing section in which the electrically driven motor and the control circuit are housed; and a moisture detection sensor having a moisture detection section disposed within the reduction gear housing section and a transmission section connected with the control circuit passing through an inner part of the motor ECU housing from the moisture detection section.

Abstract: A semiconductor memory device is provided. The semiconductor memory device includes a memory cell array, a read only memory (ROM), a central processing unit, and a random access memory (RAM). The memory cell array stores data related to operating conditions of the semiconductor memory device. The ROM stores data used to control an operation of the semiconductor memory device. The central processing unit controls the operation of the semiconductor memory device according to the data read from the ROM. The central processing unit reads the data related to the operating conditions from the memory cell array in response to a requested operation and then temporarily stores the read data related to the operating conditions in the RAM. The central processing unit further reads the data related to the data related to the operating conditions from the RAM for controlling the operation of the semiconductor memory device.

Abstract: A protection method is provided to make it difficult to reverse engineer operational information. The present invention provides a protection method for preventing reverse engineering, including: generating an expected value during normal operation; monitoring voltage waveforms at monitoring points of the semiconductor integrated circuit; comparing a measured value generated in the monitored voltage waveforms with the expected value; determining whether reverse engineering is taking place or not based on comparison results; and when reverse engineering is taking place, controlling the semiconductor integrated circuit to run in a protection mode, which different from its normal operation.

Abstract: A reference voltage generation circuit of the invention includes: PMOS transistors P1 and P2 configured to provide current sources with same current to a first current path and a second current path; a bipolar transistor Q1 connected to the PMOS transistors P1 on the first current path; a bipolar transistor Q2 connected to the PMOS transistors P2 on the second current path; a differential amplifier AMP controlling the gates of the PMOS transistors P1 and P2, such that a voltage of a node VN and a voltage of a node VP are equal; an output node BGR outputting a reference voltage Vref; and a reference voltage guarantee portion 130 outputting a detecting signal BGRDET when a differences between the voltage of the node VN and the voltage of the node VP is maintained below a determined value.

Abstract: A charge pump circuit that suppresses low boost efficiency is provided. The charge pump circuit 100 of the invention includes a main pump circuit CPn_M and a gate controlling pump circuit CPn_G controlling the main pump circuit CPn_M. The main pump circuit has the same basic configuration as the controlling pump circuit, which are both KER-type pump circuits. The controlling pump circuit controls the operation of a transistor of the main pump circuit after the main pump circuit is boosted, so that reverse current will not flow from the main pump circuit to the forward section of the pump circuit.

Abstract: A voltage generation circuit, having a circuit scale significantly reduced as compared with the related art, is provided. The voltage generation circuit of the disclosure includes a charge pump outputting a boosted voltage to an output node, a resistor connected between the output node and another output node, and a current source circuit having first and second current paths connected in parallel between the another output node and a reference potential. The first current path includes a resistor and a first DAC. The first DAC generates a first constant current corresponding to a voltage generation code. The second current path includes a second DAC. The second DAC generates a second constant current corresponding to a code obtained by inverting the voltage generation code. Thereby, a driving voltage obtained by lowering the boosted voltage is generated at the other output node.

Abstract: A nitride film forming method includes repeating a cycle a plurality of times, wherein the cycle includes: forming a layer containing an element to be nitrided on a substrate by supplying a source gas including the element to the substrate; plasmarizing a modifying gas including a hydrogen gas, and modifying the layer containing the element with the plasmarized modifying gas; and activating a nitriding gas including nitrogen by heat, and thermally nitriding the layer containing the element with the nitriding gas activated by heat.

Abstract: There is provided an etching method which includes supplying an etching gas including an H2 gas or an NH3 gas to a target substrate having a germanium portion in an excited state; and etching the germanium portion.

Abstract: A semiconductor memory device which is able to perform a power sequence with high reliability is provided. When a power from an external device is supplied, the controller of the flash memory of the invention is configured to read codes stored in a read-only memory in synchronization with a clock signal to perform a power-on sequence. In addition, the controller is further configured to deactivate the clock signal so as to pause the power-on sequence when it has been detected during the power-on sequence that the voltage of the power is not greater than a threshold, and to activate the clock signal to resume the power-on sequence when it is detected that the voltage of the supplied power exceeds the threshold again.