Abstract: A method for producing a semiconductor device includes a first step of forming a fin-shaped semiconductor layer on a semiconductor substrate and forming a first insulating film; a second step of forming a pillar-shaped semiconductor layer and a first dummy gate; a third step of forming a second dummy gate; a fourth step of forming a fifth insulating film and a sixth insulating film; a fifth step of depositing a first interlayer insulating film, removing the second dummy gate and the first dummy gate, forming a gate insulating film, depositing metal, and performing etch back to form a gate electrode and a gate line; a seventh step of forming a seventh insulating film; and an eighth step of forming insulating film sidewalls, forming a first epitaxially grown layer on the fin-shaped semiconductor layer, and forming a second epitaxially grown layer on the pillar-shaped semiconductor layer.

Abstract: A semiconductor device includes a fin-shaped silicon layer on a silicon substrate. A first insulating film is around the fin-shaped silicon layer and a pillar-shaped silicon layer is on the fin-shaped silicon layer. A gate insulating film is around the pillar-shaped silicon layer. A metal gate electrode is around the gate insulating film and a metal gate line is connected to the metal gate electrode. A metal gate pad is connected to the metal gate line, and a width of the metal gate electrode and a width of the metal gate pad is larger than a width of the metal gate line.

Abstract: A method for producing a semiconductor device includes a first step of forming a fin-shaped semiconductor layer on a semiconductor substrate, and forming a first insulating film; a second step of forming a second insulating film, and forming a pillar-shaped semiconductor layer, a first dummy gate, and a first hard mask; a third step of forming a second hard mask on a side wall of the first hard mask, and etching a second polysilicon so as to be left on side walls of the first dummy gate and the pillar-shaped semiconductor layer to form a second dummy gate; and a fourth step of forming a fifth insulating film around the second dummy gate, etching the fifth insulating film so as to have a sidewall shape to form a sidewall formed of the fifth insulating film, and forming a first epitaxially grown layer on the fin-shaped semiconductor layer.

Abstract: A method for producing a semiconductor device includes a first step of forming a fin-shaped semiconductor layer on a semiconductor substrate and forming a first insulating film around the fin-shaped semiconductor layer; a second step of forming a pillar-shaped semiconductor layer and a first dummy gate formed of a first polysilicon; a third step of forming a second dummy gate on side walls of the first dummy gate and the pillar-shaped semiconductor layer; a fourth step of forming a side wall formed of a fifth insulating film around the second dummy gate, forming a second diffusion layer in an upper portion of the fin-shaped semiconductor layer and a lower portion of the pillar-shaped semiconductor layer, and forming a metal-semiconductor compound on the second diffusion layer; a fifth step of forming a gate electrode and a gate line; and a sixth step of depositing a sixth insulating film, forming a third resist for forming a contact hole on the pillar-shaped semiconductor layer, etching the sixth insulating f

Abstract: A semiconductor device includes a fin-shaped semiconductor layer on a surface of a semiconductor substrate having a longitudinal axis extending in a first direction parallel to the surface. A first insulating film is around the fin-shaped semiconductor layer and a pillar-shaped semiconductor layer is on the fin-shaped semiconductor layer. A pillar diameter of the bottom of the pillar-shaped semiconductor layer is equal to a fin width of the top of the fin-shaped semiconductor layer, the pillar diameter and the fin width parallel to the surface. A gate insulating film is around the pillar-shaped semiconductor layer and a metal gate electrode is around the gate insulating film. A metal gate wiring is connected to the metal gate electrode and has a longitudinal axis extending in a second direction parallel to the surface and perpendicular to the first direction of the longitudinal axis of the fin-shaped semiconductor layer.

Abstract: A method for producing a semiconductor device includes forming a fin-shaped semiconductor layer on a semiconductor substrate and a first pillar-shaped semiconductor layer, a first dummy gate layer and a second pillar-shaped semiconductor layer, and a second dummy gate layer. Third and fourth dummy gate layers are formed on sidewalls of the first dummy layer gate, the first pillar-shaped semiconductor layer, the second dummy gate layer and the second pillar-shaped semiconductor layer. An interlayer insulating film is deposited, the dummy gate layers are removed, and a gate insulator is formed film around the first and second pillar-shaped semiconductor layers. A first metal is deposited and a gate electrode and a gate line are formed around the first pillar-shaped semiconductor layer. Second and third metals are deposited and a first contact and a pillar-shaped resistance-changing layer, a lower electrode, and a reset gate are formed.

Abstract: A semiconductor device includes a fin-shaped silicon layer on a silicon substrate surface. The fin-shaped silicon layer has a longitudinal axis extending in a first direction parallel to the surface and a first insulating film is around the fin-shaped silicon layer. A pillar-shaped silicon layer is on the fin-shaped silicon layer, and a pillar diameter of the bottom of the pillar-shaped silicon layer is equal to a fin width of the top of the fin-shaped silicon layer. The pillar diameter and the fin width are parallel to the surface. A gate insulating film is around the pillar-shaped silicon layer and a metal gate electrode is around the gate insulating film. A metal gate wiring is connected to the metal gate electrode and has a longitudinal axis extending in a second direction parallel to the surface and perpendicular to the first direction of the longitudinal axis of the fin-shaped silicon layer.

Abstract: A method for manufacturing a semiconductor device includes etching a semiconductor substrate to form a fin-shaped semiconductor layer. After forming the fin-shaped semiconductor layer, a first insulating film is deposited around the fin-shaped semiconductor layer. The first insulating film is etched back to expose an upper portion of the fin-shaped semiconductor layer and a second resist is formed so as to be perpendicular to the fin-shaped semiconductor layer. The fin-shaped semiconductor layer is etched to form a pillar-shaped semiconductor layer, such that a portion where the fin-shaped semiconductor layer and the second resist intersect at right angles defines the pillar-shaped semiconductor layer.

Abstract: A gaming machine executes the processes of: accepting the selection of a condition required to start a normal game from plural start conditions by an input device; incrementing the number of game play in a counter corresponding to a selected start condition, at the start of the normal game; awarding a benefit based on the result of the normal game displayed on a display device and the selected start condition; determining whether the number of game play in the counter reaches a threshold game play count, and awarding the right to run the free game for a predetermined number of times when the number of game play reaches the threshold game play count; and in the free game, based on the result of the free game displayed on the display device and the start condition corresponding to the counter reaching the threshold game play count, awarding the benefit.

Abstract: A semiconductor device includes a pillar-shaped semiconductor having an impurity concentration of 1017 cm?3 or less. A first insulator surrounds the pillar-shaped semiconductor and a first metal surrounds a portion of the first insulator at a first end of the pillar-shaped semiconductor. A second metal surrounds a portion of the first insulator at a second end of the pillar-shaped semiconductor, and a third metal surrounds a portion of the first insulator in a region between the first and second metals. A second insulator resides between the first metal and the third metal, and a third insulator resides between the second metal and the third metal. The first metal is electrically connected to the first end of the pillar-shaped semiconductor, and the second metal is electrically connected to the second end of the pillar-shaped semiconductor. The third metal has a work function of about 4.2 eV to about 5.0 eV.

Abstract: A method for producing a semiconductor device includes depositing an oxide film containing an impurity having a first conductivity type on a substrate. A nitride film is deposited and a first oxide film is deposited that contains an impurity having a second conductivity type that differs from the first conductivity type. The first oxide film, the nitride film, and the second oxide film are etched to form a contact hole. An epitaxial growth process is carried out form a first pillar-shaped silicon layer in the contact hole. The nitride film is removed and epitaxial growth process is performed to form an output terminal.

Abstract: A semiconductor device production method includes a first step of forming a planar silicon layer on a silicon substrate and forming first and second pillar-shaped silicon layers on the planar silicon layer; a second step of forming a gate insulating film around the first and second pillar-shaped silicon layers, forming a metal film and a polysilicon film around the gate insulating film, controlling a thickness of the polysilicon film to be smaller than a half of a distance between the first and second pillar-shaped silicon layers, depositing a resist, exposing the polysilicon film on side walls of upper portions of the first and second pillar-shaped semiconductor layers, etching-away the exposed polysilicon film, stripping the third resist, and etching-away the metal film; and a third step of forming a resist for forming a gate line and performing anisotropic etching to form a gate line and first and second gate electrodes.

Abstract: A semiconductor device includes a pillar-shaped resistance-changing layer and a reset gate insulating film that surrounds the pillar-shaped resistance-changing layer. A reset gate surrounds the reset gate insulating film, and the reset gate is electrically insulated from the pillar-shaped resistance-changing layer.

Abstract: A method for producing a semiconductor device includes forming a first fin-shaped silicon layer and a second fin-shaped silicon layer on a substrate using a sidewall formed around a dummy pattern on the substrate. A first insulating film is formed around the first fin-shaped silicon layer and the second fin-shaped silicon layer. A first pillar-shaped silicon layer is formed in an upper portion of the first fin-shaped silicon layer, and a second pillar-shaped silicon layer is formed in an upper portion of the second fin-shaped silicon layer.

Abstract: A method for producing a semiconductor device includes forming a first fin-shaped semiconductor layer and a second fin-shaped semiconductor layer on a substrate using a sidewall formed around a dummy pattern on the substrate. A first insulating film is formed around the first fin-shaped semiconductor layer and the second fin-shaped semiconductor layer. A first pillar-shaped semiconductor layer is formed in an upper portion of the first fin-shaped semiconductor layer, and a second pillar-shaped semiconductor layer is formed in an upper portion of the second fin-shaped semiconductor layer.

Abstract: A device includes a pillar-shaped insulating layer above a first pillar-shaped semiconductor layer. A resistance-changing film is around an upper portion of the pillar-shaped insulating layer and a lower electrode is around a lower portion of the pillar-shaped insulating layer and connected to the resistance-changing film. A reset gate insulating film surrounds the resistance-changing film, and a reset gate surrounds the reset gate insulating film.

Abstract: The object to provide a semiconductor device comprising a highly-integrated SGT-based CMOS inverter circuit is achieved by forming an inverter which comprises: a first transistor including; an first island-shaped semiconductor layer; a first gate insulating film; a gate electrode; a first first-conductive-type high-concentration semiconductor layer arranged above the first island-shaped semiconductor layer; and a second first-conductive-type high-concentration semiconductor layer arranged below the first island-shaped semiconductor layer, and a second transistor including; a second gate insulating film surrounding a part of the periphery of the gate electrode; a second semiconductor layer in contact with a part of the periphery of the second gate insulating film; a first second-conductive-type high-concentration semiconductor layer arranged above the second semiconductor layer; and a second second-conductive-type high-concentration semiconductor layer arranged below the second semiconductor layer.

Abstract: The present invention provides a memory structure including a resistance-changing storage element, which enables a reset operation with a reset gate and in which cross-sectional areas of a resistance-changing film and a lower electrode in a current-flowing direction can be decreased.

Abstract: A semiconductor device includes a first and second fin-shaped semiconductor layers on a substrate. A first insulating film is around the first and second fin-shaped layers. A first and second pillar-shaped semiconductor layers reside on the first and second fin-shaped layers, respectively. A width of a bottom of the first pillar-shaped semiconductor layer is equal to a width of a top of the first fin-shaped semiconductor layer, and a width of a bottom of the second pillar-shaped semiconductor layer is equal to the width of a top of the second fin-shaped semiconductor layer. First and second gate insulating films and first and second metal gate electrodes reside around the first and second pillar-shaped layers, respectively. A metal gate line is connected to the first and second metal gate electrodes and extends in a direction perpendicular to the first and second fin-shaped layers.

Abstract: The present invention provides a memory structure including a resistance-changing storage element, which enables a reset operation with a reset gate and in which cross-sectional areas of a resistance-changing film and a lower electrode in a current-flowing direction can be decreased.