Patents by Inventor Hiroshi Asami

Hiroshi Asami has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10288903
    Abstract: A progressive addition lens includes a portion having a power for viewing a near field, a portion having a power for viewing a distance field further than the near field, and an portion connecting the distance portion and the near portion. The progressive addition lens includes an aspherical object-side surface and an aspherical eyeball-side surface and is formed in rotational symmetry with respect to a center of design of the progressive addition lens. The object-side surface includes a first stable region formed in rotational symmetry with respect to the center of design and including the center of design, and an aspherical region arranged outside of the first stable region to contact the first stable region and formed in rotational symmetry with respect to the center of design. A PV value (Peak to Valley) of a mean surface refractive power in the first stable region is 0.12 D or less.
    Type: Grant
    Filed: June 3, 2015
    Date of Patent: May 14, 2019
    Assignee: HOYA LENS THAILAND LTD.
    Inventors: Tadashi Kaga, Toshihide Shinohara, Ayumu Ito, Hiroshi Asami
  • Publication number: 20190043905
    Abstract: A semiconductor device including a semiconductor substrate having oppositely facing first and second surfaces, the first surface being an active surface and provided with an electronic element thereon, a pad electrode to be connected to the electronic element in a peripheral portion of the electronic element on the active surface, a first opening extending from the second surface toward the pad electrode so as not to reach the first surface of the semiconductor substrate, a second opening formed to reach the pad electrode from a bottom surface of the first opening and having a diameter smaller than that of the first opening, an insulating layer formed to cover sidewall surfaces of the first opening and the second opening, and a conductive layer formed, inside of the insulating layer, to cover at least an inner wall surface of the insulating layer and a bottom surface of the second opening.
    Type: Application
    Filed: August 6, 2018
    Publication date: February 7, 2019
    Applicant: Sony Corporation
    Inventors: Yoshihiro Nabe, Hiroshi Asami, Yuji Takaoka, Yoshimichi Harada
  • Patent number: 10050074
    Abstract: A semiconductor device including a semiconductor substrate having oppositely facing first and second surfaces, the first surface being an active surface and provided with an electronic element thereon, a pad electrode to be connected to the electronic element in a peripheral portion of the electronic element on the active surface, a first opening extending from the second surface toward the pad electrode so as not to reach the first surface of the semiconductor substrate, a second opening formed to reach the pad electrode from a bottom surface of the first opening and having a diameter smaller than that of the first opening, an insulating layer formed to cover sidewall surfaces of the first opening and the second opening, and a conductive layer formed, inside of the insulating layer, to cover at least an inner wall surface of the insulating layer and a bottom surface of the second opening.
    Type: Grant
    Filed: May 27, 2016
    Date of Patent: August 14, 2018
    Assignee: Sony Corporation
    Inventors: Yoshihiro Nabe, Hiroshi Asami, Yuji Takaoka, Yoshimichi Harada
  • Publication number: 20180157062
    Abstract: When an addition power at a position corresponding to a fitting point within a prescription addition power is greater than a target addition power set according to a target distance, the target addition power is set as an addition power between a progression-start point and a progression-end point on a principal meridian, and in addition the average gradient of an addition power between the progression-start point and the fitting point is set to differ from an average gradient of an addition power between the fitting point and the progression-end point. When the addition power at the position corresponding to the fitting point within the prescription addition power is equal to or smaller than the target addition power, a gradient of the addition power is made constant in a partial region including at least the fitting point between the progression-start point and the progression-end point on the principal meridian.
    Type: Application
    Filed: May 26, 2016
    Publication date: June 7, 2018
    Applicant: HOYA LENS THAILAND LTD.
    Inventors: Hiroshi ASAMI, Ayumu ITO
  • Publication number: 20180149883
    Abstract: A vision simulation, on assumption that spectacles are worn, is performed for a first model designed by setting a target additional power of a desirable value at a position corresponding to a fitting point on a principal meridian. A correction amount is computed for correcting the difference between a simulation value obtained for the additional power at the position corresponding to the fitting point on the principal meridian through the vision simulation and the target additional power. A second model is designed by replacing the additional power with a value obtained by the addition of the calculated correction amount to the target additional power.
    Type: Application
    Filed: May 26, 2016
    Publication date: May 31, 2018
    Applicant: HOYA LENS THAILAND LTD.
    Inventors: Hiroshi ASAMI, Ayumu ITO
  • Patent number: 9918388
    Abstract: A circuit substrate includes: a mounting region having an exposed surface that is planarized, and in which a predetermined chip is to be mounted; patterns provided in the mounting region, and including respective top faces that form a part of the exposed surface; and solder bumps provided on the respective patterns, and having substantially same shape as one another.
    Type: Grant
    Filed: December 18, 2013
    Date of Patent: March 13, 2018
    Assignee: SONY CORPORATION
    Inventor: Hiroshi Asami
  • Publication number: 20170335049
    Abstract: A heat curable resin composition which allows voids to be removed by heating and vacuum operation after reflow soldering, and a circuit board with an electronic component mounted thereon are provided. The heat curable resin composition of the present embodiment includes a liquid epoxy resin, a hemiacetal ester derived from monocarboxylic acid and polyvinyl ether, a curing agent, and a filler.
    Type: Application
    Filed: April 5, 2017
    Publication date: November 23, 2017
    Inventors: Yasuhiro TAKASE, Kazuki HANADA, Hiroshi ASAMI
  • Publication number: 20170115510
    Abstract: Progressive addition lens includes a near portion having a power for viewing a near field, a distance portion having a power for viewing a distance field further than the near field, and an intermediate portion connecting the distance portion and the near portion. The progressive addition lens includes an aspherical object-side surface and an aspherical eyeball-side surface and is formed in rotational symmetry with respect to a center of design of the progressive addition lens. The object-side surface includes a first stable region formed in rotational symmetry with respect to the center of design and including the center of design, and an aspherical region arranged outside of the first stable region to contact the first stable region and formed in rotational symmetry with respect to the center of design. A Peak to Valley value of a mean surface refractive power in the first stable region is 0.12 D or less.
    Type: Application
    Filed: June 3, 2015
    Publication date: April 27, 2017
    Applicant: HOYA LENS THAILAND LTD.
    Inventors: Tadashi KAGA, Toshihide SHINOHARA, Ayumu ITO, Hiroshi ASAMI
  • Publication number: 20170082870
    Abstract: A progressive addition lens includes a portion having a power for viewing a near field, a portion having a power for viewing a distance field further than the near field, and an portion connecting the distance portion and the near portion. The progressive addition lens includes an aspherical object-side surface and an aspherical eyeball-side surface and is formed in rotational symmetry with respect to a center of design of the progressive addition lens. The object-side surface includes a first stable region formed in rotational symmetry with respect to the center of design and including the center of design, and an aspherical region arranged outside of the first stable region to contact the first stable region and formed in rotational symmetry with respect to the center of design. A PV value (Peak to Valley) of a mean surface refractive power in the first stable region is 0.12 D or less.
    Type: Application
    Filed: June 3, 2015
    Publication date: March 23, 2017
    Applicant: HOYA LENS THAILAND LTD.
    Inventors: Tadashi KAGA, Toshihide SHINOHARA, Ayumu ITO, Hiroshi ASAMI
  • Publication number: 20160276385
    Abstract: A semiconductor device including a semiconductor substrate having oppositely facing first and second surfaces, the first surface being an active surface and provided with an electronic element thereon, a pad electrode to be connected to the electronic element in a peripheral portion of the electronic element on the active surface, a first opening extending from the second surface toward the pad electrode so as not to reach the first surface of the semiconductor substrate, a second opening formed to reach the pad electrode from a bottom surface of the first opening and having a diameter smaller than that of the first opening, an insulating layer formed to cover sidewall surfaces of the first opening and the second opening, and a conductive layer formed, inside of the insulating layer, to cover at least an inner wall surface of the insulating layer and a bottom surface of the second opening.
    Type: Application
    Filed: May 27, 2016
    Publication date: September 22, 2016
    Inventors: Yoshihiro Nabe, Hiroshi ` Asami, Yuji Takaoka, Yoshimichi Harada
  • Patent number: 9379155
    Abstract: A semiconductor device including a semiconductor substrate having oppositely facing first and second surfaces, the first surface being an active surface and provided with an electronic element thereon, a pad electrode to be connected to the electronic element in a peripheral portion of the electronic element on the active surface, a first opening extending from the second surface toward the pad electrode so as not to reach the first surface of the semiconductor substrate, a second opening formed to reach the pad electrode from a bottom surface of the first opening and having a diameter smaller than that of the first opening, an insulating layer formed to cover sidewall surfaces of the first opening and the second opening, and a conductive layer formed, inside of the insulating layer, to cover at least an inner wall surface of the insulating layer and a bottom surface of the second opening.
    Type: Grant
    Filed: April 17, 2015
    Date of Patent: June 28, 2016
    Assignee: Sony Corporation
    Inventors: Yoshihiro Nabe, Hiroshi Asami, Yuji Takaoka, Yoshimichi Harada
  • Publication number: 20150221690
    Abstract: A semiconductor device including a semiconductor substrate having oppositely facing first and second surfaces, the first surface being an active surface and provided with an electronic element thereon, a pad electrode to be connected to the electronic element in a peripheral portion of the electronic element on the active surface, a first opening extending from the second surface toward the pad electrode so as not to reach the first surface of the semiconductor substrate, a second opening formed to reach the pad electrode from a bottom surface of the first opening and having a diameter smaller than that of the first opening, an insulating layer formed to cover sidewall surfaces of the first opening and the second opening, and a conductive layer formed, inside of the insulating layer, to cover at least an inner wall surface of the insulating layer and a bottom surface of the second opening.
    Type: Application
    Filed: April 17, 2015
    Publication date: August 6, 2015
    Inventors: Yoshihiro Nabe, Hiroshi Asami, Yuji Takaoka, Yoshimichi Harada
  • Patent number: 9041179
    Abstract: A semiconductor device including a semiconductor substrate having oppositely facing first and second surfaces, the first surface being an active surface and provided with an electronic element thereon, a pad electrode to be connected to the electronic element in a peripheral portion of the electronic element on the active surface, a first opening extending from the second surface toward the pad electrode so as not to reach the first surface of the semiconductor substrate, a second opening formed to reach the pad electrode from a bottom surface of the first opening and having a diameter smaller than that of the first opening, an insulating layer formed to cover sidewall surfaces of the first opening and the second opening, and a conductive layer formed, inside of the insulating layer, to cover at least an inner wall surface of the insulating layer and a bottom surface of the second opening.
    Type: Grant
    Filed: March 6, 2014
    Date of Patent: May 26, 2015
    Assignee: SONY CORPORATION
    Inventors: Yoshihiro Nabe, Hiroshi Asami, Yuji Takaoka, Yoshimichi Harada
  • Patent number: 8987899
    Abstract: A circuit board includes: an electrode portion which has a copper layer, a copper oxide layer formed thereon, and a removal portion formed by partially removing the copper oxide layer so as to partially expose the copper layer from the copper oxide layer; and a solder bump for flip chip mounting formed on the copper layer exposed by the removal portion.
    Type: Grant
    Filed: January 24, 2012
    Date of Patent: March 24, 2015
    Assignee: Sony Corporation
    Inventor: Hiroshi Asami
  • Publication number: 20140191382
    Abstract: A circuit substrate includes: a mounting region having an exposed surface that is planarized, and in which a predetermined chip is to be mounted; patterns provided in the mounting region, and including respective top faces that form a part of the exposed surface; and solder bumps provided on the respective patterns, and having substantially same shape as one another.
    Type: Application
    Filed: December 18, 2013
    Publication date: July 10, 2014
    Applicant: Sony Corporation
    Inventor: Hiroshi Asami
  • Publication number: 20140183680
    Abstract: A semiconductor device including a semiconductor substrate having oppositely facing first and second surfaces, the first surface being an active surface and provided with an electronic element thereon, a pad electrode to be connected to the electronic element in a peripheral portion of the electronic element on the active surface, a first opening extending from the second surface toward the pad electrode so as not to reach the first surface of the semiconductor substrate, a second opening formed to reach the pad electrode from a bottom surface of the first opening and having a diameter smaller than that of the first opening, an insulating layer formed to cover sidewall surfaces of the first opening and the second opening, and a conductive layer formed, inside of the insulating layer, to cover at least an inner wall surface of the insulating layer and a bottom surface of the second opening.
    Type: Application
    Filed: March 6, 2014
    Publication date: July 3, 2014
    Applicant: Sony Corporation
    Inventors: Yoshihiro Nabe, Hiroshi Asami, Yuji Takaoka, Yoshimichi Harada
  • Patent number: 8684523
    Abstract: A spectacle lens includes a first region which is located in at least part of a portion of a lens where a pivotal angle of an eyeball of a wearer ranges from 20 to 60 degrees and in which correcting astigmatism has priority over correcting average power based on prescribed power, and a second region which is formed inside the first region and in which correcting the average power has priority over correcting the astigmatism.
    Type: Grant
    Filed: April 20, 2012
    Date of Patent: April 1, 2014
    Assignee: Hoya Lens Manufacturing Philippines Inc.
    Inventors: Osamu Wada, Tadashi Kaga, Hiroshi Asami
  • Patent number: 8455969
    Abstract: A semiconductor device includes a semiconductor substrate having a first electronic circuit and a second electronic circuit formed on an active surface, a pad electrode formed on the active surface by being connected to the first electronic circuit and/or the second electronic circuit, a first opening formed to some point along a depth of the semiconductor substrate toward the pad electrode from a surface opposite to the active surface of the semiconductor substrate, a second opening formed so as to reach the pad electrode from a bottom surface of the first opening, an insulating layer formed by covering sidewall surfaces of the first opening and the second opening, a conductive layer formed by covering at least an inner wall surface of the insulating layer and a bottom surface of the second opening, a third opening formed to some point along the depth of the semiconductor substrate from the surface opposite to the active surface of the semiconductor substrate, and a heat insulator imbedded in the third openi
    Type: Grant
    Filed: April 8, 2008
    Date of Patent: June 4, 2013
    Assignee: Sony Corporation
    Inventors: Yoshihiro Nabe, Masaki Hatano, Hiroshi Asami, Akihiro Morimoto
  • Publication number: 20120286387
    Abstract: A semiconductor device including a semiconductor substrate having oppositely facing first and second surfaces, the first surface being an active surface and provided with an electronic element thereon, a pad electrode to be connected to the electronic element in a peripheral portion of the electronic element on the active surface, a first opening extending from the second surface toward the pad electrode so as not to reach the first surface of the semiconductor substrate, a second opening formed to reach the pad electrode from a bottom surface of the first opening and having a diameter smaller than that of the first opening, an insulating layer formed to cover sidewall surfaces of the first opening and the second opening, and a conductive layer formed, inside of the insulating layer, to cover at least an inner wall surface of the insulating layer and a bottom surface of the second opening.
    Type: Application
    Filed: July 19, 2012
    Publication date: November 15, 2012
    Applicant: SONY CORPORATION
    Inventors: Yoshihiro Nabe, Hiroshi Asami, Yuji Takaoka, Yoshimichi Harada
  • Publication number: 20120274893
    Abstract: A spectacle lens includes a first region which is located in at least part of a portion of a lens where a pivotal angle of an eyeball of a wearer ranges from 20 to 60 degrees and in which correcting astigmatism has priority over correcting average power based on prescribed power, and a second region which is formed inside the first region and in which correcting the average power has priority over correcting the astigmatism.
    Type: Application
    Filed: April 20, 2012
    Publication date: November 1, 2012
    Applicant: SEIKO EPSON CORPORATION
    Inventors: Osamu WADA, Tadashi KAGA, Hiroshi ASAMI