Patents by Inventor Hiroshi Itokawa
Hiroshi Itokawa has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
-
Publication number: 20090263957Abstract: A method of fabricating a semiconductor device according to one embodiment includes: exposing a surface of a semiconductor substrate to a halogen-containing gas that contains at least one of Si and Ge, the semiconductor substrate being provided with a member comprising an oxide and consisting mainly of Si; and exposing the surface of the semiconductor substrate to an atmosphere containing at least one of a Si-containing gas not containing halogen and a Ge-containing gas not containing halogen after starting exposure of the surface of the semiconductor substrate to the halogen-containing gas, thereby epitaxially growing a crystal film containing at least one of Si and Ge on the surface.Type: ApplicationFiled: March 10, 2009Publication date: October 22, 2009Inventors: Ichiro MIZUSHIMA, Shinji Mori, Masahiko Murano, Tsutomu Sato, Takashi Nakao, Hiroshi Itokawa
-
Patent number: 7557040Abstract: A semiconductor device manufacturing method is disclosed. A silicon-containing gate electrode is first formed above the surface of a silicon-containing semiconductor substrate. Then, a sidewall insulating film is formed on the sidewall of the gate electrode and a film of metal is formed on the semiconductor substrate to cover the gate electrode and the sidewall insulating film. The front and back sides of the semiconductor substrate are heated through heat conduction by an ambient gas. Thereby, the metal is caused to react with silicon contained in the semiconductor substrate and the gate electrode to form a metal silicide film.Type: GrantFiled: December 26, 2006Date of Patent: July 7, 2009Assignee: Kabushiki Kaisha ToshibaInventors: Hiroshi Itokawa, Yoshimasa Kawase, Toshihiko Iinuma, Haruko Akutsu, Kyoichi Suguro
-
Publication number: 20090152622Abstract: A semiconductor device includes a first semiconductor region having a channel region, and containing silicon as a main component, second semiconductor regions sandwiching the first semiconductor region, formed of SiGe, and applying stress to the first semiconductor region, cap layers provided on the second semiconductor regions, and formed of silicon containing carbon or SiGe containing carbon, and silicide layers provided on the cap layers, and formed of nickel silicide or nickel-platinum alloy silicide.Type: ApplicationFiled: November 14, 2008Publication date: June 18, 2009Inventors: Hiroshi Itokawa, Ichiro Mizushima
-
Patent number: 7531408Abstract: A method of manufacturing a semiconductor device, including forming a capacitor above a semiconductor substrate, the capacitor including a dielectric film containing Pb, Zr, Ti and O. Forming the capacitor includes forming a crystallized film which contains Pb, Sr, Zr, Ti, Ru and O.Type: GrantFiled: May 25, 2007Date of Patent: May 12, 2009Assignee: Kabushiki Kaisha ToshibaInventors: Keisuke Nakazawa, Koji Yamakawa, Katsuaki Natori, Soichi Yamazaki, Hiroshi Itokawa, Hiroyuki Kanaya
-
Publication number: 20090108412Abstract: A semiconductor substrate includes: a silicon support substrate with a first crystal orientation; a silicon functional substrate which is formed on the silicon support substrate and which has a first crystalline region with a crystal orientation different from the first crystal orientation of the silicon support substrate and a second crystalline region with a crystal orientation equal to the first crystal orientation of the silicon support substrate; and a defect creation-preventing region formed at an interface between the first crystalline region and the second crystalline region of the silicon functional substrate so as to be at least elongated to a main surface of the silicon support substrate.Type: ApplicationFiled: October 27, 2008Publication date: April 30, 2009Inventors: Hiroshi ITOKAWA, Ichiro MIZUSHIMA, Akiko NOMACHI, Yoshitaka TSUNASHIMA
-
Patent number: 7456456Abstract: A semiconductor device according to the present invention comprises a semiconductor substrate, a capacitor including a lower electrode disposed above the semiconductor substrate, a dielectric film disposed above the lower electrode, and an upper electrode disposed above the dielectric film, the upper electrode including metal oxide formed of ABO3 perovskite oxide and containing at least an Ru element as a B site element, and a metal film containing a Ti element being disposed between the dielectric film and the upper electrode.Type: GrantFiled: December 27, 2006Date of Patent: November 25, 2008Assignees: Kabushiki Kaisha Toshiba, Infineon Technologies AGInventors: Hiroshi Itokawa, Koji Yamakawa, Rainer Bruchhaus
-
Patent number: 7402444Abstract: A method of manufacturing a semiconductor device using a wafer emissivity calculated from a wafer reflectivity to calculate a wafer temperature and to calculate target values for heat source optical intensities provided to a plurality of heat sources which heat the wafer and a substrate peripheral structure.Type: GrantFiled: September 13, 2006Date of Patent: July 22, 2008Assignee: Kabushiki Kaisha ToshibaInventors: Yoshimasa Kawase, Hiroshi Itokawa
-
Publication number: 20080160642Abstract: A semiconductor device according to an aspect of the invention comprises a semiconductor substrate, a conductive plug which is connected to an active region of a transistor formed on the semiconductor substrate, a metal silicide film which covers a bottom surface portion and side surface portion of the conductive plug, and an electrode structure which is formed on the conductive plug.Type: ApplicationFiled: March 11, 2008Publication date: July 3, 2008Inventors: Hiroshi Itokawa, Keitaro Imai, Koji Yamakawa, Bum-ki Moon
-
Publication number: 20070231948Abstract: A method of manufacturing a semiconductor device, including forming a capacitor above a semiconductor substrate, the capacitor including a dielectric film containing Pb, Zr, Ti and O. Forming the capacitor includes forming a crystallized film which contains Pb, Sr, Zr, Ti, Ru and O.Type: ApplicationFiled: May 25, 2007Publication date: October 4, 2007Applicant: KABUSHHIKI KAISHA TOSHIBAInventors: Keisuke Nakazawa, Koji Yamakawa, Katsuaki Natori, Soichi Yamazaki, Hiroshi Itokawa, Hiroyuki Kanaya
-
Patent number: 7259094Abstract: An apparatus for manufacturing a semiconductor device is disclosed which comprises a chamber which holds a to-be-processed substrate having a film containing at least one kind of metal element which will become a component of a volatile metal compound, a heater which heats the substrate held in the chamber, and an adsorbent which is provided in the chamber and which adsorbs the volatile metal compound generated from the film by heating the substrate.Type: GrantFiled: April 21, 2005Date of Patent: August 21, 2007Assignee: Kabushiki Kaisha ToshibaInventors: Katsuaki Natori, Keisuke Nakazawa, Koji Yamakawa, Hiroyuki Kanaya, Yoshinori Kumura, Hiroshi Itokawa, Osamu Arisumi
-
Patent number: 7247867Abstract: An ion implanter includes a sample stage for setting a sample having a main surface, an ion generating section configured to generate a plurality of ions, the ion generating section including a container into which an ion source gas is introduced and a filament for emitting thermal electrons provided in the container, an implanting section configured to implants an ion beam containing the plurality of ions in the main surface of the sample, and a control section configured to control a position of the sample or a spatial distribution of electrons emitted from the filament so that a direction of eccentricity of a center of gravity of the ion beam coincides with a direction of a normal line of the main surface.Type: GrantFiled: June 30, 2005Date of Patent: July 24, 2007Assignee: Kabushiki Kaisha ToshibaInventors: Hiroshi Itokawa, Yoshimasa Kawase, Kyoichi Suguro
-
Publication number: 20070166977Abstract: A semiconductor device manufacturing method is disclosed. A silicon-containing gate electrode is first formed above the surface of a silicon-containing semiconductor substrate. Then, a sidewall insulating film is formed on the sidewall of the gate electrode and a film of metal is formed on the semiconductor substrate to cover the gate electrode and the sidewall insulating film. The front and back sides of the semiconductor substrate are heated through heat conduction by an ambient gas. Thereby, the metal is caused to react with silicon contained in the semiconductor substrate and the gate electrode to form a metal silicide film.Type: ApplicationFiled: December 26, 2006Publication date: July 19, 2007Inventors: Hiroshi Itokawa, Yoshimasa Kawase, Toshihiko Iinuma, Haruko Akutsu, Kyoichi Suguro
-
Patent number: 7233040Abstract: Disclosed is a semiconductor device comprising a semiconductor substrate, and a capacitor provided above the semiconductor substrate and including a film which contains Pb, Sr, Zr, Ti, Ru and O and a dielectric film which contains Pb, Zr, Ti and O and which is provided on the film containing Pb, Sr, Zr, Ti, Ru and O.Type: GrantFiled: April 28, 2004Date of Patent: June 19, 2007Assignee: Kabushiki Kaisha ToshibaInventors: Keisuke Nakazawa, Koji Yamakawa, Katsuaki Natori, Soichi Yamazaki, Hiroshi Itokawa, Hiroyuki Kanaya
-
Publication number: 20070111334Abstract: A semiconductor device according to the present invention comprises a semiconductor substrate, a capacitor including a lower electrode disposed above the semiconductor substrate, a dielectric film disposed above the lower electrode, and an upper electrode disposed above the dielectric film, the upper electrode including metal oxide formed of ABO.sub.3 perovskite oxide and containing at least an Ru element as a B site element, and a metal film containing a Ti element being disposed between the dielectric film and the upper electrode.Type: ApplicationFiled: December 27, 2006Publication date: May 17, 2007Applicants: KABUSHHIKI KAISHA TOSHIBA, INFINEON TECNOLOGIES AGInventors: Hiroshi ITOKAWA, Koji Yamakawa, Rainer Bruchhaus
-
Publication number: 20070075272Abstract: A method of manufacturing a semiconductor device by processing a wafer, comprises: measuring a reflectivity of a substrate peripheral structure before heating, the substrate peripheral structure being placed close to the wafer and being heated simultaneously with the wafer by a plurality of heat sources; measuring a wafer reflectivity of the wafer before the heating; calculating a wafer emissivity of the wafer from the wafer reflectivity; measuring a wafer radiation intensity of radiation emitted from the wafer during the heating; calculating a wafer temperature of the wafer from the wafer emissivity and the wafer radiation intensity; calculating a target value of on-wafer optical intensity on the wafer so that the wafer temperature becomes a preset temperature; calculating a target value of optical intensity on the substrate peripheral structure from a difference between the reflectivity of the substrate peripheral structure and the wafer reflectivity so that incident light being incident on the substrate peType: ApplicationFiled: September 13, 2006Publication date: April 5, 2007Inventors: Yoshimasa Kawase, Hiroshi Itokawa
-
Patent number: 7122851Abstract: A semiconductor device comprising a semiconductor substrate, and a capacitor provided above the semiconductor substrate, and including a bottom electrode, a top electrode and a dielectric film between the bottom and top electrodes, the bottom electrode including a conductive film selected from a noble metal film and a noble metal oxide film, a metal oxide film having a perovskite structure, provided between the dielectric film and the conductive film, expressed by ABO3, and containing first metal element as B-site element, and a metal film provided between the conductive film and the metal oxide film, and containing second metal element which is B-site element of a metal oxide having a perovskite structure, a decrease of Gibbs free energy when the second metal element forms oxide being larger than that when the first metal element forms oxide, a thickness of the metal oxide film being 5 nm or less.Type: GrantFiled: April 30, 2004Date of Patent: October 17, 2006Assignee: Kabushiki Kaisha ToshibaInventors: Hiroshi Itokawa, Koji Yamakawa, Katsuaki Natori
-
Publication number: 20060214210Abstract: A semiconductor device according to an aspect of the invention comprises a semiconductor substrate, a conductive plug which is connected to an active region of a transistor formed on the semiconductor substrate, a metal silicide film which covers a bottom surface portion and side surface portion of the conductive plug, and an electrode structure which is formed on the conductive plug.Type: ApplicationFiled: April 4, 2005Publication date: September 28, 2006Inventors: Hiroshi Itokawa, Keitaro Imai, Koji Yamakawa, Bum-ki Moon
-
Patent number: 7105400Abstract: There is disclosed a method of manufacturing a semiconductor device, comprising forming an underlying region including an interlevel insulating film on a semiconductor substrate, forming an alumina film on the underlying region, forming a hole in the alumina film, filling the hole with a bottom electrode film, forming a dielectric film on the bottom electrode film, and forming a top electrode film on the dielectric film.Type: GrantFiled: September 30, 2003Date of Patent: September 12, 2006Assignees: Kabushiki Kaisha Toshiba, Infineon Technologies, AGInventors: Keitaro Imai, Koji Yamakawa, Hiroshi Itokawa, Katsuaki Natori, Osamu Arisumi, Keisuke Nakazawa, Bum-ki Moon
-
Publication number: 20060108624Abstract: A semiconductor device comprises a capacitor including a bottom electrode, a top electrode, and a dielectric film, the bottom electrode comprising a first conductive film containing iridium, a second conductive film provided between the dielectric film and the first conductive film and formed of a noble metal film, a third conductive film provided between the dielectric film and the second conductive film and formed of a conductive metal oxide film having a perovskite structure, and a diffusion prevention film provided between the first conductive film and the second conductive film and including at least one of a metal film and a metal oxide film, the diffusion prevention film preventing diffusion of iridium contained in the first conductive film, the dielectric film including an insulating metal oxide film having a perovskite structure, the insulating metal oxide film being expressed by A(ZrxTi1-x)O3 (A is at least one A site element, 0<x<0.35).Type: ApplicationFiled: December 30, 2004Publication date: May 25, 2006Inventors: Hiroshi Itokawa, Koji Yamakawa
-
Patent number: 7049650Abstract: A semiconductor device comprises a capacitor including a bottom electrode, a top electrode, and a dielectric film, the bottom electrode comprising a first conductive film containing iridium, a second conductive film provided between the dielectric film and the first conductive film and formed of a noble metal film, a third conductive film provided between the dielectric film and the second conductive film and formed of a conductive metal oxide film having a perovskite structure, and a diffusion prevention film provided between the first conductive film and the second conductive film and including at least one of a metal film and a metal oxide film, the diffusion prevention film preventing diffusion of iridium contained in the first conductive film, the dielectric film including an insulating metal oxide film having a perovskite structure, the insulating metal oxide film being expressed by A(ZrxTi1-x)O3 (A is at least one A site element, 0<x<0.35).Type: GrantFiled: December 30, 2004Date of Patent: May 23, 2006Assignee: Kabushiki Kaisha ToshibaInventors: Hiroshi Itokawa, Koji Yamakawa