Abstract: In a manufacturing method of a semiconductor device according to the present embodiment, there is formed a first mark that is concave from a first direction substantially perpendicular to a first face of an SiC substrate and surrounded by first and third sides extending in a second direction orthogonal to the first direction on the first face and second and fourth sides extending in a third direction orthogonal to the first and second directions, and includes at least one recessed pattern recessed in the third direction from the first side toward the third side opposite to the first side on the first side. An SiC layer is epitaxially grown on the first mark of the SiC substrate.

Abstract: A semiconductor device of embodiments includes: a first silicon carbide region of first conductive type including a first region in contact with a first face of a silicon carbide layer having first and second faces; a second silicon carbide region of second conductive type above the first silicon carbide region; a third silicon carbide region of second conductive type above the second silicon carbide region; a fourth silicon carbide region of first conductive type above the second silicon carbide region; a first gate electrode and a second gate electrode extending in the first direction; a first electrode on the first face and including a first portion and a second portion between the first and the second gate electrode. The first portion contacts the third and the fourth silicon carbide region. The second portion provided in the first direction of the first portion and contacts with the first region.

Abstract: According to one embodiment, a semiconductor device includes a first electrode, a second electrode, a third electrode, a first semiconductor member, a second semiconductor member, a third semiconductor member, and a fourth semiconductor member. The first semiconductor member is of a first conductivity type, and includes a first partial region, a second partial region, a third partial region, a fourth partial region, and a fifth partial region. The fifth partial region is in Schottky contact with the second electrode. The second semiconductor member is of a second conductivity type, and includes a first portion and a second portion. The third semiconductor member is of the second conductivity type, and includes a first semiconductor portion, a second semiconductor portion, and a third semiconductor portion. The fourth semiconductor member is of the first conductivity type, and includes a first semiconductor region and a second semiconductor region.

Abstract: According to one embodiment, a semiconductor device includes first to third electrodes, a first semiconductor portion provided between the first and second electrodes, a second semiconductor portion, and a fourth semiconductor portion. The first semiconductor portion includes first to sixth partial regions. The second partial region is aligned with the first partial region in a second direction crossing a first direction from the first electrode to the second electrode. The third partial region is aligned with the first partial region in the first direction. The fourth partial region is aligned with the second partial region in a third direction crossing a plane including the first and second directions. The fifth partial region is aligned with the fourth partial region in the first direction. The sixth partial region is aligned with the second partial region in the first direction and with the fourth partial region in the third direction.

Abstract: According to one embodiment, a semiconductor device includes a first electrode, a second electrode, a third electrode, a first semiconductor member, a second semiconductor member, a third semiconductor member, a fourth semiconductor member, and a first insulating member. The first semiconductor member is provided between the first and second electrodes, and is of a first conductivity type. The first semiconductor member includes a first partial region, a second partial region, a third partial region, a fourth partial region, and a fifth partial region. The second semiconductor member is of a second conductivity type. The second semiconductor member includes a first semiconductor region, a second semiconductor region, a third semiconductor region, a fourth semiconductor region, and a fifth semiconductor region. The third semiconductor member is of the second conductivity type. The fourth semiconductor member is of the first conductivity type. The first insulating member includes a first insulating region.

Abstract: According to one embodiment, a semiconductor device includes a first electrode, a second electrode, a third electrode, a first semiconductor portion, a second semiconductor portion, a third semiconductor portion, and a fourth semiconductor portion. The first semiconductor portion is of a first conductivity type. The first semiconductor portion includes a first semiconductor region, a second semiconductor region, and a third semiconductor region. The second semiconductor portion is of a second conductivity type. The second semiconductor portion includes a first portion, a second portion, a third portion, and a fourth portion. The first portion has a first depth, the second portion has a second depth shallower than the first depth, and the third portion has the first depth. The third semiconductor portion is of the second conductivity type, and includes a first region portion and a second region portion. The fourth semiconductor portion is of the first conductivity type.

Abstract: A semiconductor device of an embodiment includes a transistor region and a diode region. The transistor region includes an n-type first silicon carbide region having a first portion in contact with a first plane, a p-type second silicon carbide region, an n-type third silicon carbide region, a first electrode in contact with the first portion, the second silicon carbide region, and the third silicon carbide region, a second electrode in contact with a second plane, and a gate electrode. The diode region includes an n-type first silicon carbide region having a second portion in contact with the first plane, a p-type fourth silicon carbide region, a first electrode in contact with the second portion and the fourth silicon carbide region, and a second electrode. An occupied area per unit area of the fourth silicon carbide region is larger than an occupied area per unit area of the second silicon carbide region. The first diode region is provided between a first transistor region and a second transistor region.

Abstract: A semiconductor device of embodiments includes: an element region including a transistor, a first diode, and a first contact portion; a termination region surrounding the element region and including a second contact portion; and an intermediate region provided between the element region and the termination region and not including the transistor, the first diode, the first contact portion, and the second contact portion. The element region includes a first electrode, a second electrode, a gate electrode, a silicon carbide layer, and a gate insulating layer. The termination region includes a first wiring layer electrically connected to the first electrode, the second electrode, and the silicon carbide layer. The intermediate region includes the silicon carbide layer. The width of the intermediate region in a direction from the element region to the termination region is equal to or more than twice the thickness of the silicon carbide layer.

Abstract: A semiconductor device of embodiments includes: an element region including a transistor and a first diode; a termination region surrounding the element region and including a second diode; and an intermediate region between the element region and the termination region. The element region includes a first electrode, a second electrode, a gate electrode, a silicon carbide layer, and a gate insulating layer. The termination region includes a first wiring layer electrically connected to the first electrode, the second electrode, and the silicon carbide layer. The intermediate region includes a gate electrode pad, a first connection layer electrically connecting the first electrode and a part of the first wiring layer, a second connection layer electrically connecting the first electrode and another part of the first wiring layer, a second wiring layer electrically connected to the gate electrode pad and the gate electrode, and the silicon carbide layer.

Abstract: A semiconductor device of embodiments includes: an element region including a transistor, a first diode, and a first contact portion; a termination region surrounding the element region and including a second contact portion; and an intermediate region provided between the element region and the termination region and not including the transistor, the first diode, the first contact portion, and the second contact portion. The element region includes a first electrode, a second electrode, a gate electrode, a silicon carbide layer, and a gate insulating layer. The termination region includes a first wiring layer electrically connected to the first electrode, the second electrode, and the silicon carbide layer. The intermediate region includes the silicon carbide layer. The width of the intermediate region in a direction from the element region to the termination region is equal to or more than twice the thickness of the silicon carbide layer.

Abstract: A semiconductor device includes a first silicon carbide region of a first conductivity type, a second silicon carbide region of a second conductivity type on the first region, and a third silicon carbide region of a second conductivity type on the second region. Fourth and fifth silicon carbide region of the first conductivity type are on the third region. A first electrode has a first portion between the fourth region and fifth region in a first direction. A metal silicide layer is between the first portion and the third region, between the first portion and the fourth region in the first direction, and between the first portion and the fifth silicon carbide region in the first direction.

Abstract: A semiconductor device according to an embodiment includes a gate electrode extending in a first direction, a gate insulation film that covers the gate electrode, a first semiconductor region of a first conductivity type extending in a second direction orthogonal to the first direction below the gate insulation film, and a second semiconductor region of the first conductivity type that faces the gate insulation film across the first semiconductor region. An impurity concentration of the first conductivity type of the second semiconductor region is lower than that of the first semiconductor region.

Abstract: A semiconductor device of embodiments includes: a first electrode; a second electrode; a gate electrode extending in a first direction; and a SiC layer. The SiC layer includes: a first conductive type first SiC region having a first region, a second region facing the gate electrode, and a third region in contact with the first electrode; a second conductive type second SiC region between the second region and the third region; a second conductive type third SiC region, the second region interposed between the second SiC region and the third SiC region; a second conductive type fourth SiC region, the third region interposed between the second SiC region and the fourth SiC region; a first conductive type fifth SiC region; a second conductive type sixth SiC region between the first region and the second SiC region; and a second conductive type seventh SiC region between the first region and the second SiC region and distant from the sixth SiC region in the first direction.

Abstract: A semiconductor device includes a first electrode, a first semiconductor layer connected to the first electrode, a second semiconductor layer located on a portion of the first semiconductor layer, a third semiconductor layer located on a first portion of the second semiconductor layer, a fourth semiconductor layer located on a second portion of the second semiconductor layer, a fifth semiconductor layer located on a third portion of the second semiconductor layer, a second electrode, a third electrode connected to the third, fourth, and fifth semiconductor layers, and a metal film connected to the third electrode. A length in a second direction of the fifth semiconductor layer is greater than a length in the second direction of the fourth semiconductor layer. The second direction crosses a first direction. The first direction is from the first electrode toward the first semiconductor layer.

Abstract: A semiconductor device includes a silicon carbide layer having a first silicon carbide region of a first conductivity type, a second silicon carbide region of a second conductivity type, a third silicon carbide region of the second conductivity type, and a fourth silicon carbide region of the first conductivity type, first and second gate electrodes extending in a first direction and provided on a first surface of the silicon carbide layer, a first electrode on the first surface and including a first portion in contact with the third and fourth silicon carbide regions and a second portion in contact with the first silicon carbide region, and a second electrode on a second surface of the silicon carbide layer. The depth of the second silicon carbide region facing the fourth silicon carbide region is shallower than the depth of the second silicon carbide region facing the first gate electrode.

Abstract: A semiconductor device according to an embodiment includes: a silicon carbide layer having a first face and a second face; first and second gate electrodes; a first silicon carbide region; a second silicon carbide region between the first silicon carbide region and the first face; a third silicon carbide region between the second silicon carbide region and the first face; a fourth silicon carbide region between the third silicon carbide region and the first face; a first electrode; and a second electrode. The first electrode includes a first portion, and the first portion includes a first contact face in contact with the fourth silicon carbide region, a second contact face in contact with the fourth silicon carbide region, a third contact face in contact with the fourth silicon carbide region and the third silicon carbide region, and a fourth contact face in contact with the third silicon carbide region.

Abstract: According to one embodiment, a semiconductor device includes a first electrode, a first semiconductor region of a first conductivity type, a second semiconductor region of a second conductivity type, a third semiconductor region of the first conductivity type, a gate electrode, a fourth semiconductor region of the second conductivity type, a fifth semiconductor region of the second conductivity type, a sixth semiconductor region of the second conductivity type, a seventh semiconductor region of the second conductivity type, an eighth semiconductor region of the second conductivity type, a second electrode, and a third electrode. The fourth semiconductor region is located around the second semiconductor region and the gate electrode. The fourth, fifth and sixth semiconductor regions are separated from each other. The fourth, seventh and eighth semiconductor regions are separated from each other. The third electrode is located on the eighth semiconductor region with an insulating layer interposed.

Abstract: A silicon carbide layer includes a first surface, a second surface, a third surface positioned at a side opposite to the first and second surfaces in a first direction, and a side surface. The second surface is at a position recessed further toward the third surface side than the first surface. An inter-layer insulating film is located on the second surface. A thickness of the inter-layer insulating film is greater than a difference in heights in the first direction between the first surface and the second surface. A field plate is located in the inter-layer insulating film. The field plate has a lower resistivity than the inter-layer insulating film.

Abstract: According to one embodiment, a semiconductor device includes a plurality of chips, in which the plurality of chips include a first chip, a second chip adjacent to the first chip on the other end side in the first direction, a third chip closer to the other end side in the first direction than the second chip, and a fourth chip adjacent to the third chip on the other end side in the first direction, which are arranged from one end side to the other end side in a first direction, and a first distance between the first chip and the second chip, and a second distance between the third chip and the fourth chip are less than a third distance between, among the plurality of chips, two chips adjacent to each other in a region closer to the other end side in the first direction than the first chip and closer to the one end side in the first direction than the fourth chip.

Abstract: A semiconductor device includes a first electrode, a first semiconductor layer connected to the first electrode and being of a first conductivity type, second semiconductor layers located on a portion of the first semiconductor layer and being of a second conductivity type, a third semiconductor layer located on a portion of the second semiconductor layer and being of the first conductivity type, a fourth semiconductor layer located in a portion of the first semiconductor layer between the second semiconductor layers and being of the second conductivity type, a second electrode facing the second semiconductor layer via an insulating film, and a third electrode connected to the second and third semiconductor layers. The first, second, third, and fourth semiconductor layers include silicon and carbon.