Patents by Inventor Hiroshi Shinohara
Hiroshi Shinohara has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20240127796Abstract: The present invention estimates intention of an utterance more accurately than the related arts. A learning device learns an estimation model on the basis of learning data including an acoustic signal for learning and a label indicating whether or not the acoustic signal has been uttered to a predetermined target. The learning device includes: a feature synchronization unit configured to obtain a post-synchronization feature by synchronizing an acoustic feature obtained from the acoustic signal for learning with a text feature corresponding to the acoustic signal; an utterance intention estimation unit configured to estimate whether or not the acoustic signal has been uttered to the predetermined target by using the post-synchronization feature; and a parameter update unit configured to update a parameter of the estimation model on the basis of the label included in the learning data and an estimation result by the utterance intention estimation unit.Type: ApplicationFiled: February 18, 2021Publication date: April 18, 2024Applicant: NIPPON TELEGRAPH AND TELEPHONE CORPORATIONInventors: Hiroshi SATO, Takaaki FUKUTOMI, Yusuke SHINOHARA
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Publication number: 20230317173Abstract: A semiconductor memory device includes a first memory cell, a second memory cell above the first memory cell, a first word line electrically connected to a gate of the first memory cell, a second word line electrically connected to a gate of the second memory cell, and a control unit that performs an erasing operation on the first and second memory cells. During the erasing operation, the control unit applies a first voltage to a first word line and a second voltage higher than the first voltage to a second word line.Type: ApplicationFiled: May 31, 2023Publication date: October 5, 2023Inventors: Masanobu SHIRAKAWA, Takuya FUTATSUYAMA, Kenichi ABE, Hiroshi NAKAMURA, Keisuke YONEHAMA, Atsuhiro SATO, Hiroshi SHINOHARA, Yasuyuki BABA, Toshifumi MINAMI
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Patent number: 11705204Abstract: A semiconductor memory device includes a first memory cell, a second memory cell above the first memory cell, a first word line electrically connected to a gate of the first memory cell, a second word line electrically connected to a gate of the second memory cell, and a control unit that performs an erasing operation on the first and second memory cells. During the erasing operation, the control unit applies a first voltage to a first word line and a second voltage higher than the first voltage to a second word line.Type: GrantFiled: January 26, 2022Date of Patent: July 18, 2023Assignee: KIOXIA CORPORATIONInventors: Masanobu Shirakawa, Takuya Futatsuyama, Kenichi Abe, Hiroshi Nakamura, Keisuke Yonehama, Atsuhiro Sato, Hiroshi Shinohara, Yasuyuki Baba, Toshifumi Minami
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Publication number: 20230209829Abstract: A semiconductor memory device includes a conducting layer and an insulating layer that are disposed above a semiconductor substrate, a plurality of pillars that extend in a direction which crosses a surface of the semiconductor substrate, and a plate that is disposed between the plurality of pillars and extends in the same direction as the pillars. A surface of the plate, which faces the pillars, has convex portions and non-convex portions.Type: ApplicationFiled: March 1, 2023Publication date: June 29, 2023Inventors: Toshifumi MINAMI, Atsuhiro SATO, Keisuke YONEHAMA, Yasuyuki BABA, Hiroshi SHINOHARA, Hideyuki KAMATA, Teppei HIGASHITSUJI
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Patent number: 11621278Abstract: A semiconductor memory device includes a conducting layer and an insulating layer that are disposed above a semiconductor substrate, a plurality of pillars that extend in a direction which crosses a surface of the semiconductor substrate, and a plate that is disposed between the plurality of pillars and extends in the same direction as the pillars. A surface of the plate, which faces the pillars, has convex portions and non-convex portions.Type: GrantFiled: March 22, 2022Date of Patent: April 4, 2023Assignee: Kioxia CorporationInventors: Toshifumi Minami, Atsuhiro Sato, Keisuke Yonehama, Yasuyuki Baba, Hiroshi Shinohara, Hideyuki Kamata, Teppei Higashitsuji
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Patent number: 11517991Abstract: A machine tool includes: a cutting tool; rotating means; feeding means; and vibration means for reciprocatingly vibrating the cutting tool and the workpiece relative to each other; wherein the cutting process is carried out by a relative rotation of the workpiece and the cutting tool, and feeding of the cutting tool, to thereby move the cutting tool continuously along a plurality of predetermined movement paths each having a different machining feeding direction. The machine tool further includes vibration restriction means that operates as the movement of the cutting tool changes from one movement path of two consecutive movement paths to the other movement path, for restricting the reciprocating vibration for a predetermined period from the movement starting position of the movement paths, and starting the reciprocating vibration after the lapse of said predetermined period.Type: GrantFiled: October 4, 2018Date of Patent: December 6, 2022Assignees: CITIZEN WATCH CO., LTD., CITIZEN MACHINERY CO., LTD.Inventors: Takaichi Nakaya, Kazuhiko Sannomiya, Hiroshi Shinohara
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Patent number: 11446781Abstract: A control device for a machine tool and a machine tool capable of easily performing cutting with vibration according to the amount of feed is provided. A control device (180) for a machine tool comprises a control means (181) for controlling the relative rotation and feeding of a cutting tool and a material, the control means performing control such that cutting is performed with vibrating the cutting tool relative to the material by combining a forward feed movement in the machining direction, in which the cutting tool machines the material, and a return movement in the counter-machining direction.Type: GrantFiled: July 26, 2018Date of Patent: September 20, 2022Assignees: CITIZEN WATCH CO., LTD., CITIZEN MACHINERY CO., LTD.Inventors: Takaichi Nakaya, Hiroshi Shinohara
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Publication number: 20220216232Abstract: A semiconductor memory device includes a conducting layer and an insulating layer that are disposed above a semiconductor substrate, a plurality of pillars that extend in a direction which crosses a surface of the semiconductor substrate, and a plate that is disposed between the plurality of pillars and extends in the same direction as the pillars. A surface of the plate, which faces the pillars, has convex portions and non-convex portions.Type: ApplicationFiled: March 22, 2022Publication date: July 7, 2022Inventors: Toshifumi MINAMI, Atsuhiro SATO, Keisuke YONEHAMA, Yasuyuki BABA, Hiroshi SHINOHARA, Hideyuki KAMATA, Teppei HIGASHITSUJI
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Patent number: 11343752Abstract: This first communication apparatus is provided with: a first communication unit which, after establishing a link necessary for first near field communication with a communication counterpart existing within a first communication available range, performs the first near field communication with the link-established communication counterpart; and a second communication unit which performs second near field communication with a communication counterpart existing within a second communication available range that is narrower than the first communication available range. In a case where detecting that a portable storage medium with which the second near field communication is available enters the second communication available range, the first communication apparatus transmits, through the first communication unit, detection information which indicates that the portable storage medium enters the second communication available range to a link-established second communication apparatus.Type: GrantFiled: August 30, 2017Date of Patent: May 24, 2022Assignee: Rakuten Group, Inc.Inventors: Hiroshi Shinohara, Yoshiro Matsuda
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Publication number: 20220143471Abstract: A golf ball 2 includes a core 4, an inner cover 6 positioned outside the core 4, and an outer cover 8 positioned outside the inner cover 6. The core 4 has a capsule 14, a plurality of separators 16, an electronic unit 18, and a plurality of fillings 20. The capsule 14 has a melting point of not lower than 100° C. A ratio P1 of a volume Vr of the capsule 14 to a volume Vc of the core 4 is not less than 25% and not greater than 75%. The electronic unit 18 is housed in the capsule 14. The electronic unit 18 detects behavior of the golf ball 2.Type: ApplicationFiled: October 6, 2021Publication date: May 12, 2022Applicant: Sumitomo Rubber Industries, Ltd.Inventors: Toshiyuki TAKUBO, Takahiro SAJIMA, Kuniyasu HORIUCHI, Hiroshi SHINOHARA, Jiro MORI, Tsuyoshi ITO, Masanobu YOSHIDA, Kazuya KAMINO, Hidetaka INOUE, Masahide ONUKI
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Publication number: 20220148657Abstract: A semiconductor memory device includes a first memory cell, a second memory cell above the first memory cell, a first word line electrically connected to a gate of the first memory cell, a second word line electrically connected to a gate of the second memory cell, and a control unit that performs an erasing operation on the first and second memory cells. During the erasing operation, the control unit applies a first voltage to a first word line and a second voltage higher than the first voltage to a second word line.Type: ApplicationFiled: January 26, 2022Publication date: May 12, 2022Inventors: Masanobu SHIRAKAWA, Takuya FUTATSUYAMA, Kenichi ABE, Hiroshi NAKAMURA, Keisuke YONEHAMA, Atsuhiro SATO, Hiroshi SHINOHARA, Yasuyuki BABA, Toshifumi MINAMI
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Patent number: 11315950Abstract: A semiconductor memory device includes a conducting layer and an insulating layer that are disposed above a semiconductor substrate, a plurality of pillars that extend in a direction which crosses a surface of the semiconductor substrate, and a plate that is disposed between the plurality of pillars and extends in the same direction as the pillars. A surface of the plate, which faces the pillars, has convex portions and non-convex portions.Type: GrantFiled: September 15, 2020Date of Patent: April 26, 2022Assignee: KIOXIA CORPORATIONInventors: Toshifumi Minami, Atsuhiro Sato, Keisuke Yonehama, Yasuyuki Baba, Hiroshi Shinohara, Hideyuki Kamata, Teppei Higashitsuji
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Patent number: 11270773Abstract: A semiconductor memory device includes a first memory cell, a second memory cell above the first memory cell, a first word line electrically connected to a gate of the first memory cell, a second word line electrically connected to a gate of the second memory cell, and a control unit that performs an erasing operation on the first and second memory cells. During the erasing operation, the control unit applies a first voltage to a first word line and a second voltage higher than the first voltage to a second word line.Type: GrantFiled: November 24, 2020Date of Patent: March 8, 2022Assignee: KIOXIA CORPORATIONInventors: Masanobu Shirakawa, Takuya Futatsuyama, Kenichi Abe, Hiroshi Nakamura, Keisuke Yonehama, Atsuhiro Sato, Hiroshi Shinohara, Yasuyuki Baba, Toshifumi Minami
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Publication number: 20210365931Abstract: A mobile terminal 1 measures a distance between the mobile terminal 1 and a wireless communication device 2a on the basis of a radio signal transmitted from the wireless communication device 2a connected to an electronic money payment machine, and the mobile terminal 1 transmits an authorization request for a credit payment of a recharge amount for recharging an electronic value balance to a center server 4 when detecting, on the basis of the measured distance, that the mobile terminal 1 is approaching the wireless communication device 2a, and performs processing of permitting recharge of the electronic value balance with the recharge amount when a credit approval is granted for the authorization according to the authorization request.Type: ApplicationFiled: August 31, 2016Publication date: November 25, 2021Applicant: Rakuten Group, Inc.Inventor: Hiroshi SHINOHARA
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Patent number: 10986483Abstract: This communication apparatus C is provided with: a first communication unit which, after establishing a link necessary for first near field communication with a communication counterpart existing within a first communication available range, performs the first near field communication with the link-established communication counterpart; and a second communication unit which performs second near field communication with a communication counterpart existing within a second communication available range that is narrower than the first communication available range.Type: GrantFiled: August 30, 2017Date of Patent: April 20, 2021Assignee: Rakuten, Inc.Inventors: Hiroshi Shinohara, Yoshiro Matsuda
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Publication number: 20210082519Abstract: A semiconductor memory device includes a first memory cell, a second memory cell above the first memory cell, a first word line electrically connected to a gate of the first memory cell, a second word line electrically connected to a gate of the second memory cell, and a control unit that performs an erasing operation on the first and second memory cells. During the erasing operation, the control unit applies a first voltage to a first word line and a second voltage higher than the first voltage to a second word line.Type: ApplicationFiled: November 24, 2020Publication date: March 18, 2021Inventors: Masanobu SHIRAKAWA, Takuya FUTATSUYAMA, Kenichi ABE, Hiroshi NAKAMURA, Keisuke YONEHAMA, Atsuhiro SATO, Hiroshi SHINOHARA, Yasuyuki BABA, Toshifumi MINAMI
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Publication number: 20210067934Abstract: This communication apparatus C is provided with: a first communication unit which, after establishing a link necessary for first near field communication with a communication counterpart existing within a first communication available range, performs the first near field communication with the link-established communication counterpart; and a second communication unit which performs second near field communication with a communication counterpart existing within a second communication available range that is narrower than the first communication available range.Type: ApplicationFiled: August 30, 2017Publication date: March 4, 2021Applicant: Rakuten, Inc.Inventors: Hiroshi SHINOHARA, Yoshiro MATSUDA
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Publication number: 20200411551Abstract: A semiconductor memory device includes a conducting layer and an insulating layer that are disposed above a semiconductor substrate, a plurality of pillars that extend in a direction which crosses a surface of the semiconductor substrate, and a plate that is disposed between the plurality of pillars and extends in the same direction as the pillars. A surface of the plate, which faces the pillars, has convex portions and non-convex portions.Type: ApplicationFiled: September 15, 2020Publication date: December 31, 2020Inventors: Toshifumi MINAMI, Atsuhiro SATO, Keisuke YONEHAMA, Yasuyuki BABA, Hiroshi SHINOHARA, Hideyuki KAMATA, Teppei HIGASHITSUJI
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Patent number: 10854298Abstract: A semiconductor memory device includes a first memory cell, a second memory cell above the first memory cell, a first word line electrically connected to a gate of the first memory cell, a second word line electrically connected to a gate of the second memory cell, and a control unit that performs an erasing operation on the first and second memory cells. During the erasing operation, the control unit applies a first voltage to a first word line and a second voltage higher than the first voltage to a second word line.Type: GrantFiled: July 1, 2019Date of Patent: December 1, 2020Assignee: Toshiba Memory CorporationInventors: Masanobu Shirakawa, Takuya Futatsuyama, Kenichi Abe, Hiroshi Nakamura, Keisuke Yonehama, Atsuhiro Sato, Hiroshi Shinohara, Yasuyuki Baba, Toshifumi Minami
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Patent number: 10846580Abstract: To enhance reliability to enable use of all of a plurality of IC-chip-based applications, transmission means of an IC chip support terminal transmits, to an IC chip management server, a registration request for each of a plurality of memory areas respectively corresponding to a plurality of IC-chip-based applications for using an IC chip which is enabled to perform wireless communication. Reception means receives registration instructions for the respective memory areas, each of which is transmitted by the IC chip management server in response to the registration request. Registration means executes processes for registering the respective memory areas in the IC chip successively or in parallel based on the registration instructions. Initial setting means performs an initial setting on each of the registered memory areas when all the plurality of memory areas have been registered in the IC chip.Type: GrantFiled: October 27, 2016Date of Patent: November 24, 2020Assignee: RAKUTEN, INC.Inventor: Hiroshi Shinohara