Abstract: A ramp having a surface hardness of 2.6 GPa or more, which is obtained by molding a polyacetal resin. Such a ramp made of a polyacetal resin is excellent in moldabilities, and an abrasion loss at the resin portion of the ramp is remarkably small when a hard disk is operated. Thus it is suitable as a ramp for housing and guiding a head within a hard disk drive.

Abstract: The delay signal generating apparatus according to the present invention for outputting a delay signal obtained by delaying a reference signal includes: a phase shift device capable of outputting a plurality of shift signals having phases shifted from a phase of the reference signal by different shift amounts, respectively; and a shift signal selector capable of selecting one of the shift signals that has a phase shifted by a predetermined shift amount and outputting the selected shift signal.

Abstract: A client server system to which a plurality of client machine devices are coupled. Each client machine device executes a database data generation task and database data processing task which are a plurality of functional tasks each corresponding to a different function. A master task and common memory for controlling each database data generation task and database data processing task is disposed in each client machine device to allow a function originally handled by a client machine device in a work load concentration state or abnormal state to be handled by another client machine device.

Abstract: A mobile communications system including a voice message function in both a communications network (10) and a mobile station (20). If the mobile station (20) does not respond, the communications network responds instead thereof, stores a message, and notifies the mobile station of the presence of the message. The mobile station requests the transfer of the message when accessible. The message can be positively sent to a mobile station even if it is not accessible for a long time.

Abstract: A fine variable delay circuit includes a buffer having an input connected to a signal input terminal and an output. The buffer has an output impedance and outputs a logical level from the output. The fine variable delay circuit also includes a schmidt trigger buffer having an input connected to the output of the buffer and an output connected to a signal output terminal, a CMOS transistor having a gate and two electrodes, the gate being connected to a connection point between said buffer and said schmidt trigger buffer.

Abstract: When an incoming call corresponding to a communication number PID takes place in a switching station, the switching station retrieves user-intrinsic information UK and an incoming-communication registered terminal identification number SID and sends the communication number PID to a communication terminal. When the communication terminal replies, the switching station generates a random number R and sends it to the communication terminal. In addition, the switching station generates a cryptical key K=F (R, UK) corresponding to the user-intrinsic information UK and the random number R. The communication terminal generates a cryptical key K=F (R, UK) corresponding to the received random number R and the user-intrinsic information UK that is input by the user. The switching station and the communication terminal encrypt the communication information corresponding to the cryptical key K and decrypt received encrypted communication information.

Abstract: In a mobile communication network, a mobile unit location register ML and a subscriber location register SL are provided. In the mobile unit location register the mobile location of a mobile unit MT is registered, whereas in the subscriber location register a mobile unit MT selected by each subscriber SB as a terminal for call terminating use is registered. Upon receiving a terminating call for a subscriber, a switching center SW reads out, from the subscriber location register SL, an identifying number TID of the mobile unit registered by the subscriber SB as a terminal for call terminating use and uses the mobile unit identifying number TID to read out the mobile location of the mobile unit MT from the mobile unit location register ML, thereafter sending the terminating call to the registered mobile unit of the read-out mobile location.

Abstract: First and second exclusive-OR gates (hereinafter referred to as EXOR gates) are provided, which are both connected at one input side to a delay input terminal. The other input side of the first EXOR gate is grounded and the other input side of the second EXOR gate is connected to a select signal input terminal. A capacitor is connected between the output side of the first EXOR gate and the output side of the second EXOR gate. The output side of the first EXOR gate is connected to a delay output terminal by way of a buffer which outputs logical levels. The buffer has a threshold value and outputs one or the other binary logical level depending on whether the input thereto is above or below a threshold value.

Abstract: A waveform formatter for use in testing a semiconductor device is capable of reducing a total size of circuit configuration. The waveform formatter includes a plurality of clock generators in which at low-speed operation, clocks are used to generate waveforms and control signals of drivers, while at high-speed operation, all clocks are used to generate waveforms for drivers. The waveform formatter further includes a parallel-serial converter for converting parallel signals to a serial signal, a data selector for selecting the parallel signals or the serial signal, and a waveform combining circuit for accepting output signals of the clock generators through a format control unit and for generating waveforms and control signals for the drivers using the clocks from the clock generators.

Abstract: The gate of a CMOS transistor formed by a series connection of p-channel and n-channel FETs 21 and 22 is connected to an input terminal 23, and the drain of the CMOS transistor is connected to an output terminal 24. The source of the FET 21 is connected to a positive power supply terminal 20 via parallel-connected switchable resistance elements 37.sub.0, 37.sub.1, 37.sub.2, . . formed by p-channel FETs and having resistance values R.sub.0, R.sub.1, R.sub.2, . . . , respectively. The source of the other FET 22 is connected to a negative power supply terminal 30 via parallel-connected switchable resistance elements 38.sub.0, 38.sub.1, 38.sub.2, . . . formed by n-channel FETs and having resistance values R.sub.0, R.sub.1, R.sub.2, . . . , respectively. Delay setting signals S.sub.0, S.sub.1, . . . are decoded by a decoder 39 and one of more of its output terminals Y.sub.0, Y.sub.1 , . . . go to the high level. The output terminals Y.sub.0, Y.sub.1, Y.sub.2, . . .

Abstract: An engineering polyacetal resin composition comprising 0.05-20 parts by weight of a dispersant (B) and 5-40 parts by weight of a filler (C), and 100 parts by weight of a resin ingredient (A) which comprises 90-50% by weight of a polyacetal resin (a) and 10-50% by weight of a polyamide resin (b) having a melting point of up to 230.degree. C., a maximum particle diameter of 0.03-10 .mu.m and a maximum aspect ratio of up to 2, and is dispersed in a matrix of said polyacetal resin (a).

Abstract: An insulating coating of a desired portion of an electric cable is removed by selectively irradiating the desired portion with a pulse laser beam having a pulse width of 5.mu. sec or less and a peak output of 1 MW or more.