Abstract: With respect to a clean air device, in order to provide a device structure and an air cleaning unit inspecting method capable of supplying clean air through a filter and also capable of measuring the amount of dust in a workroom space in which blown air forms a laminar flow such that an increase in the amount of dust can be accurately detected, the clean air device comprises an air cleaning unit, a rectifying unit arranged downstream of the air cleaning unit configured to rectify air blown from the air cleaning unit and form a laminar flow, and a workroom arranged downstream of the rectifying unit, wherein at least one suction port is provided on a wall surface in a space formed between the air cleaning unit and the rectifying unit, configured to draw out the air in the space to an exterior.

Abstract: In a state where an operator performs operation using a safety cabinet while confirming standard operating procedures and sample data, a display device such as a monitor screen provided in the safety cabinet is arranged at a position that is not subject to effects of deterioration due to diffused reflection of light from a fluorescent lamp or sterilization lamp irradiation, and that does not generate resistance in an airflow path, while also protecting the display device from decontamination operation and preventing dirt from being adhered to a portion related to display.

Abstract: When an operational mode is shifted to a standby mode, a first transistor is brought into a conduction state by a control signal, and a word line is thereby clamped to a ground voltage. Further, a second transistor is brought into a non-conduction state, and supply of an internal power supply voltage to a word line driver is shut off. Subsequently, the supply of the internal power supply voltage is halted for saving electrical power. When the operational mode returns to a normal mode, the supply of the internal power supply voltage is started, and subsequently, the first transistor is brought into the non-conduction state by the control signal, and the second transistor is thereby brought into the conduction state.

Abstract: The invention provides a blower system of a high performance, which is constructed to have stabilized characteristics, a high efficiency, a reduced thickness and a reduced noise. A blower system according to the invention includes an impeller, a motor for rotating the impeller and having a rotor and a stator, and a bell-mouth for supplying air to an intake port in the impeller, wherein the rotor is fixed to the impeller, and the stator is fixed to the bell-mouth. A gap between the impeller and the bell-mouth is composed of a gap between the rotor and the stator of the motor. Alternatively, the rotor is fixed to the impeller, and the stator is fixed to a fitting for mounting a housing of the blower system or the blower system.

Abstract: When an operational mode is shifted to a standby mode, a first transistor is brought into a conduction state by a control signal, and a word line is thereby clamped to a ground voltage. Further, a second transistor is brought into a non-conduction state, and supply of an internal power supply voltage to a word line driver is shut off. Subsequently, the supply of the internal power supply voltage is halted for saving electrical power. When the operational mode returns to a normal mode, the supply of the internal power supply voltage is started, and subsequently, the first transistor is brought into the non-conduction state by the control signal, and the second transistor is thereby brought into the conduction state.

Abstract: The invention provides a blower system of a high performance, which is constructed to have stabilized characteristics, a high efficiency, a reduced thickness and a reduced noise. A blower system according to the invention includes an impeller, a motor for rotating the impeller and having a rotor and a stator, and a bell-mouth for supplying air to an intake port in the impeller, wherein the rotor is fixed to the impeller, and the stator is fixed to the bell-mouth. A gap between the impeller and the bell-mouth is composed of a gap between the rotor and the stator of the motor. Alternatively, the rotor is fixed to the impeller, and the stator is fixed to a fitting for mounting a housing of the blower system or the blower system.

Abstract: When an operational mode is shifted to a standby mode, a first transistor is brought into a conduction state by a control signal, and a word line is thereby clamped to a ground voltage. Further, a second transistor is brought into a non-conduction state, and supply of an internal power supply voltage to a word line driver is shut off. Subsequently, the supply of the internal power supply voltage is halted for saving electrical power. When the operational mode returns to a normal mode, the supply of the internal power supply voltage is started, and subsequently, the first transistor is brought into the non-conduction state by the control signal, and the second transistor is thereby brought into the conduction state.

Abstract: The invention provides a blower system of a high performance, which is constructed to have stabilized characteristics, a high efficiency, a reduced thickness and a reduced noise. A blower system according to the invention includes an impeller, a motor for rotating the impeller and having a rotor and a stator, and a bell-mouth for supplying air to an intake port in the impeller, wherein the rotor is fixed to the impeller, and the stator is fixed to the bell-mouth. A gap between the impeller and the bell-mouth is composed of a gap between the rotor and the stator of the motor. Alternatively, the rotor is fixed to the impeller, and the stator is fixed to a fitting for mounting a housing of the blower system or the blower system.

Abstract: In an SRAM according to the present invention, an internal power supply voltage for a memory cell is applied to a back gate of each of P-channel MOS transistors included in an equalizer, a write driver, and a column select gate. Therefore, even if an internal power supply voltage for a peripheral circuit is shut off to reduce current consumption during standby, a threshold voltage of each of the P-channel MOS transistors is maintained at a high level, and hence a leakage current is small.

Abstract: When an operational mode is shifted to a standby mode, a first transistor is brought into a conduction state by a control signal, and a word line is thereby clamped to a ground voltage. Further, a second transistor is brought into a non-conduction state, and supply of an internal power supply voltage to a word line driver is shut off. Subsequently, the supply of the internal power supply voltage is halted for saving electrical power. When the operational mode returns to a normal mode, the supply of the internal power supply voltage is started, and subsequently, the first transistor is brought into the non-conduction state by the control signal, and the second transistor is thereby brought into the conduction state.

Abstract: The present invention is an inner touch panel in which a 1st and a 2nd planer member, each having an electrode disposed on one surface thereof, oppose each other with a fixed space therebetween. The electrodes face each other across the space, and a polarizing plate is stacked on the other surface of the 1st planer member. At least one of the 1st and the 2nd planer members is a film made of a siloxane crosslinking acrylic silicone resin. Here, in the case of having a thickness in the range of 0.1 mm and 0.4 mm, the film maintains, after heat treatment at 120° C. for 1000 hours, 96% or more of the visible light transmittance at a wavelength of 400 nm before the heat treatment.

Abstract: In an SRAM according to the present invention, an internal power supply voltage for a memory cell is applied to a back gate of each of P-channel MOS transistors included in an equalizer, a write driver, and a column select gate. Therefore, even if an internal power supply voltage for a peripheral circuit is shut off to reduce current consumption during standby, a threshold voltage of each of the P-channel MOS transistors is maintained at a high level, and hence a leakage current is small.

Abstract: The invention provides a blower system of a high performance, which is constructed to have stabilized characteristics, a high efficiency, a reduced thickness and a reduced noise. A blower system according to the invention includes an impeller, a motor for rotating the impeller and having a rotor and a stator, and a bell-mouth for supplying air to an intake port in the impeller, wherein the rotor is fixed to the impeller, and the stator is fixed to the bell-mouth. A gap between the impeller and the bell-mouth is composed of a gap between the rotor and the stator of the motor. Alternatively, the rotor is fixed to the impeller, and the stator is fixed to a fitting for mounting a housing of the blower system or the blower system.

Abstract: The invention provides a standardized machining jig to be used in a machining center for processing various works. A machining jig 1 mounted on an exchange table T1 of a machining center has a jig base 10 and a pallet 20, and the pallet 20 is equipped with a large number of even-pitched through holes. Standard bolts 30 are inserted to the through holes, which are prevented from falling to the floor by a stopper plate 80. Standardized supporting blocks 42, 43 and positioning blocks 50 are fixed to the pallet 20 via bolts 30. A work 100 is fixed to the supporting blocks and the positioning blocks. The bolts 30 are manipulated via a bolt runner 60 attached to a robot arm.

Abstract: A composite gate detects whether an internal array is in a selected state and an internal row activation signal is activated in accordance with a timing relationship between an output signal of the composite gate and an address transition detection signal. When the address transition detection signal is applied, the internal row activation signal is deactivated in accordance with generation timings of delayed restore period signal indicating whether the internal array is in a selected state and of the address transition detection signal to permit the next row access. With such a configuration, the next operation is allowed to start after an internal state is surely restored to an initial state. When the next address transition detection signal is applied during a period of a restoration operation, a column recovery operation, or a refreshing operation, data access is correctly performed without causing data destruction.

Abstract: A composite gate detects whether an internal array is in a selected state and an internal row activation signal is activated in accordance with a timing relationship between an output signal of the composite gate and an address transition detection signal. When the address transition detection signal is applied, the internal row activation signal is deactivated in accordance with generation timings of delayed restore period signal indicating whether the internal array is in a selected state and of the address transition detection signal to permit the next row access. With such a configuration, the next operation is allowed to start after an internal state is surely restored to an initial state. When the next address transition detection signal is applied during a period of a restoration operation, a column recovery operation, or a refreshing operation, data access is correctly performed without causing data destruction.

Abstract: A composite gate detects whether an internal array is in a selected state and an internal row activation signal is activated in accordance with a timing relationship between an output signal of the composite gate and an address transition detection signal. When the address transition detection signal is applied, the internal row activation signal is deactivated in accordance with generation timings of delayed restore period signal indicating whether the internal array is in a selected state and of the address transition detection signal to permit the next row access. With such a configuration, the next operation is allowed to start after an internal state is surely restored to an initial state. When the next address transition detection signal is applied during a period of a restoration operation, a column recovery operation, or a refreshing operation, data access is correctly performed without causing data destruction.

Abstract: A composite gate detects whether an internal array is in a selected state and an internal row activation signal is activated in accordance with a timing relationship between an output signal of the composite gate and an address transition detection signal. When the address transition detection signal is applied, the internal row activation signal is deactivated in accordance with generation timings of delayed restore period signal indicating whether the internal array is in a selected state and of the address transition detection signal to permit the next row access. With such a configuration, the next operation is allowed to start after an internal state is surely restored to an initial state. When the next address transition detection signal is applied during a period of a restoration operation, a column recovery operation, or a refreshing operation, data access is correctly performed without causing data destruction.

Abstract: A composite gate detects whether an internal array is in a selected state and an internal row activation signal is activated in accordance with a timing relationship between an output signal of the composite gate and an address transition detection signal. When the address transition detection signal is applied, the internal row activation signal is deactivated in accordance with generation timings of delayed restore period signal indicating whether the internal array is in a selected state and of the address transition detection signal to permit the next row access. With such a configuration, the next operation is allowed to start after an internal state is surely restored to an initial state. When the next address transition detection signal is applied during a period of a restoration operation, a column recovery operation, or a refreshing operation, data access is correctly performed without causing data destruction.

Abstract: Successive data read access with a final address specified is detected by a command mode detecting circuit to set a command mode entry status. In the command mode entry, a command of designating an internal state is made acceptable in accordance with a predetermined external signal. Consequently, a semiconductor memory device that enters a command mode, maintaining compatibility of pins and signal timings with a conventional status memory is provided.