Patents by Inventor Hiroyuki Harada

Hiroyuki Harada has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10720368
    Abstract: A semiconductor device includes: an insulating substrate having an upper surface on which a semiconductor element is mounted; a base plate joined to a lower surface of the insulating substrate; a case member that surrounds the insulating substrate and that is in contact with a surface of the base plate to which the insulating substrate is joined; a sealing resin provided in a region surrounded by the base plate and the case member; a cover member facing a surface of the sealing resin and fixed to the case member; and a holding plate, a lower surface of the holding plate and a portion of a side surface of the holding plate being in close contact with the surface of the sealing resin, an upper surface of the holding plate being fixed to and protruding from a surface of the cover member facing the surface of the sealing resin.
    Type: Grant
    Filed: December 14, 2016
    Date of Patent: July 21, 2020
    Assignee: MITSUBISHI ELECTRIC CORPORATION
    Inventors: Hiroyuki Harada, Kozo Harada, Yasumichi Hatanaka, Takashi Nishimura, Masaki Taya
  • Publication number: 20200194324
    Abstract: An object of the present invention is to suppress a crack in a sealing resin and a warpage in a semiconductor device in a power semiconductor device. A power semiconductor device includes: a semiconductor element; a terminal; a chassis; and a sealing resin sealing the semiconductor element and the terminal in the chassis. The sealing resin includes: a first sealing resin covering at least the semiconductor element; and a second sealing resin formed on an upper portion of the first sealing resin, and in an operation temperature of the semiconductor element, the first sealing resin has a smaller linear expansion coefficient than the second sealing resin, and a difference of a linear expansion coefficient between the first sealing resin and the terminal is smaller than a difference of a linear expansion coefficient between the second sealing resin and the terminal.
    Type: Application
    Filed: August 25, 2017
    Publication date: June 18, 2020
    Applicant: Mitsubishi Electric Corporation
    Inventors: Taishi SASAKI, Yuki YOSHIOKA, Hiroyuki HARADA, Yusuke KAJI
  • Publication number: 20200176366
    Abstract: A semiconductor device includes: semiconductor elements and; a lead frame including a mount having an upper surface over which the semiconductor elements and are mounted; a sealing resin sealing the lead frame and the semiconductor elements and so that outer leads and of the lead frame protrude outwardly; and a resin wall located on an inner lead between the outer lead and the mount of the lead frame. A vertical thickness of the resin wall is greater than a vertical thickness from a lower surface of the sealing resin to a lower end of the lead frame.
    Type: Application
    Filed: October 2, 2019
    Publication date: June 4, 2020
    Applicant: Mitsubishi Electric Corporation
    Inventors: Hiroyuki HARADA, Akira KOSUGI, Takamasa IWAI
  • Patent number: 10658284
    Abstract: Herein provided are: a ceramic board; a semiconductor element for electric power, on one surface of which an electrode is formed, and the other surface of which is bonded to the ceramic board; a lead terminal, one end side of which is bonded to the electrode, and the other end side of which is to be electrically connected to an outside thereof; and a sealing member by which the semiconductor element for electric power is sealed together with a part, in the lead terminal, bonded to the electrode; wherein, near an end in said one end side of the lead terminal, an inclined surface is formed which becomes farther from the circuit board as it becomes closer to the end.
    Type: Grant
    Filed: May 15, 2015
    Date of Patent: May 19, 2020
    Assignee: MITSUBISHI ELECTRIC CORPORATION
    Inventors: Junji Fujino, Mikio Ishihara, Masayoshi Shinkai, Hiroyuki Harada
  • Publication number: 20200117870
    Abstract: An image processing apparatus includes a visible code area searching unit and a color replacement processing unit. The visible code area searching unit searches for a visible code area in a color document image corresponding to a document, and the visible code area includes a visible code. The color replacement processing unit (a) generates as a local color histogram a color histogram of the visible code area in a predetermined color space and determines whether removal of a stain image should be performed or not on the basis of a ratio of a pixel classified into a bin that includes a color of the stain image in the local color histogram, and (b) replaces the color of the stain image in the visible code area with a background color of the document if it is determined that the removal of the stain image should be performed.
    Type: Application
    Filed: October 11, 2019
    Publication date: April 16, 2020
    Inventor: Hiroyuki Harada
  • Publication number: 20200098701
    Abstract: A semiconductor chip (6) is disposed on the insulation substrate (2). A lead frame (8) is bonded to an upper surface of the semiconductor chip (6). A sealing resin (12) covers the semiconductor chip (6), the insulation substrate (2), and the lead frame (8). A stress mitigation resin (13) having a lower elastic modulus than that of the sealing resin (12) is partially applied to an end of the lead frame (8).
    Type: Application
    Filed: February 9, 2017
    Publication date: March 26, 2020
    Applicant: Mitsubishi Electric Corporation
    Inventors: Hiroyuki HARADA, Naoki YOSHIMATSU, Osamu USUI, Yuji IMOTO, Yuki YOSHIOKA
  • Publication number: 20200036848
    Abstract: A reading device (100) includes a reading section (143), a casing (160), a cover section (110), a conveyance section (130), an interposed member (170), a controller (153), a cable (180), and a linking member (190). The casing (160) houses the reading section (143) therein. It is possible to place the cover section (110) on the casing (160). The conveyance section (130) is housed in the cover section (110) and conveys a sheet. The interposed member (170) is interposed between the cover section (110) and the casing (160). The controller (153) is housed in the casing (160) and controls the conveyance section (130). The cable (180) is connected to the controller (153), is also connected to the conveyance section (130), and transfers a control signal output by the controller (153) to the conveyance section (130). The linking member (190) is linked to the cover section (110) and is also linked to the casing (160).
    Type: Application
    Filed: October 24, 2018
    Publication date: January 30, 2020
    Applicant: KYOCERA Document Solutions Inc.
    Inventor: Hiroyuki HARADA
  • Publication number: 20190378810
    Abstract: An object of the present invention is to provide a highly reliable semiconductor device that allows voids remaining in a bonding material to be reduced. The semiconductor device includes a semiconductor chip, an insulation substrate, a metal base plate, a resin section, and a bump. The semiconductor chip is warped into a concave shape. On the insulation substrate, the semiconductor chip is mounted by bonding. The metal base plate has the insulation substrate mounted thereon and has a heat dissipation property. The resin section seals the insulation substrate and the semiconductor chip. The bump is disposed in a joint between the semiconductor chip and the insulation substrate. A warp amount of the semiconductor chip warped into a concave shape is equal to or greater than 1 ?m and less than a height of the bump.
    Type: Application
    Filed: November 21, 2016
    Publication date: December 12, 2019
    Applicant: Mitsubishi Electric Corporation
    Inventors: Yuki YOSHIOKA, Taishi SASAKI, Hiroyuki HARADA
  • Publication number: 20190371686
    Abstract: A semiconductor device includes: an insulating substrate having an upper surface on which a semiconductor element is mounted; a base plate joined to a lower surface of the insulating substrate; a case member that surrounds the insulating substrate and that is in contact with a surface of the base plate to which the insulating substrate is joined; a sealing resin provided in a region surrounded by the base plate and the case member; a cover member facing a surface of the sealing resin and fixed to the case member; and a holding plate, a lower surface of the holding plate and a portion of a side surface of the holding plate being in close contact with the surface of the sealing resin, an upper surface of the holding plate being fixed to and protruding from a surface of the cover member facing the surface of the sealing resin.
    Type: Application
    Filed: December 14, 2016
    Publication date: December 5, 2019
    Applicant: Mitsubishi Electric Corporation
    Inventors: Hiroyuki HARADA, Kozo HARADA, Yasumichi HATANAKA, Takashi NISHIMURA, Masaki TAYA
  • Patent number: 10472197
    Abstract: An image forming apparatus includes a main body, a post-printing processing device, and a paper exit part. The main body forms an image on paper. The post-printing processing device is located above the main body and performs post-printing processing on paper. The paper exit part is located on a side surface of the post-printing processing device. Paper is ejected to the paper exit part. The post-printing processing device includes a paper inlet port and a conveyance device. The paper inlet port is located in a rear part of a lower surface of the post-printing processing device. The conveyance device conveys paper conveyed via the paper inlet port into the post-printing processing device in a forward direction thereof to a paper loading tray and conveys the paper therefrom leftward to eject the paper to the paper exit part located on the left side of the post-printing processing device.
    Type: Grant
    Filed: October 25, 2016
    Date of Patent: November 12, 2019
    Assignee: KYOCERA Document Solutions Inc.
    Inventors: Tomoya Hotani, Hiroyuki Harada, Takeshi Iketani, Akira Horie, Rei Yamagishi, Masaaki Maruta
  • Patent number: 10468315
    Abstract: The power module includes: an insulating substrate having an upper surface on which a semiconductor element is mounted; a base plate joined to a lower surface of the insulating substrate; a case member surrounding the insulating substrate and adhered to the base plate; a sealing resin provided in a region surrounded by the base plate and the case member, so as to seal the insulating substrate; and a holding plate projecting from an inner wall of the case member to above an outer peripheral portion of the insulating substrate, the holding plate being fixed to the inner wall, the holding plate being in contact with the sealing resin.
    Type: Grant
    Filed: November 1, 2016
    Date of Patent: November 5, 2019
    Assignee: Mitsubishi Electric Corporation
    Inventors: Kozo Harada, Hiroyuki Harada, Yasumichi Hatanaka, Takashi Nishimura, Masaki Taya
  • Patent number: 10461045
    Abstract: A power semiconductor device including an insulating substrate having a metal layer formed on an upper surface thereof, a semiconductor element and a main electrode bonded to the metal layer, a metal wire connecting the metal layer with the semiconductor element, a metal member bonded to a lower surface side of the insulating substrate, a case member surrounding the insulating substrate and being in contact with a surface of the metal member bonded to the insulating substrate, and a sealing resin which fills a region surrounded by the metal member and the case member and has a resin strength of 0.12 MPa or higher at room temperature, a microcrystallization temperature of ?55° C. or lower, and a needle penetration of 30 to 50 after storage at 175° C. for 1000 hours and seals the insulating substrate, the metal layer, the semiconductor element, the metal wire, and the main electrode.
    Type: Grant
    Filed: July 1, 2016
    Date of Patent: October 29, 2019
    Assignee: Mitsubishi Electric Corporation
    Inventors: Yasumichi Hatanaka, Kozo Harada, Hiroyuki Harada, Takashi Nishimura, Masayuki Mafune, Koji Yamada
  • Patent number: 10427586
    Abstract: A head lamp device of a vehicle comprises a pair of lamp units arranged in a direction perpendicular to a forward and rearward direction of a vehicle body, each of the pair of lamp units including at least one light emitting element; and a lighting circuit unit which is supplied with electric power from a power supply and lights the at least one light emitting element, wherein at least a portion of the lighting circuit unit is disposed in a gap formed between the pair of lamp units in the direction in which the pair of lamp units are arranged.
    Type: Grant
    Filed: May 9, 2017
    Date of Patent: October 1, 2019
    Assignees: KAWASAKI JUKOGYO KABUSHIKI KAISHA, KOITO MANUFACTURING CO., LTD.
    Inventors: Satoshi Takaya, Akira Saijyo, Hiroyuki Harada
  • Patent number: 10418185
    Abstract: A solid electrolytic capacitor element that includes a valve metal substrate having an anode terminal region and a cathode-forming region; a dielectric layer on the cathode-forming region; a solid electrolyte layer on the dielectric layer; a current collector layer on the solid electrolyte layer; and a masking member between the anode terminal region and cathode-forming region to insulate the substrate from opposite polarity. The masking region includes a first coating portion, an exposed region exposing the dielectric layer, and a second coating portion arranged in this order starting from a boundary between the anode terminal region and the cathode-forming region towards the anode terminal region. The solid electrolyte layer covers the first coating portion and at least a portion of the exposed region.
    Type: Grant
    Filed: August 22, 2017
    Date of Patent: September 17, 2019
    Assignee: MURATA MANUFACTURING CO., LTD.
    Inventor: Hiroyuki Harada
  • Publication number: 20190277236
    Abstract: An injection hole body has an injection hole to inject fuel for causing combustion in an internal combustion engine. A valve body is unseated from and seated on a seating surface of the injection hole body. The injection hole body and the valve body form a fuel passage therebetween to communicate with an inflow port of the injection hole. The fuel passage is opened and closed by unseating and seating of the valve body. A resilient member generates a resilient force to urge the valve body toward the seating surface. A seat angle is an angle between two straight lines appearing in a cross section of the seating surface, the cross section including a center axis of the valve body. The seat angle is 90 degrees or less.
    Type: Application
    Filed: March 4, 2019
    Publication date: September 12, 2019
    Inventors: Hiroyuki HARADA, Takanori KITO, Keita IMAI, Makoto SAIZEN
  • Publication number: 20190267331
    Abstract: A power semiconductor device including an insulating substrate having a metal layer formed on an upper surface thereof, a semiconductor element and a main electrode bonded to the metal layer, a metal wire connecting the metal layer with the semiconductor element, a metal member bonded to a lower surface side of the insulating substrate, a case member surrounding the insulating substrate and being in contact with a surface of the metal member bonded to the insulating substrate, and a sealing resin which fills a region surrounded by the metal member and the case member and has a resin strength of 0.12 MPa or higher at room temperature, a microcrystallization temperature of ?55° C. or lower, and a needle penetration of 30 to 50 after storage at 175° C. for 1000 hours and seals the insulating substrate, the metal layer, the semiconductor element, the metal wire, and the main electrode.
    Type: Application
    Filed: July 1, 2016
    Publication date: August 29, 2019
    Applicant: Mitsubishi Electric Corporation
    Inventors: Yasumichi HATANAKA, Kozo Harada, Hiroyuki Harada, Takashi Nishimura, Masayuki Mafune, Koji Yamada
  • Publication number: 20190244765
    Abstract: A solid electrolytic capacitor that includes a plurality of laminated units each including a valve action metal substrate including a porous layer on a surface thereof, a dielectric layer on a surface of the porous layer, and a solid electrolyte layer on the dielectric layer. A metal foil is between the laminated units. The units and the conductor layers are sealed with a coating resin. The valve action metal substrate has an anode section-side end surface directly connected to an anode outer electrode on the surface of the coating resin, and the metal foil is directly connected to a cathode outer electrode on the surface of the coating resin.
    Type: Application
    Filed: April 15, 2019
    Publication date: August 8, 2019
    Inventors: Hiroyuki Harada, Toshio Tsutsumi, Masahiro Matsuo, Kazumasa Fujimoto, Sachiko Shirakawa
  • Publication number: 20190206751
    Abstract: A semiconductor device including: an insulating substrate having a conductor layer on the upper face and the lower face and a semiconductor element mounted on the upper conductor layer; a base plate bonded to the lower conductor layer; a case member surrounding the insulating substrate and bonded to the surface of the base plate to which the conductor layer bonded to the lower face; a first filler being a silicone composition filled in a region surrounded by the base plate and the case member; and a second filler being injected into a region below the first filler and surrounding a peripheral edge portion of the insulating substrate, whose height from the base plate is higher than the upper face and is lower than a bonding face between the semiconductor element and the upper conductor layer.
    Type: Application
    Filed: September 20, 2017
    Publication date: July 4, 2019
    Applicant: MITSUBISHI ELECTRIC CORPORATION
    Inventors: Hiroyuki HARADA, Kozo HARADA, Hiroki SHIOTA, Yoshihiro YAMAGUCHI, Koji YAMADA
  • Patent number: 10321014
    Abstract: An image reading unit reads a source document image in 600 dpi, and a resolution conversion unit converts the resolution of the image to 75 dpi. An inclination detection unit detects inclination of the source document image. When a character conversion unit is to execute character recognition after cropping, a mode setting unit sets a quality-first mode. The inclination correction unit corrects the inclination of the image of 600 dpi, according to the inclination of the source document image detected by the inclination detection unit. A document image clipping unit clips out the source document image, and the resolution conversion unit converts the resolution of the source document image to 200 dpi. Thereafter, the character conversion unit executes the character recognition.
    Type: Grant
    Filed: August 25, 2016
    Date of Patent: June 11, 2019
    Assignee: KYOCERA Document Solutions Inc.
    Inventors: Yuya Tagami, Hiroyuki Harada
  • Publication number: 20190153219
    Abstract: Provided is a polycarbonate resin composition that exhibits an excellent light resistance and an excellent resistance to moist heat and is free of the problem of mold staining. The polycarbonate resin composition comprises 0.12 to 0.8 mass parts of an N-alkyl hindered amine compound (C-1) and/or 0.12 to 0.8 mass parts of an N—OR hindered amine compound (C-2), per 100 mass parts of the total of (A) and (B) composed of more than 50 mass parts to not more than 95 mass parts of an aromatic polycarbonate resin (A) and less than 50 mass parts to at least 5 mass parts of an aromatic vinyl-diene-vinyl cyanide copolymer (B).
    Type: Application
    Filed: July 21, 2017
    Publication date: May 23, 2019
    Applicant: Mitsubishi Engineering-Plastics Corporation
    Inventors: Hiroyuki HARADA, Bernardus Antonius Gerardus SCHRAUWEN, Dennis KARLIK