Patents by Inventor Hiroyuki Matsui

Hiroyuki Matsui has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20090087984
    Abstract: A forming method of an electrode includes the steps of providing an electrode material on a conductive part; exposing the electrode material at a temperature equal to or higher than a melting point of the electrode material in an oxidizing atmosphere; and exposing the melted electrode material, in a reducing atmosphere, at a temperature equal to or higher than the melting point of the electrode material and lower than the temperature at which the electrode material is exposed in the oxidizing atmosphere.
    Type: Application
    Filed: June 23, 2008
    Publication date: April 2, 2009
    Applicant: FUJITSU MICROELECTRONICS LIMITED
    Inventors: Yoshito AKUTAGAWA, Hiroyuki MATSUI, Yutaka MAKINO
  • Patent number: 7321066
    Abstract: The invention provides a method for efficiently producing an aromatic diamine derivative represented by formula (3) at high yield, the method including reacting an aromatic amide represented by formula (1) with an aromatic halide represented by formula (2): (wherein each of Ar, Ar1 and Ar2 represents a substituted or unsubstituted aryl group or heteroaryl group; Ar3 represents a substituted or unsubstituted arylene group or heteroarylene group; and X represents a halogen atom).
    Type: Grant
    Filed: January 28, 2004
    Date of Patent: January 22, 2008
    Assignee: Idemitsu Kosan Co., Ltd.
    Inventors: Hisayuki Kawamura, Hiroyuki Matsui, Koji Hirota
  • Publication number: 20070099411
    Abstract: A reflow apparatus, where formic acid is used for cleaning a surface of a solder electrode on a processing target, is disclosed. The reflow apparatus includes a processing chamber, a formic acid introduction mechanism for supplying an atmosphere gas containing formic acid to the processing chamber, and a shielding member that is made of a material having corrosion resistance against formic acid. The shielding member is arranged between a reflow processing section of the processing chamber and an inner wall of the processing chamber. In place of or in addition to the shielding member, the reflow apparatus may include a heater for decomposing residual formic acid.
    Type: Application
    Filed: February 24, 2006
    Publication date: May 3, 2007
    Applicant: FUJITSU LIMITED
    Inventors: Hiroyuki Matsui, Hirohisa Matsuki, Koki Otake
  • Publication number: 20060063952
    Abstract: The invention provides a method for efficiently producing an aromatic diamine derivative represented by formula (3) at high yield, the method including reacting an aromatic amide represented by formula (1) with an aromatic halide represented by formula (2): (wherein each of Ar, Ar1 and Ar2 represents a substituted or unsubstituted aryl group or heteroaryl group; Ar3 represents a substituted or unsubstituted arylene group or heteroarylene group; and X represents a halogen atom).
    Type: Application
    Filed: January 28, 2004
    Publication date: March 23, 2006
    Inventors: Hisayuki Kawamura, Hiroyuki Matsui, Koji Hirota
  • Patent number: 6780148
    Abstract: A decanter type centrifugal separator capable of discharging sludge directly from a portion of the sludge with least moisture content in a bowl so as to lower a moisture content and increase a separation efficiency, wherein a screw conveyor rotated with a difference in speed provided relative to the bowl is stored in the bowl rotated at a high speed, a dewatering cake discharge route (20) is provided in one end wall (2) of the bowl, an opening (20a) of the route into the bowl is provided near the inner peripheral wall of the bowl, the discharge route provides a restriction effect to the discharge of the dewatering cake, and a sedimentary layer with thick sedimentation layer is formed near the opening, whereby that portion only of the cake is discharged through the discharge route under head press of the sedimentation layer, that portion receiving the highest consolidation effect by the head press of a centrifugal force acting on the sediment, among the sedimentation layers accumulated at one end of the bowl.
    Type: Grant
    Filed: August 8, 2002
    Date of Patent: August 24, 2004
    Assignees: Kotobuki Engineering & Manufacturing Co., Ltd., Kubota Corporation
    Inventors: Tetsuo Ohinata, Hiroyoshi Mizukami, Noboru Suzuki, Yasuyuki Yoshida, Hiroyuki Matsui, Takashi Uchikawa
  • Patent number: 6732911
    Abstract: There is provided a chamber open to the outside through openings through which a solder-adhered object is passed and the chamber having a heating/melting area, a carrying mechanism for carrying the solder-adhered object into the heating/melting area, a formic-acid supplying means for supplying a formic acid into the heating/melting area, an exhausting means for exhausting a gas from the heating/melting area and its neighboring area to create a lower pressure area in the heating/melting area as compared to the pressure of outside the chamber, heating means for heating directly or indirectly the solder-adhered object in the heating/melting area, and an air-stream suppressing means for disturbing a gas flow between the heating/melting area and the carrying areas.
    Type: Grant
    Filed: October 5, 2001
    Date of Patent: May 11, 2004
    Assignee: Fujitsu Limited
    Inventors: Hirohisa Matsuki, Hiroyuki Matsui, Eiji Yoshida, Takao Ohno, Koki Otake, Akiyo Mizutani, Motoshu Miyajima, Masataka Mizukoshi, Eiji Watanabe
  • Patent number: 6666369
    Abstract: There is provided a semiconductor device manufacturing method which comprising the steps of forming solder bumps on an underlying metal film of a semiconductor device, and placing the semiconductor device and the solder layer in a reduced pressure atmosphere containing a formic acid to heat the solder bumps. Accordingly, the solder bumps can be formed without the use of flux not to generate voids in the solder layer, and also the cleaning required after the solder bumps are formed can be omitted.
    Type: Grant
    Filed: December 13, 2001
    Date of Patent: December 23, 2003
    Assignee: Fujitsu Limited
    Inventors: Hirohisa Matsuki, Hiroyuki Matsui
  • Patent number: 6656664
    Abstract: The method of forming a minute focusing lens with respect to over a photoactive area of an image sensor such as a CCD or CMOS, comprising: coating a resist film on a flattening layer formed over the photoactive area of the image sensor; exposing the resist film to light via a photo-mask, and developing the resist film; and patterning the resist film into a lens configuration provides in this invention in order to form a lens having a designed configuration that provides a good light focusing efficiency. The photo-mask is a light transmission type having no light-shading layer. And, this photo-mask is the one having provided thereon a light transmission portion comprising a light refraction material, having on its surface portion a stairs portion, the stairs portion having the phase of a transmission light at its respective position controlled relative to a prescribed width so that a desired light intensity distribution may be obtained at the surface of the photo-mask light-exposed portion.
    Type: Grant
    Filed: September 26, 2002
    Date of Patent: December 2, 2003
    Assignee: Dai Nippon Printing Co., Ltd.
    Inventors: Yoichi Takahashi, Nobuhito Toyama, Hiroyuki Matsui
  • Patent number: 6655547
    Abstract: A chip component take-in apparatus takes in and guides downward prismatic chip components stored in a bulk state in a storage chamber one by one in a predetermined direction. When a first take-in member and a second take-in member are relatively moved up and down in each flat face contact state, the chip components in face contact with the flat faces of the take-in members are gradually guided to a center along guide ways. The guided chip components in the longitudinal direction thereof are taken into a passage constituted by grooves and are moved downward along the passage by self-weight.
    Type: Grant
    Filed: August 9, 2001
    Date of Patent: December 2, 2003
    Assignee: Taiyo Yuden Co., Ltd.
    Inventors: Koji Saito, Taro Yasuda, Hiroyuki Matsui
  • Publication number: 20030059725
    Abstract: The method of forming a minute focusing lens with respect to over a photoactive area of an image sensor such as a CCD or CMOS, comprising: coating a resist film on a flattening layer formed over the photoactive area of the image sensor; exposing the resist film to light via a photo-mask, and developing the resist film; and patterning the resist film into a lens configuration provides in this invention in order to form a lens having a designed configuration that provides a good light focusing efficiency. The photo-mask is a light transmission type having no light-shading layer. And, this photo-mask is the one having provided thereon a light transmission portion comprising a light refraction material, having on its surface portion a stairs portion, the stairs portion having the phase of a transmission light at its respective position controlled relative to a prescribed width so that a desired light intensity distribution may be obtained at the surface of the photo-mask light-exposed portion.
    Type: Application
    Filed: September 26, 2002
    Publication date: March 27, 2003
    Inventors: Yoichi Takahashi, Nobuhito Toyama, Hiroyuki Matsui
  • Publication number: 20030013591
    Abstract: A decanter type centrifugal separator capable of discharging sludge directly from a portion of the sludge with least moisture content in a bowl so as to lower a moisture content and increase a separation efficiency, wherein a screw conveyor rotated with a difference in speed provided relative to the bowl is stored in the bowl rotated at a high speed, a dewatering cake discharge route (20) is provided in one end wall (2) of the bowl, an opening (20a) of the route into the bowl is provided near the inner peripheral wall of the bowl, the discharge route provides a restriction effect to the discharge of the dewatering cake, and a sedimentary layer with thick sedimentation layer is formed near the opening, whereby that portion only of the cake is discharged through the discharge route under head press of the sedimentation layer, that portion receiving the highest consolidation effect by the head press of a centrifugal force acting on the sediment, among the sedimentation layers accumulated at one end of the bowl.
    Type: Application
    Filed: August 8, 2002
    Publication date: January 16, 2003
    Inventors: Tetsuo Ohinata, Hiroyoshi Mizukami, Noboru Suzuki, Yasuyuki Yoshida, Hiroyuki Matsui, Takashi Uchikawa
  • Patent number: 6470082
    Abstract: By using an external portable recording medium (for instance, IC card) that stores a personal ID, a communications apparatus automatically transmits the personal ID and its own terminal identification information to a center apparatus. The center apparatus manages the personal ID and the terminal identification information so that they are correlated with each other. For example, the terminal identification information includes a called-party address, a communication mode, and a position ID. Further, the center apparatus manages a present/absent mode for each personal ID. During the present mode, the center apparatus forwards a call using a personal telecommunication number, such as a UPT (universal personal telecommunication) number, which corresponds to a certain personal ID to a communications apparatus that corresponds to the personal ID. During the absent mode, the center apparatus automatically records a message.
    Type: Grant
    Filed: November 14, 2000
    Date of Patent: October 22, 2002
    Assignee: Nippon Telegraph and Telephone Corporation
    Inventors: Ryozo Nunokawa, Hiroyuki Matsui, Satoru Abe, Yutaka Nishino
  • Publication number: 20020130164
    Abstract: There are provided a chamber having openings which are opened to an outer air and through which a solder-adhered object w is passed and having a heating/melting area and carrying areas arranged adjacent to the heating/melting area, a carrying mechanism for carrying the solder-adhered object w into the heating/melting area, a formic-acid supplying means for supplying a formic acid into the heating/melting area, an exhausting means for exhausting a gas from the heating/melting area and its neighboring area to lower a pressure in the heating/melting area rather than an outer air, heating means for heating directly or indirectly the solder-adhered object w in the heating/melting area, and air-stream suppressing means for disturbing a gas flow between the heating/melting area and the carrying areas.
    Type: Application
    Filed: October 5, 2001
    Publication date: September 19, 2002
    Applicant: Fujitsu Limited
    Inventors: Hirohisa Matsuki, Hiroyuki Matsui, Eiji Yoshida, Takao Ohno, Koki Otake, Akiyo Mizutani, Motoshu Miyajima, Masataka Mizukoshi, Eiji Watanabe
  • Publication number: 20020078362
    Abstract: A security system is provided that can prevent a computer in operation to be used illegally. When judging that an ID code matching an ID code stored in the ID information holder 101 is not received and that the time period measured by the time measurer 106 exceeds a predetermined value, the controller 107 ends the operating system working in the PC 100.
    Type: Application
    Filed: December 19, 2001
    Publication date: June 20, 2002
    Applicant: NEC CORPORATION
    Inventor: Hiroyuki Matsui
  • Publication number: 20020076909
    Abstract: There is provided a semiconductor device manufacturing method which comprising the steps of forming solder bumps on an underlying metal film of a semiconductor device, and placing the semiconductor device and the solder layer in a reduced pressure atmosphere containing a formic acid to heat the solder bumps. Accordingly, the solder bumps can be formed without the use of flux not to generate voids in the solder layer, and also the cleaning required after the solder bumps are formed can be omitted.
    Type: Application
    Filed: December 13, 2001
    Publication date: June 20, 2002
    Applicant: FUJITSU LIMITED
    Inventors: Hirohisa Matsuki, Hiroyuki Matsui
  • Patent number: 6376501
    Abstract: The present invention relates to a type 2 helper T cell-selective immune response inhibitor, an immune response regulator and an anti-allergic agent, individually comprising, as an active ingredient, a purine derivative represented by General Formula (I): wherein R2 is hydrogen or a hydrocarbon group in which —CH2— not directly bound to the purine skeleton may be substituted by CO, SO2, O or S, and C—H not directly bound to the purine skeleton may be substituted by N, C-halogen or C—CN; R6 is hydroxyl, amino or amino which is mono- or di-substituted by a hydrocarbon group(s); R8 is hydroxyl, mercapto, acyloxy or hydrocarbon group-substituting oxycarbonyloxy; and R9 is a hydrocarbon group in which —CH2— not directly bound to the purine skeleton may be substituted by CO, SO2, O or S, and C—H not directly bound to the purine skeleton may be substituted by N, C-halogen or C—CN; or its tautomer or a salt of the purine derivative or the tautomer
    Type: Grant
    Filed: June 21, 2000
    Date of Patent: April 23, 2002
    Assignee: Japan Energy Corporation
    Inventors: Yoshiaki Isobe, Haruhisa Ogita, Masanori Tobe, Haruo Takaku, Hiroyuki Matsui, Hideyuki Tomizawa
  • Patent number: 6344407
    Abstract: A semiconductor device manufacturing method comprises the steps of forming solder bumps on an underlying metal film of a semiconductor device, and placing the semiconductor device and the solder layer in a reduced pressure atmosphere containing formic acid to form the solder bumps. Accordingly, the solder bumps can be formed without flux generating voids in the solder layer. Furthermore, the cleaning required after the solder bumps are formed can be omitted.
    Type: Grant
    Filed: October 19, 2000
    Date of Patent: February 5, 2002
    Assignee: Fujitsu Limited
    Inventors: Hirohisa Matsuki, Fumihiko Taniguchi, Kunio Kodama, Eiji Watanabe, Masataka Mizukoshi, Hiroyuki Matsui
  • Publication number: 20020011398
    Abstract: A chip component take-in apparatus takes in and guides downward prismatic chip components stored in a bulk state in a storage chamber one by one in a predetermined direction. When a first take-in member and a second take-in member are relatively moved up and down in each flat face contact state, the chip components in face contact with the flat faces of the take-in members are gradually guided to a center along guide ways. The guided chip components in the longitudinal direction thereof are taken into a passage constituted by grooves and are moved downward along the passage by self-weight.
    Type: Application
    Filed: August 9, 2001
    Publication date: January 31, 2002
    Applicant: Taiyo Yuden Co., Ltd.
    Inventors: Koji Saito, Taro Yasuda, Hiroyuki Matsui
  • Publication number: 20010052446
    Abstract: A chip component take-in apparatus takes in and guides downward prismatic chip components stored in a bulk state in a storage chamber one by one in a predetermined direction. When a first take-in member and a second take-in member are relatively moved up and down in each flat face contact state, the chip components in face contact with the flat faces of the take-in members are gradually guided to a center along guide ways. The guided chip components in the longitudinal direction thereof are taken into a passage constituted by grooves and are moved downward along the passage by self-weight.
    Type: Application
    Filed: August 9, 2001
    Publication date: December 20, 2001
    Applicant: Taiyo Yuden Co., Ltd.
    Inventors: Koji Saito, Taro Yasuda, Hiroyuki Matsui
  • Patent number: 6290095
    Abstract: A chip component take-in apparatus takes in and guides downward prismatic chip components stored in a bulk state in a storage chamber one by one in a predetermined direction. When a first take-in member and a second take-in member are relatively moved up and down in each flat face contact state, the chip components in face contact with the flat faces of the take-in members are gradually guided to a center along guide ways. The guided chip components in the longitudinal direction thereof are taken into a passage constituted by grooves and are moved downward along the passage by self-weight.
    Type: Grant
    Filed: May 15, 2000
    Date of Patent: September 18, 2001
    Assignee: Taiyo Yuden Co., Ltd.
    Inventors: Koji Saito, Taro Yasuda, Hiroyuki Matsui