Abstract: According to one embodiment, a semiconductor memory device includes a command processing module, a plurality of storage units, a plurality of control modules, an adjustment circuit, and a setting register. The adjustment circuit is configured to exclude the control module connected to the storage unit of a second group from a write operation in accordance with identification data, and to cause the control module connected to the storage unit of the second group to perform a read operation in a period overlapping the write operation performed by the control module connected to the storage unit of a first group.

Abstract: According to one embodiment, a data storage apparatus includes a read module, an error detector and a controller. The read module is configured to read data from a flash memory, more precisely from a rewrite area and a write-back area, both provided in the flash memory. The error detector is configured to detect errors, if any, in the data read. The controller is configured to keep rewriting data, without correcting the errors the error detector has detected in the rewrite area of the flash memory.

Abstract: According to one embodiment, a data storage apparatus includes an interface module and a controller. The interface module is configured to control rewritable nonvolatile memories provided for the respective channels. The controller is configured to write calibration data to the nonvolatile memories of any channel designated, through the interface module at the same time, in order to perform calibration.

Abstract: According to one embodiment, a semiconductor storage device includes a queuing buffer, a read module, a separating module, a write command issuing module, and a write module. The write command issuing module is configured to add a write address indicated by write pointer information to the management data obtained by the separating module in order to issue a write command, and to automatically queue the write command into the queuing buffer. The write module is configured to supply the write command issued by the write command issuing module to the nonvolatile memory in order to write data into the nonvolatile memory.

Abstract: According to one embodiment, a semiconductor storage device comprises nonvolatile memories, memory controllers connected to the nonvolatile memories, and an arbitration module. The arbitration module is configured to control a timing of permitting one of operations of program, erase, and read of the memory controllers.

Abstract: A system for authenticating a memory card including: a capacity switching-type memory card host device including a capacity switch notification module which notifies a memory card targeted for exchanging information that the capacity switching-type memory card host device handles a capacity switching-type memory card, and a capacity switch authentication module which authenticates whether the targeted memory card is the capacity switching-type memory card; a capacity switching-type memory card including a capacity switching-type controller which flags the large-capacity expression register use flag on receipt of notification of being the capacity switching-type memory card host device; and a bus which transmits and receives data between the capacity switching-type memory card host device and the capacity switching-type memory card.

Abstract: A system for authenticating a memory card including a capacity switching-type memory card host device including a capacity switch notification module which notifies a memory card targeted for exchanging information that the capacity switching-type memory card host device handles a capacity switching-type memory card, and a capacity switch authentication module which authenticates whether the targeted memory card is the capacity switching-type memory card, a capacity switching-type memory card including a capacity switching-type controller which flags the large-capacity expression register use flag on receipt of notification of being the capacity switching-type memory card host device, and a bus which transmits and receives data between the capacity switching-type memory card host device and the capacity switching-type memory card.

Abstract: According to one embodiment, a data reproducing device according to the invention includes a frequency difference detector, a phase comparator, a loop filter, an integrator, a first conversion part for converting a value of the integrator into a first conversion value, a second conversion part for converting the value of the integrator into a second conversion value, a first conversion table, a second conversion table, a first D/A converter (DAC), a second D/A converter (DAC), a voltage controlled oscillator (VCO), and a prediction table. The value of the integrator and the first conversion value are associated with each other and stored in the first conversion table in consideration of the characteristics of the VCO. Meanwhile, the value of the integrator and the second conversion value are associated with each other and stored in the second conversion table in consideration of the characteristics of the VCO.

Abstract: A disk device includes a reading section which reads reflected light and outputs a read signal according to the read reflected light, a processing section which calculates an adjustment value from the read signal, performs predetermined processing on the read signal based on the adjustment value, and outputs a process signal, a detecting section which detects a reading defect in the reading section based on the read signal, a determining section which determines signal quality of the process signal output from the processing section, a storage section which stores the adjustment value calculated by the processing section, in a memory area, based on a result output from the determining section, and a controller which, when the detecting section detects the reading defect, performs control so that the adjustment value is read out of the storage section and is supplied to the processing section.

Abstract: A system for authenticating a memory card including a capacity switching-type memory card host device including a capacity switch notification module which notifies a memory card targeted for exchanging information that the capacity switching-type memory card host device handles a capacity switching-type memory card, and a capacity switch authentication module which authenticates whether the targeted memory card is the capacity switching-type memory card, a capacity switching-type memory card including a capacity switching-type controller which flags the large-capacity expression register use flag on receipt of notification of being the capacity switching-type memory card host device, and a bus which transmits and receives data between the capacity switching-type memory card host device and the capacity switching-type memory card.

Abstract: Provided is an optical disc apparatus which reproduces with use of a PRML method an optical disc having data recorded in a plurality of code lengths, the optical disc apparatus including: an AD conversion unit adapted to convert a reproduction signal of the optical disc into a multi-value digital signal; a waveform equalization unit adapted to perform waveform equalization on the multi-value digital signal on the basis of a predetermined partial response to generate an equalized reproduction signal; a decoding unit adapted to generate decoded data corresponding to data recorded on the optical disc from the equalized reproduction signal; and a crest value extraction unit adapted to extract a crest value for each of the code lengths on the basis of the decoded data and a type of the predetermined partial response.

Abstract: A system for authenticating a memory card including: a capacity switching-type memory card host device including a capacity switch notification module which notifies a memory card targeted for exchanging information that the capacity switching-type memory card host device handles a capacity switching-type memory card, and a capacity switch authentication module which authenticates whether the targeted memory card is the capacity switching-type memory card; a capacity switching-type memory card including a capacity switching-type controller which flags the large-capacity expression register use flag on receipt of notification of being the capacity switching-type memory card host device; and a bus which transmits and receives data between the capacity switching-type memory card host device and the capacity switching-type memory card.

Abstract: A recorded stream generator generates a data block stream in synchronism with the phase of a recording clock, from the input data. The recorded stream generator further generates, for each predetermined data unit constituting the data block stream, a data phase reference pulse indicative of the phase of the data unit. An inserting section inserts a VFO signal into a predetermined amount (32 sectors) of the data block stream, the VFO signal having a length of time corresponding to a difference in phase between an wobble address phase signal and a data phase reference pulse. The inserting section thus provides a data stream DST consisting of the VFO signals and the data block streams. An LD uses light beams to record the data stream on an optical disk.

Abstract: An optical disc recording and reproducing apparatus includes a maximum likelihood detection unit for decoding binary data from a reproduced multivalued signal from an optical disc, an equalization error generation unit for obtaining an equalization error signal from an input signal and an output signal to and from the maximum likelihood detection unit, a convolution processing unit for performing a convolution operation between the equalization error signal and plural values determined by the partial response class, a pattern detection unit for detecting plural predetermined data sequence patterns from the binary data output from the maximum likelihood detection unit, and a grouping and averaging processing unit for calculating a recording compensation amount for each type of the data sequence patterns by grouping convolution output signals output from the convolution processing unit in accordance with the type of the data sequence patterns and by averaging each of the grouped convolution output signals.

Abstract: A disk apparatus has an equalizing unit which performs PR equalization for the read signal from the disk based on a plurality of tap coefficients, a decoding unit which performs a decoding process for the equalized read signal, a calculating unit which obtains an ideal signal of the decoded read signal, and compares the ideal signal with the decoded read signal, thereby calculating an error signal E, and a control unit which groups the tap coefficients into at least a first and second coefficient groups which are groups of tap coefficients at symmetrical locations each, and determines tap coefficients of the first coefficient group in a range of a first limit value K1 according to the calculated error signal, determines tap coefficients of the second coefficient group in a range of a second limit value and supplies the determined tap coefficients to the equalizing unit.

Abstract: According to one embodiment, a data recording and reproducing apparatus includes: a reproduced signal output device reading data recorded on an optical recording medium to output a reproduced signal; and a waveform compensation amount data generating device generating waveform compensation amount data of a recording waveform corresponding to recording data which is to be recorded to the optical recording medium. At the time of recording learning, this data recording and reproducing apparatus integrates, for each pattern, waveform error data which are used as a basis of the generation of the waveform compensation amount data by the waveform compensation amount data generating device, and adjusts output of a pattern instruction signal for instructing which of the patterns is an integration target, so as to integrate, for each pattern, the waveform error data in a target test write area corresponding to an integer number of rotations of the optical recording medium.

Abstract: According to one embodiment, in an information recording and reproducing apparatus, a record data correction unit generates correction data for correcting a record waveform generated according to record data. Further, the information recording and reproducing apparatus generates discrimination data for use in pattern discrimination performed to generate the correction data, using decoded data outputted from a PRML signal processing unit and the record data, and outputs the generated discrimination data to the record data correction unit.

Abstract: There is provided a recording apparatus which modulates record data by a predetermined modulation method and records record patterns corresponding to the record data on an optical disk, including a random data generator which generates random data as the record data, a data exchange processor which performs exchange processing on the random data so as to equalize a frequency of appearance of each of the record patterns relative to the entire record patterns on the optical disk corresponding to the respective random data, a modulator which modulates the random data subjected to the exchange processing by the predetermined modulation method, an optical head which records record patterns corresponding to the modulated random data on the optical disk, and reproduces the modulated random data from the recorded record patterns, and a record learning unit which calculates correction amounts for recorded positions of the respective record patterns based on the reproduced random data.

Abstract: A system for authenticating a memory card including: a capacity switching-type memory card host device including a capacity switch notification module which notifies a memory card targeted for exchanging information that the capacity switching-type memory card host device handles a capacity switching-type memory card, and a capacity switch authentication module which authenticates whether the targeted memory card is the capacity switching-type memory card; a capacity switching-type memory card including a capacity switching-type controller which flags the large-capacity expression register use flag on receipt of notification of being the capacity switching-type memory card host device; and a bus which transmits and receives data between the capacity switching-type memory card host device and the capacity switching-type memory card.

Abstract: A system for authenticating a memory card including: a capacity switching-type memory card host device including a capacity switch notification module which notifies a memory card targeted for exchanging information that the capacity switching-type memory card host device handles a capacity switching-type memory card, and a capacity switch authentication module which authenticates whether the targeted memory card is the capacity switching-type memory card; a capacity switching-type memory card including a capacity switching-type controller which flags the large-capacity expression register use flag on receipt of notification of being the capacity switching-type memory card host device; and a bus which transmits and receives data between the capacity switching-type memory card host device and the capacity switching-type memory card.