Patents by Inventor Hiroyuki Nemoto

Hiroyuki Nemoto has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10649891
    Abstract: A storage device includes a nonvolatile memory, and a controller configured to perform, in response to commands from the host device, a read operation and a write operation on the nonvolatile memory. The controller divides a logical address space of the storage device into a plurality of subspaces and manages a priority value for each of the subspaces, the priority values of the subspaces determining an order for setting up the subspaces upon start-up of the storage device.
    Type: Grant
    Filed: August 24, 2017
    Date of Patent: May 12, 2020
    Assignee: Toshiba Memory Corporation
    Inventors: Satoshi Arai, Shunitsu Kohara, Kazuya Kitsunai, Yoshihisa Kojima, Hiroyuki Nemoto
  • Publication number: 20200132029
    Abstract: Provided is a high-pressure fuel pump that ensures oil tightness even at high fuel pressure and has a small and lightweight inexpensive discharge valve structure. Therefore, a high-pressure fuel pump according to the present invention includes: a discharge valve arranged on a discharge side of a pressurizing chamber; a discharge valve seat on which the discharge valve is seated; and a facing member configured independently as a separate member from the discharge valve seat and located on an opposite side of the discharge valve seat with the discharge valve interposed therebetween, in which a stroke direction regulating portion that regulates displacement of the discharge valve in a stroke direction is formed on a tapered surface of the facing member.
    Type: Application
    Filed: June 25, 2018
    Publication date: April 30, 2020
    Inventors: Moritsugu AKIYAMA, Satoshi USUI, Hiroyuki YAMADA, Shigehiko OMATA, Masashi NEMOTO
  • Patent number: 10402097
    Abstract: According to one embodiment, a memory system includes a nonvolatile memory, and a controller configured to control the nonvolatile memory. The controller includes an access controller configured to control access to the nonvolatile memory, based on a first request which is issued from an outside, and a processor configured to execute a background process for the nonvolatile memory, based on a second request which is issued from the outside before the first request is issued.
    Type: Grant
    Filed: September 6, 2018
    Date of Patent: September 3, 2019
    Assignee: Toshiba Memory Corporation
    Inventors: Hiroyuki Nemoto, Kazuya Kitsunai, Yoshihisa Kojima, Katsuhiko Ueki
  • Publication number: 20190217869
    Abstract: A control apparatus (communication device) includes: a determination unit which determines, based on a communication data item passing through a network to which a plurality of ECUs are connected in a system, an anomaly level of the communication data item or an operating state of the system; and a first control unit which (i) changes at least one of a method of transmitting a log of the communication data item and a method of storing the log of the communication data item, according to the anomaly level of the communication data item determined, or (ii) performs sampling on the communication data item according to a method of sampling corresponding to the operating state determined.
    Type: Application
    Filed: January 10, 2019
    Publication date: July 18, 2019
    Applicant: PANASONIC INTELLECTUAL PROPERTY MANAGEMENT CO., LTD.
    Inventors: Akihito TAKEUCHI, Kaoru YOKOTA, Hiroyuki WADA, Toshihisa NAKANO, Takayuki FUJII, Yuusuke NEMOTO
  • Publication number: 20190196905
    Abstract: According to one embodiment, in a memory system, a controller is configured to write a first data among write data to be written across the multiple chips of the first memory area into part of the first memory area and write, in response to a power supply disconnection being detected before writing a second data among the write data into the first memory area, a first information about a storage location where the second data has been stored and the second data into the second memory area. The controller is configured to read, in response to power return being detected, the first data from the part of the first memory area, and read the first information from the second memory area. The controller is configured to generate a second information about a reference location to access the second data based on the read first information.
    Type: Application
    Filed: September 7, 2018
    Publication date: June 27, 2019
    Applicant: Toshiba Memory Corporation
    Inventors: Hiroyuki NEMOTO, Chihoko Shigeta, Kazuya Kitsunai
  • Patent number: 10301754
    Abstract: A sewing machine includes a vertical shuttle and a middle shuttle presser disposed at a front side of the vertical shuttle. The sewing machine includes a presser frame, an optical upper thread detector and a stitch skipping detection processor. The presser frame is movably supported between a pressing position at which the middle shuttle presser is pressed and a retract position separated from the pressing position. The optical upper thread detector is provided at the presser frame and is configured to detect passage of an upper thread using detecting light which passes through passage portions formed in the middle shuttle presser and which crosses a front side of a bobbin case of the vertical shuttle. The stitch skipping detection processor is configured to determine whether the passage of the upper thread is present based on an amount of received light of the detecting light from the upper thread detector.
    Type: Grant
    Filed: January 12, 2017
    Date of Patent: May 28, 2019
    Assignee: JUKI CORPORATION
    Inventors: Masaru Saito, Etsuo Nemoto, Hiroyuki Tanaka, Kimihiro Yokose
  • Patent number: 10305232
    Abstract: A connector housing includes a cylindrical side wall. The cylindrical side wall includes a concave surface on one side of an outer circumferential surface of the cylindrical side wall in a first direction. The concave surface curves inwards into an arc shape and extends in a second direction, so that the concave surface is to be pressed against a cylindrical member with the second direction aligned with a direction in which the cylindrical member extends.
    Type: Grant
    Filed: January 23, 2018
    Date of Patent: May 28, 2019
    Assignee: Yazaki Corporation
    Inventors: Tomohiro Urashima, Masashi Nakamura, Yoshiharu Ishii, Hiroyuki Sasaki, Kenji Nemoto
  • Patent number: 10294122
    Abstract: Embodiments of the invention provide a seawater desalination device, including a steam re-compressor configured to pressurize steam by pressurizing a steam; a first heat exchanger configured to exchange an amount of sensible heat of seawater to be desalinated with an amount of liquid sensible heat after pressurized steam is condensed, and an amount of sensible heat of a concentrated liquid after seawater is concentrated; a second heat exchanger configured to exchange an amount of heat of pressurized steam, an amount of latent heat of vaporization of seawater, and an amount of sensible heat when seawater is evaporated, and configured to concentrate seawater; a seawater supply means; a steam supply means; a first discharge means; a second discharge means; and a water-droplet separation means.
    Type: Grant
    Filed: December 4, 2015
    Date of Patent: May 21, 2019
    Assignee: OHKAWARA KAKOHKI CO., LTD.
    Inventors: Masaaki Ohkawara, Gentaro Nemoto, Yasuki Kansha, Atsushi Tsutsumi, Masanori Ishizuka, Hiroyuki Mizuno
  • Publication number: 20190018596
    Abstract: According to one embodiment, a memory system includes a nonvolatile memory, and a controller configured to control the nonvolatile memory. The controller includes an access controller configured to control access to the nonvolatile memory, based on a first request which is issued from an outside, and a processor configured to execute a background process for the nonvolatile memory, based on a second request which is issued from the outside before the first request is issued.
    Type: Application
    Filed: September 6, 2018
    Publication date: January 17, 2019
    Inventors: Hiroyuki Nemoto, Kazuya Kitsunai, Yoshihisa Kojima, Katsuhiko Ueki
  • Publication number: 20180328239
    Abstract: A communicating hole, which communicates between a clearance space and the outside of a cover member, is formed in the cover member, and a seal cap is fitted to and retained in a distal-end opening of the communicating hole. The seal cap includes a cap main body having a ventilation through hole formed in an internal axial direction and an outer peripheral wall configured to engage with the communicating hole, a supporting portion fitted, from the outside, into a recessed groove formed in an outside end face of the cap main body, and a ventilation filter located on a bottom face of the recessed groove and retained and sandwiched between the cap main body and the supporting portion. Therefore, an internal pressure rise in the clearance space between the cover member and an electric motor can be effectively suppressed, and thus improved mountability and retainability can be obtained.
    Type: Application
    Filed: November 27, 2015
    Publication date: November 15, 2018
    Applicant: HITACHI AUTOMOTIVE SYSTEMS, LTD.
    Inventors: Ryo TADOKORO, Isao DOI, Hiroyuki NEMOTO, Seiichi SUE
  • Patent number: 10095410
    Abstract: According to one embodiment, a memory system includes a nonvolatile memory, and a controller configured to control the nonvolatile memory. The controller includes an access controller configured to control access to the nonvolatile memory, based on a first request which is issued from a host, and a processor configured to execute a background process for the nonvolatile memory, based on a second request which is issued from the host before the first request is issued.
    Type: Grant
    Filed: November 21, 2017
    Date of Patent: October 9, 2018
    Assignee: Toshiba Memory Corporation
    Inventors: Hiroyuki Nemoto, Kazuya Kitsunai, Yoshihisa Kojima, Katsuhiko Ueki
  • Patent number: 9940071
    Abstract: A memory system includes a non-volatile memory and a controller circuit. The controller circuit is configured to carry out an atomic write operation in the non-volatile memory in response to an atomic write command, and selectively carry out one of a first operation and a second operation corresponding to address mapping between a logical address and a physical address of the non-volatile memory, along with the atomic write operation. When the first operation is selected, the controller circuit starts to update the address mapping after receiving a notification that writing of all data of the atomic write operation has been completed. When the second operation is carried out, the controller circuit starts to update the address mapping before receiving the notification.
    Type: Grant
    Filed: August 22, 2016
    Date of Patent: April 10, 2018
    Assignee: Toshiba Memory Corporation
    Inventors: Hiroyuki Nemoto, Shunitsu Kohara, Kazuya Kitsunai, Satoshi Arai
  • Publication number: 20180088828
    Abstract: According to one embodiment, a memory system includes a nonvolatile memory, and a controller configured to control the nonvolatile memory. The controller includes an access controller configured to control access to the nonvolatile memory, based on a first request which is issued from a host, and a processor configured to execute a background process for the nonvolatile memory, based on a second request which is issued from the host before the first request is issued.
    Type: Application
    Filed: November 21, 2017
    Publication date: March 29, 2018
    Inventors: Hiroyuki Nemoto, Kazuya Kitsunai, Yoshihisa Kojima, Katsuhiko Ueki
  • Publication number: 20180060228
    Abstract: A storage device includes a nonvolatile memory, and a controller configured to perform, in response to commands from the host device, a read operation and a write operation on the nonvolatile memory. The controller divides a logical address space of the storage device into a plurality of subspaces and manages a priority value for each of the subspaces, the priority values of the subspaces determining an order for setting up the subspaces upon start-up of the storage device.
    Type: Application
    Filed: August 24, 2017
    Publication date: March 1, 2018
    Inventors: Satoshi ARAI, Shunitsu KOHARA, Kazuya KITSUNAI, Yoshihisa KOJIMA, Hiroyuki NEMOTO
  • Patent number: 9857984
    Abstract: According to one embodiment, a memory system includes a nonvolatile memory, and a controller configured to control the nonvolatile memory. The controller includes an access controller configured to control access to the nonvolatile memory, based on a first request which is issued from a host, and a processor configured to execute a background process for the nonvolatile memory, based on a second request which is issued from the host before the first request is issued.
    Type: Grant
    Filed: December 24, 2015
    Date of Patent: January 2, 2018
    Assignee: Toshiba Memory Corporation
    Inventors: Hiroyuki Nemoto, Kazuya Kitsunai, Yoshihisa Kojima, Katsuhiko Ueki
  • Patent number: 9683465
    Abstract: A valve-timing control apparatus varies a relative phase between a cam shaft and a crankshaft by energizing an electric motor through a power-feeding brush provided to be in contact with a slip ring. The valve-timing control apparatus includes a retaining member slidably retaining the power-feeding brush; a connector provided in the retaining member and connected to a power source; a pigtail harness including one end portion connected with the power-feeding brush, and another end portion connected with a terminal of the connector through a fixing portion; and a guide portion provided in the retaining member and including an outer circumferential surface formed in an arc-shape. The pigtail harness bends along the outer circumferential surface of the guide portion. The another end portion extends substantially in a linear arrangement from the fixing portion to a bending portion at which the pigtail harness bends along the outer circumferential surface.
    Type: Grant
    Filed: May 29, 2015
    Date of Patent: June 20, 2017
    Assignee: HITACHI AUTOMOTIVE SYSTEMS, LTD.
    Inventors: Ryo Tadokoro, Seiichi Sue, Shinichi Kawada, Hiroyuki Nemoto, Isao Doi
  • Publication number: 20170160988
    Abstract: A memory system includes a non-volatile memory and a controller circuit. The controller circuit is configured to carry out an atomic write operation in the non-volatile memory in response to an atomic write command, and selectively carry out one of a first operation and a second operation corresponding to address mapping between a logical address and a physical address of the non-volatile memory, along with the atomic write operation. When the first operation is selected, the controller circuit starts to update the address mapping after receiving a notification that writing of all data of the atomic write operation has been completed. When the second operation is carried out, the controller circuit starts to update the address mapping before receiving the notification.
    Type: Application
    Filed: August 22, 2016
    Publication date: June 8, 2017
    Inventors: Hiroyuki NEMOTO, Shunitsu KOHARA, Kazuya KITSUNAI, Satoshi ARAI
  • Publication number: 20170031601
    Abstract: According to one embodiment, a memory system is connectable to a host. The memory system includes a first memory including a cache area, and a memory controller. The memory controller sets the available amount of the cache area in response to a first command from the host. In a case where the available amount of the cache area is successfully set, the memory controller transmits a setting completion notification to the host. In a case where the available amount of the cache area cannot be set, the memory controller transmits a notification of non-settable to the host.
    Type: Application
    Filed: March 11, 2016
    Publication date: February 2, 2017
    Applicant: Kabushiki Kaisha Toshiba
    Inventors: Satoshi ARAI, Kazuya KITSUNAI, Shunitsu KOHARA, Hiroyuki NEMOTO
  • Patent number: 9389341
    Abstract: A method of manufacturing a lens array plate includes: forming a light shielding film on a flat surface of a dielectric substrate; forming a plurality of convex lenses on the flat surface of the dielectric substrate by press molding the dielectric substrate with the light shielding film; and forming a stack of two lens array plates manufactured by press molding. The light shielding film is not formed in a lens formation area in which the convex lens is formed.
    Type: Grant
    Filed: June 20, 2012
    Date of Patent: July 12, 2016
    Assignee: Nippon Sheet Glass Company, Limited
    Inventor: Hiroyuki Nemoto
  • Publication number: 20160188220
    Abstract: According to one embodiment, a memory system includes a nonvolatile memory, and a controller configured to control the nonvolatile memory. The controller includes an access controller configured to control access to the nonvolatile memory, based on a first request which is issued from an outside, and a processor configured to execute a background process for the nonvolatile memory, based on a second request which is issued from the outside before the first request is issued.
    Type: Application
    Filed: December 24, 2015
    Publication date: June 30, 2016
    Inventors: Hiroyuki Nemoto, Kazuya Kitsunai, Yoshihisa Kojima, Katsuhiko Ueki