Abstract: A semiconductor memory device includes a first wiring extending in a first direction; a second wiring extending in a second direction and spaced from the first wiring in a third direction; a stacked body disposed between the first and second wirings and including conductive layers and insulating layers alternately stacked on top of one another in the third direction; a columnar body extending through the stacked body and including: (a) an electrode disposed between the first wiring and the second wiring, (b) a memory layer disposed between the electrode and the conductive layers, and (c) a selection layer disposed between the electrode and the first wiring; and a diode disposed between the electrode and the second wiring.

Abstract: A semiconductor memory device includes a first wiring to a fifth wiring, a plurality of memory cells disposed between the wirings, and a first contact electrode to a third contact electrode. The first contact electrode is disposed between the first wiring and the fifth wiring, and is electrically connected to the first wiring and the fifth wiring. The second contact electrode is disposed between the first contact electrode and the fifth wiring, and is electrically connected to the first wiring and the fifth wiring. The third contact electrode is disposed between the second contact electrode and the fifth wiring, and is electrically connected to the first wiring and the fifth wiring. The second contact electrode has a width larger than a width of the first contact electrode and larger than a width of the third contact electrode.

Abstract: A semiconductor memory device includes a first wiring to a fifth wiring, a plurality of memory cells disposed between the wirings, and a first contact electrode to a third contact electrode. The first contact electrode is disposed between the first wiring and the fifth wiring, and is electrically connected to the first wiring and the fifth wiring. The second contact electrode is disposed between the first contact electrode and the fifth wiring, and is electrically connected to the first wiring and the fifth wiring. The third contact electrode is disposed between the second contact electrode and the fifth wiring, and is electrically connected to the first wiring and the fifth wiring. The second contact electrode has a width larger than a width of the first contact electrode and larger than a width of the third contact electrode.

Abstract: A semiconductor memory device includes a first wiring to a fifth wiring, a plurality of memory cells disposed between the wirings, and a first contact electrode to a third contact electrode. The first contact electrode is disposed between the first wiring and the fifth wiring, and is electrically connected to the first wiring and the fifth wiring. The second contact electrode is disposed between the first contact electrode and the fifth wiring, and is electrically connected to the first wiring and the fifth wiring. The third contact electrode is disposed between the second contact electrode and the fifth wiring, and is electrically connected to the first wiring and the fifth wiring. The second contact electrode has a width larger than a width of the first contact electrode and larger than a width of the third contact electrode.

Abstract: A semiconductor storage device includes a first region, a second region, and a third region. The first region includes first wirings extending in a first direction, second wirings extending in a second direction, and a memory cells provided at intersections of the first and second wirings. The second region includes a contact extending in a third direction. The third region includes first dummy wirings extending in the first direction, and a second dummy wirings extending in the second direction. A width in the first direction of a first one of the second dummy wirings, closest to the first region or the second region in the first direction, is equal to or less than a width in the first direction of a second one of the second dummy wirings next closest to the first region or the second region in the first direction.

Abstract: A semiconductor device includes: a semiconductor substrate including a first area and a second area; a plurality of memory cells provided in the first area; a mark provided in the second area and having a first side surface and a second side surface that intersects with the first side surface; and a plurality of patterns provided in the second area and provided on the first side surface and the second side surface.

Abstract: A semiconductor memory device includes a first wiring extending in a first direction; a second wiring extending in a second direction and spaced from the first wiring in a third direction; a stacked body disposed between the first and second wirings and including conductive layers and insulating layers alternately stacked on top of one another in the third direction; a columnar body extending through the stacked body and including: (a) an electrode disposed between the first wiring and the second wiring, (b) a memory layer disposed between the electrode and the conductive layers, and (c) a selection layer disposed between the electrode and the first wiring; and a diode disposed between the electrode and the second wiring.

Abstract: According to one embodiment, a semiconductor storage device includes a first electrode and a second electrode spaced in a first direction and a phase change layer provided between the first electrode and the second electrode. The phase change layer comprises at least one of germanium (Ge), antimony (Sb), and tellurium (Te). The phase change layer is configured to be able to transition to a first state in which a volume ratio of an amorphous phase to a crystalline phase is a first ratio, a second state in which the volume ratio is a second ratio larger than the first ratio, and a third state in which the volume ratio is a third ratio larger than the second ratio.

Abstract: According to one embodiment, a semiconductor memory device includes: a first and a second wirings; a third wiring disposed between them; a first phase change layer disposed between the first and the third wirings; a first conducting layer disposed on a first wiring side surface of the first phase change layer; a second conducting layer disposed on a third wiring side surface of the first phase change layer; a second phase change layer disposed between the third and the second wirings; a third conducting layer disposed on a third wiring side surface of the second phase change layer; and a fourth conducting layer disposed on a second wiring side surface of the second phase change layer. The first and the fourth conducting layers have coefficients of thermal conductivity larger or smaller than the coefficients of thermal conductivity of the second and the third conducting layers.

Abstract: A semiconductor memory device includes a first wiring to a fifth wiring, a plurality of memory cells disposed between the wirings, and a first contact electrode to a third contact electrode. The first contact electrode is disposed between the first wiring and the fifth wiring, and is electrically connected to the first wiring and the fifth wiring. The second contact electrode is disposed between the first contact electrode and the fifth wiring, and is electrically connected to the first wiring and the fifth wiring. The third contact electrode is disposed between the second contact electrode and the fifth wiring, and is electrically connected to the first wiring and the fifth wiring. The second contact electrode has a width larger than a width of the first contact electrode and larger than a width of the third contact electrode.

Abstract: A storage device includes first wiring layers extending in a first direction; second wiring layers extending in a second direction; third wiring layers extending in the second direction; a first memory cell arranged at each cross point of one second wiring layer and one first wiring layer; fourth wiring layers extending in the first direction; and a second memory cell arranged at each cross point of one fourth wiring layer and one third wiring layer. The second wiring layer has a first surface in contact with the third wiring layer and a second surface that has a portion extending in the first direction, the extended portion of the second surface being longer than the first surface in the first direction, the second surface being spaced from the first surface in the third direction.

Abstract: A semiconductor memory device includes a first wiring to a fifth wiring, a plurality of memory cells disposed between the wirings, and a first contact electrode to a third contact electrode. The first contact electrode is disposed between the first wiring and the fifth wiring, and is electrically connected to the first wiring and the fifth wiring. The second contact electrode is disposed between the first contact electrode and the fifth wiring, and is electrically connected to the first wiring and the fifth wiring. The third contact electrode is disposed between the second contact electrode and the fifth wiring, and is electrically connected to the first wiring and the fifth wiring. The second contact electrode has a width larger than a width of the first contact electrode and larger than a width of the third contact electrode.

Abstract: A semiconductor storage device includes a first region, a second region, and a third region. The first region includes first wirings extending in a first direction, second wirings extending in a second direction, and a memory cells provided at intersections of the first and second wirings. The second region includes a contact extending in a third direction. The third region includes first dummy wirings extending in the first direction, and a second dummy wirings extending in the second direction. A width in the first direction of a first one of the second dummy wirings, closest to the first region or the second region in the first direction, is equal to or less than a width in the first direction of a second one of the second dummy wirings next closest to the first region or the second region in the first direction.

Abstract: According to one embodiment, a semiconductor memory device includes: a substrate including a first area, a second area, and a third area, the second and the third areas being adjacent to the first area; a first insulating layer disposed in the first to the third areas; a first wiring disposed on a surface of the first insulating layer in the first area; a first memory cell disposed on the first wiring; a second wiring disposed on the first memory cell; and a contact connected to the second wiring in the second area. The surface of the first insulating layer includes: first surfaces disposed in at least one of the second area and the third area and arranged in the first direction; and second surfaces disposed between the first surfaces. The second surfaces are close to or far from the substrate compared with the first surfaces.

Abstract: A semiconductor memory device includes a first wiring to a fifth wiring, a plurality of memory cells disposed between the wirings, and a first contact electrode to a third contact electrode. The first contact electrode is disposed between the first wiring and the fifth wiring, and is electrically connected to the first wiring and the fifth wiring. The second contact electrode is disposed between the first contact electrode and the fifth wiring, and is electrically connected to the first wiring and the fifth wiring. The third contact electrode is disposed between the second contact electrode and the fifth wiring, and is electrically connected to the first wiring and the fifth wiring. The second contact electrode has a width larger than a width of the first contact electrode and larger than a width of the third contact electrode.

Abstract: A storage device includes first wiring layers extending in a first direction; second wiring layers extending in a second direction; third wiring layers extending in the second direction; a first memory cell arranged at each cross point of one second wiring layer and one first wiring layer; fourth wiring layers extending in the first direction; and a second memory cell arranged at each cross point of one fourth wiring layer and one third wiring layer. The second wiring layer has a first surface in contact with the third wiring layer and a second surface that has a portion extending in the first direction, the extended portion of the second surface being longer than the first surface in the first direction, the second surface being spaced from the first surface in the third direction.

Abstract: According to one embodiment, a semiconductor memory device includes: a first and a second wirings; a third wiring disposed between them; a first phase change layer disposed between the first and the third wirings; a first conducting layer disposed on a first wiring side surface of the first phase change layer; a second conducting layer disposed on a third wiring side surface of the first phase change layer; a second phase change layer disposed between the third and the second wirings; a third conducting layer disposed on a third wiring side surface of the second phase change layer; and a fourth conducting layer disposed on a second wiring side surface of the second phase change layer. The first and the fourth conducting layers have coefficients of thermal conductivity larger or smaller than the coefficients of thermal conductivity of the second and the third conducting layers.

Abstract: According to one embodiment, a semiconductor memory device includes: a substrate including a first area, a second area, and a third area, the second and the third areas being adjacent to the first area; a first insulating layer disposed in the first to the third areas; a first wiring disposed on a surface of the first insulating layer in the first area; a first memory cell disposed on the first wiring; a second wiring disposed on the first memory cell; and a contact connected to the second wiring in the second area. The surface of the first insulating layer includes: first surfaces disposed in at least one of the second area and the third area and arranged in the first direction; and second surfaces disposed between the first surfaces. The second surfaces are close to or far from the substrate compared with the first surfaces.

Abstract: According to one embodiment, a semiconductor memory device includes a first electrode and a second electrode, a phase change layer disposed between the first electrode and the second electrode, and a conducting layer disposed between the first electrode and the phase change layer. The phase change layer contains a crystal having a Face-Centered Cubic lattice structure with a first lattice constant. The conducting layer contains a crystal having a Face-Centered Cubic lattice structure with a second lattice constant. The second lattice constant is larger than 80% and smaller than 120% of the first lattice constant.

Abstract: A semiconductor memory device according to an embodiment comprises: a semiconductor substrate extending in a first direction and a second direction, the first and second directions intersecting each other; a first wiring line disposed above the semiconductor substrate and extending in the first direction; a second wiring line disposed above the semiconductor substrate and extending in a third direction, the third direction intersecting the first direction and the second direction; a variable resistance film disposed at an intersection of the first wiring line and the second wiring line; a first insulating film disposed aligned with the second wiring line in the first direction; a first film disposed between the first wiring line and the first insulating film; and a second film disposed between the first insulating film and the first film and configured from a material different from that of the first film.