Patents by Inventor Hiroyuki Yamagishi

Hiroyuki Yamagishi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11947929
    Abstract: An arithmetic device includes a comparison unit comparing voltage generated with charge stored in a storage unit with a threshold, and outputting an output signal at a timing when the voltage exceeds the threshold, and a timing extension unit extending an interval between timings at each of which the output signal is output.
    Type: Grant
    Filed: July 4, 2019
    Date of Patent: April 2, 2024
    Assignee: SONY CORPORATION
    Inventor: Hiroyuki Yamagishi
  • Publication number: 20240051226
    Abstract: A stereolithography device includes: a container that stores a photocurable resin before curing, the container having a bottom plate that is optically transparent; a holder configured to be immersed into the photocurable resin; a reaction light irradiation section configured to irradiate a reaction light that accelerates curing of the photocurable resin, wherein the reaction light passes through a boundary surface between the bottom plate and the photocurable resin; and an inhibition light irradiation section configured to irradiate an inhibition light that inhibits curing of the photocurable resin, wherein the inhibition light is totally reflected at the boundary surface.
    Type: Application
    Filed: August 18, 2021
    Publication date: February 15, 2024
    Applicant: Fujikura Ltd.
    Inventor: Hiroyuki Yamagishi
  • Patent number: 11900184
    Abstract: A multiply-accumulate device (10) includes: a comparison unit (18) that compares, with a threshold voltage, a voltage generated by an electric charge stored in a storage unit (14), and outputs an output signal at timing at which the voltage exceeds the threshold voltage; and a control circuit (110) that reduces, based on a predetermined set value, a charging current to the storage unit (14) from a plurality of input units (13) connected to the storage unit (14).
    Type: Grant
    Filed: July 5, 2019
    Date of Patent: February 13, 2024
    Assignee: Sony Group Corporation
    Inventors: Yasushi Fujinami, Hiroyuki Yamagishi
  • Publication number: 20240019615
    Abstract: An optical computing device includes a substrate and planar light diffraction elements. Each of the planar light diffraction elements is fixed to the substrate and includes microcells that have respective thicknesses or refractive indices set independently.
    Type: Application
    Filed: August 2, 2021
    Publication date: January 18, 2024
    Applicant: FUJIKURA LTD.
    Inventor: Hiroyuki Yamagishi
  • Publication number: 20230417963
    Abstract: A method is provided for manufacturing an optical computing device using a container that includes n side walls WS1 to WSn and n bottom walls WB1 to WBn made of an optically-transparent material, where n is a natural number of not less than 2. The method includes: forming the container including an i-th cavity Ci, using at least an i-th bottom wall WBi and an i-th side wall WSi, where i is an integer of 1?i?n; filling the cavity Ci with a liquid material Ri containing a photo-curable resin; and forming a light diffraction element on one main surface of the bottom wall WBi through stereolithography by emitting light to a part near an interface between the bottom wall WBi and the liquid material Ri to cure the photo-curable resin.
    Type: Application
    Filed: August 18, 2021
    Publication date: December 28, 2023
    Applicants: Fujikura Ltd., Fujikura Ltd.
    Inventor: Hiroyuki Yamagishi
  • Patent number: 11836462
    Abstract: A multiply-accumulate system (1) includes: a statistic calculation unit (111) that executes a standardization calculation for an input signal; and a multiply-accumulate device (10) that executes multiplication-accumulation based on the standardized input signal.
    Type: Grant
    Filed: July 4, 2019
    Date of Patent: December 5, 2023
    Assignee: Sony Group Corporation
    Inventors: Yasushi Fujinami, Hiroyuki Yamagishi
  • Publication number: 20230384608
    Abstract: A light diffraction element unit includes an optically-transparent substrate; a light diffraction element disposed on a main surface of the optically-transparent substrate; and a three-dimensional alignment mark disposed on the main surface in a vicinity of the light diffraction element and having a thickness greater than a thickness of the light diffraction element.
    Type: Application
    Filed: August 18, 2021
    Publication date: November 30, 2023
    Applicant: Fujikura Ltd.
    Inventor: Hiroyuki Yamagishi
  • Patent number: 11714606
    Abstract: A multiply-accumulate system (1) includes: a statistic calculation unit (111) that executes a standardization calculation for an input signal; and a multiply-accumulate device (10) that executes multiplication-accumulation based on the standardized input signal.
    Type: Grant
    Filed: July 4, 2019
    Date of Patent: August 1, 2023
    Assignee: Sony Group Corporation
    Inventors: Yasushi Fujinami, Hiroyuki Yamagishi
  • Publication number: 20230068974
    Abstract: An optical computing device includes: a light-diffraction element group including planar light-diffraction elements made of a photo-curable resin; and a tubular body that houses the light-diffraction element group and that has an inner surface to which at least a part of a perimeter of each of the planar light-diffraction elements is fixed.
    Type: Application
    Filed: February 18, 2021
    Publication date: March 2, 2023
    Applicant: FUJIKURA LTD.
    Inventor: Hiroyuki Yamagishi
  • Patent number: 11594743
    Abstract: A method of inspecting short circuit of an electrolyte membrane by a short circuit inspection apparatus includes an obtaining step of performing a process of obtaining the energization state of a limited range including divided portions that are adjacent to each other in a range which is smaller than the entire range of the plurality of divided portions, for each of a plurality of limited ranges provided at different positions, and a determination step of determining whether or not a short circuit portion is present in the electrolyte membrane based on the energization state of the plurality of limited ranges.
    Type: Grant
    Filed: June 24, 2021
    Date of Patent: February 28, 2023
    Assignee: Honda Motor Co., Ltd.
    Inventors: Hiroaki Kawanishi, Hiroyuki Yamagishi
  • Patent number: 11534085
    Abstract: Provided is a signal processing device capable of distinguishing and measuring a plurality of measurement targets even with simple configuration. The signal processing device including a reception processing unit that receives a response to a predetermined signal transmitted from a transmission antenna, and a determination unit that determines the plurality of measurement targets by a response to a plurality of signals corresponding to a second direction having a predetermined range different from a first direction having a predetermined range.
    Type: Grant
    Filed: October 11, 2017
    Date of Patent: December 27, 2022
    Assignee: SONY SEMICONDUCTOR SOLUTIONS CORPORATION
    Inventors: Shigenori Uchida, Kenichi Kawasaki, Hiroyuki Yamagishi
  • Publication number: 20210408565
    Abstract: A method of inspecting short circuit of an electrolyte membrane by a short circuit inspection apparatus includes an obtaining step of performing a process of obtaining the energization state of a limited range including divided portions that are adjacent to each other in a range which is smaller than the entire range of the plurality of divided portions, for each of a plurality of limited ranges provided at different positions, and a determination step of determining whether or not a short circuit portion is present in the electrolyte membrane based on the energization state of the plurality of limited ranges.
    Type: Application
    Filed: June 24, 2021
    Publication date: December 30, 2021
    Inventors: Hiroaki KAWANISHI, Hiroyuki YAMAGISHI
  • Publication number: 20210376836
    Abstract: A signal processing circuit (12) outputs, in a case where a first timing at which a first input signal changes is earlier than or same as a second timing at which a second input signal changes, a first output signal at the first timing and a second output signal at the second timing, and outputs, in a case where the first timing is later than the second timing, the first output signal and the second output signal at the second timing.
    Type: Application
    Filed: July 5, 2019
    Publication date: December 2, 2021
    Inventors: AKITO SEKIYA, TOMOHIRO MATSUMOTO, HIROYUKI YAMAGISHI, YASUSHI FUJINAMI, YUSUKE OIKE, RYOJI IKEGAYA
  • Publication number: 20210286591
    Abstract: A signal processing circuit (13) has: a plurality of first circuits (41-1) each including a first-time-length-signal output circuit (51) configured to output a first time-length signal representing a time length between first timing at which a first input signal changes and second timing at which a second input signal changes and a second-time-length-signal output circuit (52) configured to output the first time-length signal as a second time-length signal at timing based on a control signal; and a second circuit (42) configured to output the second time-length signal having the longest time length among a plurality of the second time-length signals output respectively from the plurality of first circuits (41-1).
    Type: Application
    Filed: July 10, 2019
    Publication date: September 16, 2021
    Inventors: TOMOHIRO MATSUMOTO, YUSUKE OIKE, AKITO SEKIYA, HIROYUKI YAMAGISHI, RYOJI IKEGAYA
  • Publication number: 20210271452
    Abstract: A product-sum arithmetic device (10) includes a comparison unit (18) comparing voltage generated with charge stored in a storage unit (14) with a threshold, and outputting an output signal at a timing when the voltage exceeds the threshold, and a timing extension unit (20) extending an interval between timings at each of which the output signal is output.
    Type: Application
    Filed: July 4, 2019
    Publication date: September 2, 2021
    Inventor: HIROYUKI YAMAGISHI
  • Patent number: 11097375
    Abstract: A laser processing apparatus 10 includes a continuous-wave laser oscillator 12 for generating a continuous-wave laser beam, a condenser lens 18 for concentrating a continuous-wave laser beam onto a workpiece, and a delay time setting means for calculating an energy value for each processing by a continuous-wave laser beam irradiation on the basis of processing data and accumulating the calculated energy value, and setting a predetermined delay time between the processings when the accumulated energy value exceeds a predetermined threshold.
    Type: Grant
    Filed: March 16, 2018
    Date of Patent: August 24, 2021
    Assignee: FUJIKURA LTD.
    Inventors: Hiroyuki Yamagishi, Toshitaka Namba
  • Publication number: 20210240944
    Abstract: A multiply-accumulate device (10) includes: a comparison unit (18) that compares, with a threshold voltage, a voltage generated by an electric charge stored in a storage unit (14), and outputs an output signal at timing at which the voltage exceeds the threshold voltage; and a control circuit (110) that reduces, based on a predetermined set value, a charging current to the storage unit (14) from a plurality of input units (13) connected to the storage unit (14).
    Type: Application
    Filed: July 5, 2019
    Publication date: August 5, 2021
    Inventors: Yasushi Fujinami, Hiroyuki Yamagishi
  • Publication number: 20210191691
    Abstract: A multiply-accumulate system (1) includes: a statistic calculation unit (111) that executes a standardization calculation for an input signal; and a multiply-accumulate device (10) that executes multiplication-accumulation based on the standardized input signal.
    Type: Application
    Filed: July 4, 2019
    Publication date: June 24, 2021
    Inventors: Yasushi Fujinami, Hiroyuki Yamagishi
  • Patent number: 10971744
    Abstract: Provided is a method for inspecting a current leak of a fuel cell, which is provided with an anode electrode, a cathode electrode, and an electrolyte membrane sandwiched between the anode electrode and the cathode electrode, the method including: a first process in which a first voltage, which is a limit voltage of the electrolyte membrane, is applied to the fuel cell; a second process in which a second voltage, which is lower than the first voltage, is applied to the fuel cell after the first process; a third process in which a third voltage, which is lower than the second voltage, is applied to the fuel cell after the second process; and a determination process in which a value of a current flowing through the fuel cell in the third process is detected, and whether the detected current value is lower than a prescribed current value is determined.
    Type: Grant
    Filed: February 28, 2019
    Date of Patent: April 6, 2021
    Assignee: HONDA MOTOR CO., LTD.
    Inventors: Masaaki Kishimoto, Hiroyuki Yamagishi, Hiroshi Sakai
  • Patent number: 10814434
    Abstract: A joint structure comprising a light-absorbable member having at least one opening portion and a light-permeable member superposed on the light-absorbable member so as to cover the opening portion, wherein an annular weld part is formed so as to enclose the opening portion and join the light-absorbable member and the light-permeable member, and an area ratio of a portion at the side of the light-absorbable member to a portion at the side of the light-permeable member side is in a range of 12-35 viewing a section perpendicular to the extending direction of the annular weld part.
    Type: Grant
    Filed: September 29, 2017
    Date of Patent: October 27, 2020
    Assignee: FUJIKURA LTD.
    Inventor: Hiroyuki Yamagishi