Patents by Inventor Hisanori Ihara

Hisanori Ihara has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20090008686
    Abstract: A transfer gate is formed such that both end portions thereof in a second direction, which crosses a first direction in which a photodiode and a floating diffusion layer that is formed with a distance from the photodiode are arranged, are located inside boundaries with element isolation regions. Channel stopper layers are formed on surface portions of a device region in the vicinity of lower parts of both end portions of the transfer gate in the second direction in such a manner to extend to the boundaries with the element isolation regions.
    Type: Application
    Filed: July 2, 2008
    Publication date: January 8, 2009
    Inventors: Motohiro MAEDA, Hisanori Ihara, Hirofumi Yamashita, Fumiaki Sano, Makoto Monoi, Takanori Yagami
  • Patent number: 7385270
    Abstract: A solid-state imaging device achieving a global shutter of images and its manufacturing method are disclosed. According to one aspect of the present invention, it is provided a solid-state imaging device comprising an optical signal storage region provided in a semiconductor substrate, a signal detecting region provided in the semiconductor substrate apart from the optical signal storage region, a transistor electrically connecting the optical signal storage region with the signal detecting region, a wiring connected with the signal detecting region, and a light shielding film provided in close proximity to the signal detecting region and over the signal detecting region.
    Type: Grant
    Filed: December 19, 2005
    Date of Patent: June 10, 2008
    Assignee: Kabushiki Kaisha Toshiba
    Inventor: Hisanori Ihara
  • Publication number: 20080012088
    Abstract: An n/p?/p+ substrate where a p?-type epitaxial layer and an n-type epitaxial layer have been deposited on a p+-type substrate is provided. In the surface region of the n-type epitaxial layer, the n-type region of a photoelectric conversion part has been formed. Furthermore, a barrier layer composed of a p-type semiconductor region has been formed so as to enclose the n-type region of the photoelectric conversion part in a plane and reach the p?-type epitaxial layer from the substrate surface. A p-type semiconductor region has also been formed at a chip cutting part for dividing the substrate into individual devices so as to reach the p?-type epitaxial layer from the substrate surface.
    Type: Application
    Filed: July 12, 2007
    Publication date: January 17, 2008
    Inventors: Tetsuya YAMAGUCHI, Hiroshige Goto, Hirofumi Yamashita, Ikuko Inoue, Nagataka Tanaka, Hisanori Ihara
  • Patent number: 7259412
    Abstract: A solid state imaging device includes a substrate of a first conductivity type. A transistor, which includes a first gate electrode and a first and second impurity areas, is provided on a surface of the substrate. The first and second impurity areas are formed in the surface of the substrate and sandwich a region under the first gate electrode. A third impurity area of a second conductivity type is formed in the surface of the substrate and spaced from the second impurity area at an opposite side to the first gate electrode. A fourth impurity area is formed under the second impurity area and connected to the third impurity area. A second gate electrode is provided above the substrate. A fifth impurity area of the second conductivity type is formed in the surface of the substrate. The third and fifth impurity areas sandwich a region under the second gate electrode.
    Type: Grant
    Filed: April 1, 2005
    Date of Patent: August 21, 2007
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Tetsuya Yamaguchi, Hiroshige Goto, Masayuki Ayabe, Hisanori Ihara
  • Publication number: 20070153108
    Abstract: There is disclosed a solid-state image sensor having an image region including a plurality of unit cells arrayed in a matrix on a semiconductor substrate, in which each of the unit cells includes a photodiode provided in the semiconductor substrate, which converts an input light signal into a signal charge and stores the signal charge, a MOS type read transistor provided adjacent to the photodiode in a surface layer of the semiconductor substrate, which transfers the signal charge stored in the photodiode to a signal charge detecting portion, and an amplifying transistor which amplifies the signal charge transferred to the signal charge detecting portion to output a voltage signal, wherein the signal charge detecting portion comprises an ion implantation region formed in a part of a surface layer of a semiconductor region on a drain side of the MOS type read transistor.
    Type: Application
    Filed: January 3, 2007
    Publication date: July 5, 2007
    Inventor: Hisanori IHARA
  • Patent number: 7224003
    Abstract: The present invention provides a solid-state image pickup apparatus which is able to easily discharge signal charges in a signal accumulating section and which is free from reduction in the dynamic range of the element, thermal noise in a dark state, an image-lag and so forth even if the pixel size of the MOS solid-state image pickup apparatus is reduced, the voltage of a reading gate is lowered and the concentration in the well is raised. The solid-state image pickup apparatus according to the present invention incorporates a p-type silicon substrate having a surface on which a p+ diffusion layer for constituting a photoelectric conversion region and a drain of a reading MOS field effect transistor are formed. A signal accumulating section formed by an n-type diffusion layer is formed below the p+ diffusion layer. A gate electrode of the MOS field effect transistor is, on the surface of the substrate, formed between the p+ diffusion layer and the drain.
    Type: Grant
    Filed: March 24, 2006
    Date of Patent: May 29, 2007
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Nobuo Nakamura, Hisanori Ihara, Ikuko Inoue, Hidenori Shibata, Akiko Nomachi, Yoshiyuki Shioyama, Hidetoshi Nozaki, Masako Hori, Akira Makabe, Hiroshi Naruse, Hideki Inokuma, Seigo Abe, Hirofumi Yamashita, Tetsuya Yamaguchi
  • Publication number: 20070108487
    Abstract: A solid-state image pickup device includes a semiconductor substrate including a substrate main body having P-type impurities and a first N-type semiconductor layer provided on the substrate main body, an image pickup area including a plurality of photoelectric converters in which the plurality of photoelectric converters include second N-type semiconductor layers, the second N-type semiconductor layers being provided on a surface portion of the first N-type semiconductor layer independently of one another, and a first peripheral circuit area including a first P-type semiconductor layer formed on the first N-type semiconductor layer. The solid-state image pickup device further includes a second peripheral circuit area including a second P-type semiconductor layer formed on the first N-type semiconductor layer and connected to the substrate main body.
    Type: Application
    Filed: November 9, 2006
    Publication date: May 17, 2007
    Inventors: Ikuko Inoue, Hiroshige Goto, Hirofumi Yamashita, Hisanori Ihara, Nagataka Tanaka, Tetsuya Yamaguchi
  • Patent number: 7176507
    Abstract: A solid state image sensing device comprises a first semiconductor region of first conductivity type, a second semiconductor region of second conductivity type provided in the first semiconductor region, a third semiconductor region of second conductivity type provided in the first semiconductor region with a space from the second semiconductor region, a gate electrode provided on the first semiconductor region between the second semiconductor region and the third semiconductor region, a gate insulator layer interposed between the first semiconductor region and the gate electrode, and a fourth semiconductor region of second conductivity type provided below the second semiconductor region in the first semiconductor region.
    Type: Grant
    Filed: January 5, 2005
    Date of Patent: February 13, 2007
    Assignee: Kabushiki Kaisha Toshiba
    Inventor: Hisanori Ihara
  • Publication number: 20060219867
    Abstract: A solid-state image pickup device comprising a semiconductor substrate which comprises a substrate body containing P-type impurities and a first N-type semiconductor layer containing N-type impurities, the first N-type semiconductor layer being provided on the substrate body, and including a first P-type semiconductor layer which contains p-type impurities, and which is located on the substrate body, a plurality of optical/electrical conversion portions formed of second N-type semiconductor layers which are provided independently of each other in respective positions in a surface portion of the first N-type semiconductor layer, and a plurality of second P-type semiconductor layers which are formed to surround the optical/electrical conversion portions, which are provided along element isolation regions provided in respective positions in the surface portion of the first N-type semiconductor layer, and which continuously extend from the surface portion of the first N-type semiconductor layer to a surface porti
    Type: Application
    Filed: March 30, 2006
    Publication date: October 5, 2006
    Inventors: Tetsuya Yamaguchi, Hiroshige Goto, Hirofumi Yamashita, Hisanori Ihara, Ikuko Inoue, Nagataka Tanaka
  • Publication number: 20060202235
    Abstract: A solid-state imaging apparatus includes a semiconductor substrate, a photoelectric converter which is formed in a surface region of the semiconductor substrate and converts light into signal charges, and reading electrodes which read out the signal charges and supply the signal charges to a signal sensor. At least some of the reading electrodes are arranged adjacent to the circumference of an image-forming region with a fixed distance between the circumference and the center of the photoelectric converter.
    Type: Application
    Filed: March 8, 2006
    Publication date: September 14, 2006
    Inventor: Hisanori Ihara
  • Publication number: 20060163684
    Abstract: The present invention provides a solid-state image pickup apparatus which is able to easily discharge signal charges in a signal accumulating section and which is free from reduction in the dynamic range of the element, thermal noise in a dark state, an image-lag and so forth even if the pixel size of the MOS solid-state image pickup apparatus is reduced, the voltage of a reading gate is lowered and the concentration in the well is raised. The solid-state image pickup apparatus according to the present invention incorporates a p-type silicon substrate having a surface on which a p+ diffusion layer for constituting a photoelectric conversion region and a drain of a reading MOS field effect transistor are formed. A signal accumulating section formed by an n-type diffusion layer is formed below the p+ diffusion layer. A gate electrode of the MOS field effect transistor is, on the surface of the substrate, formed between the p+ diffusion layer and the drain.
    Type: Application
    Filed: March 24, 2006
    Publication date: July 27, 2006
    Inventors: Nobuo Nakamura, Hisanori Ihara, Ikuko Inoue, Hidenori Shibata, Akiko Nomachi, Yoshiyuki Shioyama, Hidetoshi Nozaki, Masako Hori, Akira Makabe, Hiroshi Naruse, Hideki Inokuma, Seigo Abe, Hirofumi Yamashita, Tetsuya Yamaguchi
  • Publication number: 20060132632
    Abstract: A solid-state imaging device achieving a global shutter of images and its manufacturing method are disclosed. According to one aspect of the present invention, it is provided a solid-state imaging device comprising an optical signal storage region provided in a semiconductor substrate, a signal detecting region provided in the semiconductor substrate apart from the optical signal storage region, a transistor electrically connecting the optical signal storage region with the signal detecting region, a wiring connected with the signal detecting region, and a light shielding film provided in close proximity to the signal detecting region and over the signal detecting region.
    Type: Application
    Filed: December 19, 2005
    Publication date: June 22, 2006
    Inventor: Hisanori Ihara
  • Patent number: 7042061
    Abstract: The present invention provides a solid-state image pickup apparatus which is able to easily discharge signal charges in a signal accumulating section and which is free from reduction in the dynamic range of the element, thermal noise in a dark state, an image-lag and so forth even if the pixel size of the MOS solid-state image pickup apparatus is reduced, the voltage of a reading gate is lowered and the concentration in the well is raised. The solid-state image pickup apparatus according to the present invention incorporates a p-type silicon substrate having a surface on which a p+ diffusion layer for constituting a photoelectric conversion region and a drain of a reading MOS field effect transistor are formed. A signal accumulating section formed by an n-type diffusion layer is formed below the p+ diffusion layer. A gate electrode of the MOS field effect transistor is, on the surface of the substrate, formed between the p+ diffusion layer and the drain.
    Type: Grant
    Filed: December 5, 2003
    Date of Patent: May 9, 2006
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Nobuo Nakamura, Hisanori Ihara, Ikuko Inoue, Hidenori Shibata, Akiko Nomachi, Yoshiyuki Shioyama, Hidetoshi Nozaki, Masako Hori, Akira Makabe, Hiroshi Naruse, Hideki Inokuma, Seigo Abe, Hirofumi Yamashita, Tetsuya Yamaguchi
  • Publication number: 20060082669
    Abstract: Each of the unit cells provided on a semiconductor substrate of a solid-state imaging device comprises a first p-type well which isolates the semiconductor substrate into an n-type photoelectric conversion region, a second p-type well which is formed in the surface of the photoelectric conversion region and in which a signal scanning circuit section is formed, and a signal storage section which is comprised of a highly doped n-type layer which is formed in the surface of the photoelectric conversion region apart from the second p-type well and higher in impurity concentration than the photoelectric conversion region. The signal storage section having its part placed under a signal readout gate adapted to transfer a packet of signal charge from the storage section to the signal scanning circuit section and its part at which the potential becomes deepest located under the readout gate.
    Type: Application
    Filed: October 18, 2005
    Publication date: April 20, 2006
    Inventors: Ikuko Inoue, Hirofumi Yamashita, Nagataka Tanaka, Hisanori Ihara, Tetsuya Yamaguchi, Hiroshige Goto
  • Publication number: 20060046369
    Abstract: A solid-state image sensor having a well of a first conductivity type; a photoelectric conversion region having a second conductivity type formed in the well storing charges obtained from a photoelectric conversion; a drain region having the second conductivity type formed in the well apart from a surface of the well; and a gate electrode formed on the surface of the well via a gate insulator, the gate electrode transferring the charges from the photoelectric conversion region to the drain region.
    Type: Application
    Filed: August 25, 2005
    Publication date: March 2, 2006
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventors: Hisanori Ihara, Nagataka Tanaka, Hiroshige Goto
  • Publication number: 20050242385
    Abstract: A solid state imaging device includes a substrate of a first conductivity type. A transistor, which includes a first gate electrode and a first and second impurity areas, is provided on a surface of the substrate. The first and second impurity areas are formed in the surface of the substrate and sandwich a region under the first gate electrode. A third impurity area of a second conductivity type is formed in the surface of the substrate and spaced from the second impurity area at an opposite side to the first gate electrode. A fourth impurity area is formed under the second impurity area and connected to the third impurity area. A second gate electrode is provided above the substrate. A fifth impurity area of the second conductivity type is formed in the surface of the substrate. The third and fifth impurity areas sandwich a region under the second gate electrode.
    Type: Application
    Filed: April 1, 2005
    Publication date: November 3, 2005
    Inventors: Tetsuya Yamaguchi, Hiroshige Goto, Masayuki Ayabe, Hisanori Ihara
  • Publication number: 20050173742
    Abstract: A solid state image sensing device comprises a first semiconductor region of first conductivity type, a second semiconductor region of second conductivity type provided in the first semiconductor region, a third semiconductor region of second conductivity type provided in the first semiconductor region with a space from the second semiconductor region, a gate electrode provided on the first semiconductor region between the second semiconductor region and the third semiconductor region, a gate insulator layer interposed between the first semiconductor region and the gate electrode, and a fourth semiconductor region of second conductivity type provided below the second semiconductor region in the first semiconductor region.
    Type: Application
    Filed: January 5, 2005
    Publication date: August 11, 2005
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventor: Hisanori Ihara
  • Publication number: 20040108502
    Abstract: The present invention provides a solid-state image pickup apparatus which is able to easily discharge signal charges in a signal accumulating section and which is free from reduction in the dynamic range of the element, thermal noise in a dark state, an image-lag and so forth even if the pixel size of the MOS solid-state image pickup apparatus is reduced, the voltage of a reading gate is lowered and the concentration in the well is raised. The solid-state image pickup apparatus according to the present invention incorporates a p-type silicon substrate having a surface on which a p+ diffusion layer for constituting a photoelectric conversion region and a drain of a reading MOS field effect transistor are formed. A signal accumulating section formed by an n-type diffusion layer is formed below the p+ diffusion layer. A gate electrode of the MOS field effect transistor is, on the surface of the substrate, formed between the p+ diffusion layer and the drain.
    Type: Application
    Filed: December 5, 2003
    Publication date: June 10, 2004
    Inventors: Nobuo Nakamura, Hisanori Ihara, Ikuko Inoue, Hidenori Shibata, Akiko Nomachi, Yoshiyuki Shioyama, Hidetoshi Nozaki, Masako Hori, Akira Makabe, Hiroshi Naruse, Hideki Inokuma, Seigo Abe, Hirofumi Yamashita, Tetsuya Yamaguchi
  • Patent number: 6690423
    Abstract: The present invention provides a solid-state image pickup apparatus which is able to easily discharge signal charges in a signal accumulating section and which is free from reduction in the dynamic range of the element, thermal noise in a dark state, an image-lag and so forth even if the pixel size of the MOS solid-state image pickup apparatus is reduced, the voltage of a reading gate is lowered and the concentration in the well is raised. The solid-state image pickup apparatus according to the present invention incorporates a p-type silicon substrate having a surface on which a p+ diffusion layer for constituting a photoelectric conversion region and a drain of a reading MOS field effect transistor are formed. A signal accumulating section formed by an n-type diffusion layer is formed below the p+ diffusion layer. A gate electrode of the MOS field effect transistor is, on the surface of the substrate, formed between the p+ diffusion layer and the drain.
    Type: Grant
    Filed: March 19, 1999
    Date of Patent: February 10, 2004
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Nobuo Nakamura, Hisanori Ihara, Ikuko Inoue, Hidenori Shibata, Akiko Nomachi, Yoshiyuki Shioyama, Hidetoshi Nozaki, Masako Hori, Akira Makabe, Hiroshi Naruse, Hideki Inokuma, Seigo Abe, Hirofumi Yamashita, Tetsuya Yamaguchi
  • Patent number: 6674470
    Abstract: A solid state imaging device comprises a plurality of unit cells formed in a surface region of a semiconductor substrate. Each of the unit cells comprises a photoelectric converter, an MOS-type read-out transistor for reading a signal from the photoelectric converter, an MOS-type amplifying transistor having a gate connected to a drain of the read-out transistor and for amplifying the signal read by the read-out transistor, a reset transistor having a source connected to the drain of the read-out transistor and for resetting a potential of a gate of the amplifying transistor, and an addressing element connected in series to the amplifying transistor and for selecting the unit cell. The read-out transistor is formed in a first device region in the semiconductor substrate. The reset transistor is formed in a second device region in the semiconductor substrate.
    Type: Grant
    Filed: September 19, 1997
    Date of Patent: January 6, 2004
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Nagataka Tanaka, Eiji Oba, Keiji Mabuchi, Michio Sasaki, Ryohei Miyagawa, Hirofumi Yamashita, Yoshinori Iida, Hisanori Ihara, Tetsuya Yamaguchi