Patents by Inventor Hisao Hayashi

Hisao Hayashi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9943878
    Abstract: A coating method for forming a laminated coating film including a lower layer formed on a base material and an upper layer formed on the lower layer including: preparing a thermosetting coating material as a lower layer-coating material and preparing a thermosetting coating material as an upper layer-coating material; forming an uncured laminated coating film by applying the lower layer-coating material and the upper layer-coating material on the base material using a wet-on-wet technique; and simultaneously curing the lower layer-coating material and the upper layer-coating material by baking the uncured laminated coating film. In the preparation step, the lower layer-coating material and the upper layer-coating material are selected so that an absolute value of a difference in shrinkage ratio between the lower layer and the upper layer coating materials is 2.0% or smaller at a late stage of the baking step.
    Type: Grant
    Filed: December 12, 2014
    Date of Patent: April 17, 2018
    Assignee: TOYOTA JIDOSHA KABUSHIKI KAISHA
    Inventors: Shuji Yomo, Kazuyuki Tachi, Hisao Hayashi
  • Patent number: 9931669
    Abstract: A coating method for forming a laminated coating film including: preparing a thermosetting coating material as a lower layer-coating material, an intermediate layer-coating material, and as an upper layer-coating material; forming an uncured laminated coating film by applying the lower layer-coating, the intermediate layer-coating, and the upper layer-coating materials on the base material using a wet-on-wet technique; and simultaneously curing the lower layer-coating, the intermediate layer-coating, and upper layer-coating materials by baking the uncured laminated coating film.
    Type: Grant
    Filed: December 12, 2014
    Date of Patent: April 3, 2018
    Assignee: TOYOTA JIDOSHA KABUSHIKI KAISHA
    Inventors: Shuji Yomo, Kazuyuki Tachi, Hisao Hayashi
  • Publication number: 20170036244
    Abstract: A coating method for forming a laminated coating film including: preparing a thermosetting coating material as a lower layer-coating material, an intermediate layer-coating material, and as an upper layer-coating material; forming an uncured laminated coating film by applying the lower layer-coating, the intermediate layer-coating, and the upper layer-coating materials on the base material using a wet-on-wet technique; and simultaneously curing the lower layer-coating, the intermediate layer-coating, and upper layer-coating materials by baking the uncured laminated coating film.
    Type: Application
    Filed: December 12, 2014
    Publication date: February 9, 2017
    Applicant: TOYOTA JIDOSHA KABUSHIKI KAISHA
    Inventors: Shuji YOMO, Kazuyuki TACHI, Hisao HAYASHI
  • Publication number: 20170036240
    Abstract: A coating method for forming a laminated coating film including a lower layer formed on a base material and an upper layer formed on the lower layer including: preparing a thermosetting coating material as a lower layer-coating material and preparing a thermosetting coating material as an upper layer-coating material; forming an uncured laminated coating film by applying the lower layer-coating material and the upper layer-coating material on the base material using a wet-on-wet technique; and simultaneously curing the lower layer-coating material and the upper layer-coating material by baking the uncured laminated coating film. In the preparation step, the lower layer-coating material and the upper layer-coating material are selected so that an absolute value of a difference in shrinkage ratio between the lower layer and the upper layer coating materials is 2.0% or smaller at a late stage of the baking step.
    Type: Application
    Filed: December 12, 2014
    Publication date: February 9, 2017
    Applicant: TOYOTA JIDOSHA KABUSHIKI KAISHA
    Inventors: Shuji YOMO, Kazuyuki TACHI, Hisao HAYASHI
  • Patent number: 8779417
    Abstract: A thin film semiconductor device formed as integrated circuits on an insulating substrate with bottom gate type thin film transistors stacked with gate electrodes, a gate insulating film and a semiconductor thin film in the order from below upward. The gate electrodes comprise metallic materials with thickness less than 100 nm. The gate insulating film has a thickness thicker than the gate electrodes. The semiconductor thin film comprises polycrystalline silicon crystallized by a laser beam. By reducing thickness of metallic gate electrodes, thermal capacity becomes small and difference in thermal condition on the metallic gate electrodes and on the insulating substrate made of glass or the like becomes small. This invention relates to the task of uniforming and optimizing recrystallization by a laser anneal treatment provided for the semiconductor thin film which works as an active layer of the bottom gate type thin film transistors.
    Type: Grant
    Filed: October 28, 2013
    Date of Patent: July 15, 2014
    Assignee: Sony Corporation
    Inventors: Hisao Hayashi, Masahiro Fujino, Yasushi Shimogaichi, Makoto Takatoku
  • Publication number: 20140048814
    Abstract: A thin film semiconductor device formed as integrated circuits on an insulating substrate with bottom gate type thin film transistors stacked with gate electrodes, a gate insulating film and a semiconductor thin film in the order from below upward. The gate electrodes comprise metallic materials with thickness less than 100 nm. The gate insulating film has a thickness thicker than the gate electrodes. The semiconductor thin film comprises polycrystalline silicon crystallized by a laser beam. By reducing thickness of metallic gate electrodes, thermal capacity becomes small and difference in thermal condition on the metallic gate electrodes and on the insulating substrate made of glass or the like becomes small. This invention relates to the task of uniforming and optimizing recrystallization by a laser anneal treatment provided for the semiconductor thin film which works as an active layer of the bottom gate type thin film transistors.
    Type: Application
    Filed: October 28, 2013
    Publication date: February 20, 2014
    Applicant: SONY CORPORATION
    Inventors: Hisao Hayashi, Masahiro Fujino, Yasushi Shimogaichi, Makoto Takatoku
  • Patent number: 8604483
    Abstract: A thin film semiconductor device formed as integrated circuits on an insulating substrate with bottom gate type thin film transistors stacked with gate electrodes, a gate insulating film and a semiconductor thin film in the order from below upward. The gate electrodes comprise metallic materials with thickness less than 100 nm. The gate insulating film has a thickness thicker than the gate electrodes. The semiconductor thin film comprises polycrystalline silicon crystallized by a laser beam. By reducing thickness of metallic gate electrodes, thermal capacity becomes small and difference in thermal condition on the metallic gate electrodes and on the insulating substrate made of glass or the like becomes small. This invention relates to the task of uniforming and optimizing recrystallization by a laser anneal treatment provided for the semiconductor thin film which works as an active layer of the bottom gate type thin film transistors.
    Type: Grant
    Filed: June 25, 2010
    Date of Patent: December 10, 2013
    Assignee: Sony Corporation
    Inventors: Hisao Hayashi, Masahiro Fujino, Yasushi Shimogaichi, Makoto Takatoku
  • Patent number: 8558981
    Abstract: Disclosed herein is a display device including a pair of substrates opposed to each other, a pixel region provided between the substrates, and an external wiring provided on an extension of one of the substrates. The external wiring is disposed in a recess formed on the extension. With this structure, the external wiring provided on the extension can be reliably protected to thereby improve the reliability of the display device.
    Type: Grant
    Filed: June 30, 2008
    Date of Patent: October 15, 2013
    Assignee: Japan Display West, Inc.
    Inventors: Hisao Hayashi, Shigetaka Toriyama
  • Patent number: 8546200
    Abstract: A thin film semiconductor device formed as integrated circuits on an insulating substrate with bottom gate type thin film transistors stacked with gate electrodes, a gate insulating film and a semiconductor thin film in the order from below upward. The gate electrodes comprise metallic materials with thickness less than 100 nm. The gate insulating film has a thickness thicker than the gate electrodes. The semiconductor thin film comprises polycrystalline silicon crystallized by a laser beam. By reducing thickness of metallic gate electrodes, thermal capacity becomes small and difference in thermal condition on the metallic gate electrodes and on the insulating substrate made of glass or the like becomes small. This invention relates to the task of uniforming and optimizing recrystallization by a laser anneal treatment provided for the semiconductor thin film which works as an active layer of the bottom gate type thin film transistors.
    Type: Grant
    Filed: October 18, 2012
    Date of Patent: October 1, 2013
    Assignee: Sony Corporation
    Inventors: Hisao Hayashi, Masahiro Fujino, Yasushi Shimogaichi, Makoto Takatoku
  • Publication number: 20100264422
    Abstract: A thin film semiconductor device formed as integrated circuits on an insulating substrate with bottom gate type thin film transistors stacked with gate electrodes, a gate insulating film and a semiconductor thin film in the order from below upward. The gate electrodes comprise metallic materials with thickness less than 100 nm. The gate insulating film has a thickness thicker than the gate electrodes. The semiconductor thin film comprises polycrystalline silicon crystallized by a laser beam. By reducing thickness of metallic gate electrodes, thermal capacity becomes small and difference in thermal condition on the metallic gate electrodes and on the insulating substrate made of glass or the like becomes small. This invention relates to the task of uniforming and optimizing recrystallization by a laser anneal treatment provided for the semiconductor thin film which works as an active layer of the bottom gate type thin film transistors.
    Type: Application
    Filed: June 25, 2010
    Publication date: October 21, 2010
    Applicant: Sony Corporation
    Inventors: Hisao Hayashi, Masahiro Fujino, Yasushi Shimogaichi, Makoto Takatoku
  • Publication number: 20080273156
    Abstract: Disclosed herein is a display device including a pair of substrates opposed to each other, a pixel region provided between the substrates, and an external wiring provided on an extension of one of the substrates. The external wiring is disposed in a recess formed on the extension. With this structure, the external wiring provided on the extension can be reliably protected to thereby improve the reliability of the display device.
    Type: Application
    Filed: June 30, 2008
    Publication date: November 6, 2008
    Applicant: Sony Corporation
    Inventors: Hisao Hayashi, Shigetaka Toriyama
  • Patent number: 7394514
    Abstract: Disclosed herein is a display device including a pair of substrates opposed to each other, a pixel region provided between the substrates, and an external wiring provided on an extension of one of the substrates. The external wiring is disposed in a recess formed on the extension. With this structure, the external wiring provided on the extension can be reliably protected to thereby improve the reliability of the display device.
    Type: Grant
    Filed: April 11, 2005
    Date of Patent: July 1, 2008
    Assignee: Sony Corproation
    Inventors: Hisao Hayashi, Shigetaka Toriyama
  • Patent number: 7209251
    Abstract: A management server transfers initial registration information to a registered information memory section of a document input/output apparatus. Upon completion of initial registration, the management server notifies by electronic mail the user's personal computer of the completion of registration, and displays from a www server a handling method and a method of software installation. The management server notifies by electronic mail the user's personal computer of replacement timing of expendables or any hardware trouble.
    Type: Grant
    Filed: October 23, 2001
    Date of Patent: April 24, 2007
    Assignee: NEC Corporation
    Inventor: Hisao Hayashi
  • Patent number: 7006133
    Abstract: A compact image input apparatus is operable under low power consumption, while omitting a buffer memory for storing image data, which is originally required to transfer image data between this image input apparatus and a personal computer.
    Type: Grant
    Filed: March 19, 1999
    Date of Patent: February 28, 2006
    Assignee: NEC Corporation
    Inventor: Hisao Hayashi
  • Patent number: 6952021
    Abstract: A bottom-gate thin-film transistor includes a gate electrode, a gate insulating film, an active layer, and a protective insulating film deposited in that order on a substrate. The protective insulating film has a thickness of 100 nm or less, and the protective insulating film is formed on any one of the active layer, and LDD region, and a source-drain region. A method for making a bottom-gate thin-film transistor, a liquid crystal display device including a TFT substrate using the bottom-gate thin-film transistor and a method for fabricating the same, and an organic EL device including the bottom-gate thin-film transistor and a method for fabricating the same are also disclosed.
    Type: Grant
    Filed: January 18, 2002
    Date of Patent: October 4, 2005
    Assignee: Sony Corporation
    Inventors: Tsutomu Tanaka, Masahiro Fujino, Hisao Hayashi
  • Patent number: 6943369
    Abstract: Substrates suitable to manufacture and products of a thin film semiconductor device are provided, by at first preparing a manufacturing substrate having a characteristic capable of enduring a process for forming a thin film transistor and a product substrate having a characteristic of being suitable to direct mounting of the thin film transistor in a preparatory step, then applying a bonding step to bond the manufacturing substrate to the product substrate for supporting the product substrate at the back, successively applying a formation step to form at least a thin film transistor to the surface of the product substrate in a state reinforced with the manufacturing substrate and, finally, applying a separation step to separate the manufacturing substrate after use from the product substrate.
    Type: Grant
    Filed: March 16, 2001
    Date of Patent: September 13, 2005
    Assignee: Sony Corporation
    Inventor: Hisao Hayashi
  • Patent number: 6933180
    Abstract: A bottom-gate thin-film transistor includes a gate electrode, a gate insulating film, an active layer, and a protective insulating film deposited in that order on a substrate. The protective insulating film has a thickness of 100 nm or less, and the protective insulating film is formed on any one of the active layer, and LDD region, and a source-drain region. A method for making a bottom-gate thin-film transistor, a liquid crystal display device including a TFT substrate using the bottom-gate thin-film transistor and a method for fabricating the same, and an organic EL device including the bottom-gate thin-film transistor and a method for fabricating the same are also disclosed.
    Type: Grant
    Filed: April 6, 2001
    Date of Patent: August 23, 2005
    Assignee: Sony Corporation
    Inventors: Tsutomu Tanaka, Masahiro Fujino, Hisao Hayashi
  • Publication number: 20050179851
    Abstract: Disclosed herein is a display device including a pair of substrates opposed to each other, a pixel region provided between the substrates, and an external wiring provided on an extension of one of the substrates. The external wiring is disposed in a recess formed on the extension. With this structure, the external wiring provided on the extension can be reliably protected to thereby improve the reliability of the display device.
    Type: Application
    Filed: April 11, 2005
    Publication date: August 18, 2005
    Inventors: Hisao Hayashi, Shigetaka Toriyama
  • Patent number: 6906830
    Abstract: The image scanner 101 comprises a manuscript conveying unit 102 having conveying rolls 115, 116 for conveying a manuscript 111 and a first light source 114, and a manuscript reading unit 103 mounted on the manuscript conveying unit 102. The manuscript reading unit 103 detects movement of the manuscript 111 in the sub-scanning direction 118 by a rotation detecting roll 122 driven by the conveying roll 115. When the manuscript 111 is a reflection-type one, only a second light source 124 is switched ON to read the manuscript 111. When the manuscript 111 is a transmission-type one, only the first light source 114 is switched ON to read the manuscript 111. The image scanner 101 does not have a fixed platen. One-dimensional CCD 131 is fixed. The image scanner 101 can therefore be small in size.
    Type: Grant
    Filed: January 27, 2000
    Date of Patent: June 14, 2005
    Assignee: NEC Corporation
    Inventor: Hisao Hayashi
  • Patent number: 6879368
    Abstract: Disclosed herein is a display device including a pair of substrates opposed to each other, a pixel region provided between the substrates, and an external wiring provided on an extension of one of the substrates. The external wiring is disposed in a recess formed on the extension. With this structure, the external wiring provided on the extension can be reliably protected to thereby improve the reliability of the display device.
    Type: Grant
    Filed: May 30, 2003
    Date of Patent: April 12, 2005
    Assignee: Sony Corporation
    Inventors: Hisao Hayashi, Shigetaka Toriyama