Patents by Inventor Hisashi Nakamura

Hisashi Nakamura has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20050261590
    Abstract: An ultrasonic probe includes ultrasonic piezoelectric elements that are arranged in a first direction at predetermined intervals and transmit and receive ultrasonic waves in a second direction substantially orthogonal to the first direction. The respective ultrasonic piezoelectric elements have plural grooves, which are parallel to the first direction and do not pierce through an end face, on at least one end face of two end faces substantially orthogonal to the second direction of the respective ultrasonic piezoelectric elements. The ultrasonic waves are weighted in a third direction orthogonal to the first direction and the second direction according to shapes and arrangement of the respective plural grooves and transmitted and received. In addition, a conductive member is joined to the end face having the grooves of the respective ultrasonic piezoelectric elements along the third direction.
    Type: Application
    Filed: April 12, 2005
    Publication date: November 24, 2005
    Inventors: Takashi Ogawa, Takashi Takeuchi, Koichi Shibamoto, Hisashi Nakamura, Hiroyuki Shikata, Taihei Sato
  • Patent number: 6907098
    Abstract: A Gray code counter includes a holding circuit, first and second conversin circuit and an operation circuit. The holding circuit stores gray code signals and outputs the stored gray code signals in response to a clock signal. The first conversion circuit receives the gray code signals from the holding circuit and converts the received gray code signals into first binary code signals. The operation circuit applies a logical operation to the first binary code signals so as to generate second binary code signals. The second conversion circuit receives the second binary code signals and converts the received second binary code signals into the gray code signals. The second conversion circuit outputs the gray code signals to the holding circuit.
    Type: Grant
    Filed: October 31, 2002
    Date of Patent: June 14, 2005
    Assignee: Oki Electric Industry Co., Ltd.
    Inventor: Hisashi Nakamura
  • Publication number: 20040119945
    Abstract: Disclosed is a liquid crystal projector comprising operation means for operating a liquid crystal projector; means for previously registering a password; means for entering, in a case where the password is registered, a password when the power to the liquid crystal projector is turned on; and means for comparing the entered password with the registered password and making it possible to operate the liquid crystal projector by the operation means only when both the passwords coincide with each other.
    Type: Application
    Filed: August 20, 2003
    Publication date: June 24, 2004
    Inventors: Hisashi Nakamura, Tomohiko Fujii
  • Patent number: 6727900
    Abstract: In a frame buffer memory including a DRAM (11), an SRAM (12) functioning as a cache memory, and a comparison unit (17) comparing depth data stored in the SRAM (12) and depth data input from an external source and writing depth data input from the external source directly to the SRAM (12) when depth data input from the external source represents a shallower point on a screen, a maxZ detection circuit (27) detecting depth data representing a deepest point among depth data of eight pixels stored in each memory block (18) of SRAM (12) is provided. The detection circuit (27) does not compare depth data of each pixel as comparison unit (17) but detects depth data representing a deepest point among depth data of eight pixels, whereby a Z buffering process is sped up.
    Type: Grant
    Filed: May 5, 2000
    Date of Patent: April 27, 2004
    Assignee: Renesas Technology Corp.
    Inventor: Hisashi Nakamura
  • Patent number: 6698898
    Abstract: In a display device comprising a suction fan for cooling and an air filter arranged on the suction side of the suction fan for cooling, there are provided means for calculating, in a case where the suction fan for cooling is driven, the integrated value of time periods during which the suction fan for cooling is driven, and means for displaying a warning message for causing a user to clean the air filter when the integrated value of the time periods during which the suction fan for cooling is driven is not less than a predetermined value.
    Type: Grant
    Filed: November 14, 2002
    Date of Patent: March 2, 2004
    Assignee: Sanyo Electric Co., Ltd.
    Inventors: Kouji Terami, Toshiyuki Okino, Hisashi Nakamura
  • Patent number: 6694084
    Abstract: A unit for handling the remainder of optical cables includes a cable supporting section and a connector for interface arranged at a central section of the cable supporting section. The cable supporting section includes a first area for holding previously the remainder of an optical cable during in-plant fabrication of the unit and a second area for holding the remainder of the other optical cable connecting through the connector to an end of the one optical cable held on the first area during field installation of optical cables. The connector is arranged at a boundary between the first and second areas.
    Type: Grant
    Filed: February 22, 2002
    Date of Patent: February 17, 2004
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventor: Hisashi Nakamura
  • Publication number: 20030179848
    Abstract: A Gray code counter includes a holding circuit, first and second conversin circuit and an operation circuit. The holding circuit stores gray code signals and outputs the stored gray code signals in response to a clock signal. The first conversion circuit receives the gray code signals from the holding circuit and converts the received gray code signals into first binary code signals. The operation circuit applies a logical operation to the first binary code signals so as to generate second binary code signals. The second conversion circuit receives the second binary code signals and converts the received second binary code signals into the gray code signals. The second conversion circuit outputs the gray code signals to the holding circuit.
    Type: Application
    Filed: October 31, 2002
    Publication date: September 25, 2003
    Inventor: Hisashi Nakamura
  • Publication number: 20030095237
    Abstract: In a display device comprising a suction fan for cooling and an air filter arranged on the suction side of the suction fan for cooling, there are provided means for calculating, in a case where the suction fan for cooling is driven, the integrated value of time periods during which the suction fan for cooling is driven, and means for displaying a warning message for causing a user to clean the air filter when the integrated value of the time periods during which the suction fan for cooling is driven is not less than a predetermined value.
    Type: Application
    Filed: November 14, 2002
    Publication date: May 22, 2003
    Inventors: Kouji Terami, Toshiyuki Okino, Hisashi Nakamura
  • Publication number: 20020118160
    Abstract: A liquid crystal projector provided with a cooling fan comprises a temperature sensor for detecting the internal temperature of the liquid crystal projector, an air pressure sensor for detecting outside air pressure, and a control device for controlling the number of revolutions of the cooling fan on the basis of the temperature detected by the temperature sensor and the outside air pressure detected by the air pressure sensor.
    Type: Application
    Filed: February 14, 2002
    Publication date: August 29, 2002
    Inventors: Hisashi Nakamura, Kouji Terami, Toshiyuki Okino
  • Patent number: 6225702
    Abstract: A semiconductor device manufactured as a ball grid array, chip scale package, or other surface mounting package wherein shorting between a power supply terminal and a ground terminal can be prevented. At least one solder ball functioning as a signal electrode is disposed between a solder ball functioning as a power supply electrode and a solder ball functioning as a ground electrode on the mounting surface of the package.
    Type: Grant
    Filed: February 4, 1998
    Date of Patent: May 1, 2001
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventor: Hisashi Nakamura
  • Patent number: 6054759
    Abstract: A semiconductor chip is die-bonded on a tape. A plurality of electrodes for power supply for supplying power are formed at an upper surface of the semiconductor chip, and a plurality of electrodes for signal communication for communicating signals are formed at a lower surface of the semiconductor chip. The semiconductor chip, the tape and the like are sealed within a package. A power supply wiring formed external to the package is connected to an electrode for power supply. Thus, a semiconductor device is obtained which efficiently releases the heat generated at the semiconductor chip and contemplates increasing the number of electrodes for signal communication.
    Type: Grant
    Filed: June 5, 1998
    Date of Patent: April 25, 2000
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventor: Hisashi Nakamura
  • Patent number: 5997387
    Abstract: A grinding wheel is for use in a grinding machine, and is attached on a wheel spindle of the grinding machine for simultaneously grinding at least two parts of a workpiece. The grinding wheel includes at least two wheel cores. Each of wheel cores has a disk-like shape. An abrasive layer is disposed on a circumferential surface of each of the wheel cores. A spacer portion is inseparably fixed on at least one of the wheel cores for keeping a space between the abrasive layers of the wheel cores. And a first labyrinth portion located on one of side surfaces of one of the wheel cores for forming a labyrinth seal with a second labyrinth portion arranged on the grinding machine. The number of separable parts of the grinding wheel are extremely decreased in consideration of imbalance of every part. The spacer portion is integral with at least one of the wheel cores.
    Type: Grant
    Filed: February 4, 1998
    Date of Patent: December 7, 1999
    Assignee: Toyoda Koki Kabushiki Kaisha
    Inventors: Tomoyasu Imai, Ryouhei Mukai, Hideki Nagano, Koji Nishi, Hisashi Nakamura, Masahiro Ido, Yutaka Hayashi, Eiji Fukuta, Satoshi Yamaguchi
  • Patent number: 5917211
    Abstract: A semiconductor integrated circuit comprising first n-channel MISFETs constituting the memory cells of a storage system, second n-channel MISFETs constituting the peripheral circuits of the storage system, and third n-channel MISFETs constituting the output circuit among the peripheral circuits. The respective threshold voltages of the first n-channel MISFETs, the second n-channel MISFETs and the third n-channel MISFETs are decreased in that order when the respective gate lengths of those MISFETs are substantially the same.
    Type: Grant
    Filed: November 25, 1997
    Date of Patent: June 29, 1999
    Assignee: Hitachi, Ltd.
    Inventors: Jun Murata, Yoshitaka Tadaki, Hiroko Kaneko, Toshihiro Sekiguchi, Hiroyuki Uchiyama, Hisashi Nakamura, Toshio Maeda, Osamu Kasahara, Hiromichi Enami, Atsushi Ogishima, Masaki Nagao, Michimasa Funabashi, Yasuo Kiguchi, Masayuki Kojima, Atsuyoshi Koike, Hiroyuki Miyazawa, Masato Sadaoka, Kazuya Kadota, Tadashi Chikahara, Kazuo Nojiri, Yutaka Kobayashi
  • Patent number: 5805513
    Abstract: A semiconductor memory device is provided which includes a substrate arrangement which is suitable for forming a large number of types of DRAMs having different package specifications, different bit structure and different operating modes. In conjunction with this, the bonding pads are arranged at optimum locations for accommodating the different package types. Various layout arrangements are also provided to minimize space and to improve access time. Additional features are provided, including improved output buffer circuitry, protection circuitry and testing methods to facilitate operation of the semiconductor memory device.
    Type: Grant
    Filed: May 2, 1995
    Date of Patent: September 8, 1998
    Assignees: Hitachi, Ltd., Hitachi VLSI Engineering Corp.
    Inventors: Yasushi Takahashi, Hidetoshi Iwai, Satoshi Oguchi, Hisashi Nakamura, Hiroyuki Uchiyama, Toshitugu Takekuma, Shigetoshi Sakomura, Kazuyuki Miyazawa, Masamichi Ishihara, Ryoichi Hori, Takeshi Kizaki, Yoshihisa Koyama, Haruo Ii, Masaya Muranaka, Hidetomo Aoyagi, Hiromi Matsuura
  • Patent number: 5746584
    Abstract: In an inner cam type injection pump, the side surface of the protruding portion of each of the plungers facing the compression space is formed in a projecting shape in the area where the plunger changes from the base end side into the front end. Specific forms of the projection include a structure constituted with slanted surfaces over a plurality of stages with different inclinations relative to the axis of the plunger, an arc form and a structure provided with a overhanging portion formed on the side surface of the protruding portion, which does not overhang the base end, projecting out from the side surface. This will prevent collision at the shoulder portion of the plunger and, consequently, prevent the deformation at the shoulder portion and ensures that plungers will not have sliding failures or become seized. Even when plungers collide, the sliding of the plungers will not be affected, ensuring that plungers do not have sliding failures or become seized.
    Type: Grant
    Filed: March 6, 1996
    Date of Patent: May 5, 1998
    Assignee: Zexel Corporation
    Inventors: Hisashi Nakamura, Kenichi Kubo, Jun Matsubara, Kazuaki Narikiyo, Hajime Machida, Noriyuki Abe, Tsunayoshi Motoyoshi, Atsushi Ueda
  • Patent number: 5734188
    Abstract: A semiconductor integrated circuit comprising first n-channel MISFETs constituting the memory cells of a storage system, second n-channel MISFETs constituting the peripheral circuits of the storage system, and third n-channel MISFETs constituting the output circuit among the peripheral circuits. The respective threshold voltages of the first n-channel MISFETs, the second n-channel MISFETs and the third n-channel MISFETs are decreased in that order when the respective gate lengths of those MISFETs are substantially the same.
    Type: Grant
    Filed: July 1, 1996
    Date of Patent: March 31, 1998
    Assignee: Hitachi, Ltd.
    Inventors: Jun Murata, Yoshitaka Tadaki, Hiroko Kaneko, Toshihiro Sekiguchi, Hiroyuki Uchiyama, Hisashi Nakamura, Toshio Maeda, Osamu Kasahara, Hiromichi Enami, Atsushi Ogishima, Masaki Nagao, Michimasa Funabashi, Yasuo Kiguchi, Masayuki Kojima, Atsuyoshi Koike, Hiroyuki Miyazawa, Masato Sadaoka, Kazuya Kadota, Tadashi Chikahara, Kazuo Nojiri, Yutaka Kobayashi
  • Patent number: 5673422
    Abstract: A frame buffer memory includes a main memory of a DRAM, a cache memory of a SRAM, a first transfer bus for transferring data of 256 bits, for example, between the main memory and the cache memory, a pixel processing unit for carrying out a predetermined operational process according to data provided from the cache memory and externally applied data, a compare unit for comparing the data provided from the cache memory with externally applied data, a transfer bus for transferring data from the cache memory to the pixel processing unit and the compare unit, a transfer bus for transferring resultant data from the pixel processing unit to the cache memory, and a serial access memory for storing data read out from the main memory and providing the stored data serially to an outside world. According to the structure, an .alpha.-blend process, a raster operation, a Z compare process and the like required for graphics can be carried out at high speed with flexibility.
    Type: Grant
    Filed: January 23, 1995
    Date of Patent: September 30, 1997
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventors: Hiroyuki Kawai, Yoshitsugu Inoue, Hisashi Nakamura
  • Patent number: 5662116
    Abstract: A multi-plane electronic scan ultrasound probe having a rotary member rotatably mounted on a distal end portion of an elongated catheter member of the probe and support thereon an ultrasound transducer consisting of a row of a large number of ultrasound elements. The rotary member is connected to a rotation control knob on a manipulating head of the probe by way of rotation transmission wires extended through the catheter member and via a drive pulley mounted on the manipulating head in association with the rotation control knob to turn the ultrasound transducer through an arbitrary angle in multi-plane electronic scanning by manipulation of the rotation control knob.
    Type: Grant
    Filed: September 11, 1996
    Date of Patent: September 2, 1997
    Assignees: Fuji Photo Optical Co., Ltd., Kabushiki Kaisha Toshiba
    Inventors: Mituo Kondo, Kenji Abe, Hisashi Nakamura, Yasutaka Nagai
  • Patent number: 5513965
    Abstract: In an innercam system fuel injection pump, plungers 15 are provided in the direction of the radius of a rotating member 10 which rotates in synchronization with the engine. A cam ring 18, which regulates the movement of the plungers, is fixed in a housing 2. A first sleeve 25 for regulating the timing with which a cutoff port 22 opens and a second sleeve 26 for regulating the timing with which an intake port 21 opens are externally fitted on the rotating member 10 in such a manner that they can slide freely. The first sleeve 25 and the second sleeve 26 interlock with each other in a specific relationship and a timer mechanism 40, which is directly linked to the second sleeve 26, controls the quantity of rotation of the second sleeve 26. With this, stable injection timing control can be achieved.
    Type: Grant
    Filed: May 18, 1995
    Date of Patent: May 7, 1996
    Assignee: Zexel Corporation
    Inventors: Hisashi Nakamura, Kenichi Kubo, Jun Matsubara
  • Patent number: 5469852
    Abstract: An ultrasound diagnostic apparatus and a probe therefor for a body cavity of a patient are disclosed. The probe comprises a transducer which rotates to obtain sectional ultrasound images along various angles. The apparatus comprises a means for indicating the rotation angle of the transducer. A mark for indicating the angle is provided on a surface of the transducer. The rotation angle is detected electrically to be displayed on a CRT screen. For more precise detection, slack removers for removing slacks of rotation wires are provided. A rotation angle indicator for indicating the rotation angle of a rotation knob which represents the rotation angle of the transducer is provided on the operation portion.
    Type: Grant
    Filed: March 11, 1994
    Date of Patent: November 28, 1995
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Hisashi Nakamura, Yasutaka Nagai, Susumu Hiki