Abstract: According to one embodiment, a semiconductor device includes first to third regions, and first to third electrodes. The first region includes a first partial region, a second partial region, and a third partial region between the first and second partial regions. A direction from the first partial region toward the first electrode is aligned with a first direction. A second direction from the first electrode toward the second electrode crosses the first direction. A direction from the third partial region toward the third electrode is aligned with the first direction. A position of the third electrode is between a position of the first electrode and a position of the second electrode in the second direction. At least a portion of the second region is provided between the first and second electrodes. At least a portion of the third region is provided between the first and second regions.

Abstract: According to one embodiment, a semiconductor device includes a first electrode, a second electrode, a first semiconductor layer, and a second semiconductor layer. The second electrode is separated from the first electrode in a first direction. The first semiconductor layer includes n-type SiC, is provided between the first electrode and the second electrode, and is electrically connected to the first electrode. The second semiconductor layer contacts the first semiconductor layer and the second electrode, is provided between the first semiconductor layer and the second electrode, and includes n-type AlxGa1-xN (0.5?x?1). A thickness of the second semiconductor layer is not less than 10 nm and not more than 1 ?m.

Abstract: According to one embodiment, a semiconductor device includes a first electrode, a second electrode, a third electrode, a semiconductor member, and a first crystal member. A direction from the first electrode toward the second electrode is aligned with a first direction. A position in the first direction of the third electrode is between positions in the first direction of the first electrode and the second electrode. The semiconductor member includes at least one selected from the group consisting of silicon carbide, silicon, carbon, and germanium. The semiconductor member includes a first region, and first and second partial regions. The first region is between the first and second electrodes in the first direction. A second direction from the first region toward the third electrode crosses the first direction. The first crystal member is provided between the first and third electrodes in the second direction.

Abstract: According to one embodiment, a semiconductor device includes first to third electrodes, and first and second layers. A direction from the first electrode toward the second electrode is aligned with a first direction. A position in the first direction of the third electrode is between positions in the first direction of the first and second electrodes. The first layer includes at least one selected from the group consisting of silicon carbide, silicon, carbon, and germanium. The first layer includes first to sixth partial regions. A concentration of the first impurity in the fourth partial region is higher than a concentration of the first impurity in the fifth partial region and higher than a concentration of the first impurity in the sixth partial region. The second layer includes AlxGa1-xN (0<x1). The second layer includes a first portion and a second portion.

Abstract: According to one embodiment, a power generation element includes a first conductive layer, a second conductive layer, a first member provided between the first conductive layer and the second conductive layer, and a second member separated from the first member and provided between the first member and the second conductive layer. The first member includes a first region including Alx1Ga1-x1N (0?x1<1), and a second region including Alx2Ga1-x2N (x1<x2?1) and being provided between the first region and the second member. A <000-1> direction of the first member has a component in an orientation from the first conductive layer toward the second conductive layer.

Abstract: According to one embodiment, a semiconductor device includes first to third regions, and first to third electrodes. The first region includes a first partial region, a second partial region, and a third partial region between the first and second partial regions. A direction from the first partial region toward the first electrode is aligned with a first direction. A direction from the second partial region toward the second electrode is aligned with the first direction. A second direction from the first electrode toward the second electrode crosses the first direction. A direction from the third partial region toward the third electrode is aligned with the first direction. At least a portion of the third region is provided between the first and second electrodes in the second direction. At least a portion of the second region is provided between the third and first regions.

Abstract: According to one embodiment, a semiconductor device includes first to third regions, and first to third electrodes. The first region includes a first partial region, a second partial region, and a third partial region between the first and second partial regions. A direction from the first partial region toward the first electrode is aligned with a first direction. A second direction from the first electrode toward the second electrode crosses the first direction. A direction from the third partial region toward the third electrode is aligned with the first direction. A position of the third electrode is between a position of the first electrode and a position of the second electrode in the second direction. At least a portion of the second region is provided between the first and second electrodes. At least a portion of the third region is provided between the first and second regions.

Abstract: According to one embodiment, a semiconductor device includes a first electrode, a second electrode, a first semiconductor layer, and a second semiconductor layer. The second electrode is separated from the first electrode in a first direction. The first semiconductor layer includes n-type SiC, is provided between the first electrode and the second electrode, and is electrically connected to the first electrode. The second semiconductor layer contacts the first semiconductor layer and the second electrode, is provided between the first semiconductor layer and the second electrode, and includes n-type AlxGa1-xN (0.5?x?1). A thickness of the second semiconductor layer is not less than 10 nm and not more than 1 ?m.

Abstract: According to one embodiment, a semiconductor substrate includes a first semiconductor layer including Alx1Ga1-x1N (0<x1?1) and including carbon and oxygen, and a second semiconductor layer including Alx2Ga1-x2N (0<x2<x1) and including carbon and oxygen. A second ratio of a carbon concentration of the second semiconductor layer to an oxygen concentration of the second semiconductor layer is 730 or more.

Abstract: In order to respond flexibly to various processing modes, such as forming curved surface shapes, when cutting a workpiece using a wire saw, this wire saw device (1) is provided with: a single robot arm (2) that is capable of moving freely by means of multi-axis control; a wire saw unit (3) that is detachably connected to the robot arm (2) via a tool changer (7); a wire (8) that spans a plurality of pulleys supported within the wire saw unit (3); and a workpiece cutting zone (20) that is established between the pulleys. The workpiece is cut to a prescribed shape by moving the robot arm (2) in a preset direction while running the wire (8) of the wire saw unit (3) and pressing the wire (8) against the supported workpiece.

Abstract: According to one embodiment, a semiconductor wafer includes a substrate, an AlN buffer layer, a foundation layer, a first high Ga composition layer, a high Al composition layer, a low Al composition layer, an intermediate unit and a second high Ga composition layer. The first layer is provided on the foundation layer. The high Al composition layer is provided on the first layer. The low Al composition layer is provided on the high Al composition layer. The intermediate unit is provided on the low Al composition layer. The second layer is provided on the intermediate unit. The first layer has a first tensile strain and the second layer has a second tensile strain larger than the first tensile strain. Alternatively, the first layer has a first compressive strain and the second layer has a second compressive strain smaller than the first compressive strain.

Abstract: According to one embodiment, a semiconductor wafer includes a substrate, an AlN buffer layer, a foundation layer, a first high Ga composition layer, a high Al composition layer, a low Al composition layer, an intermediate unit and a second high Ga composition layer. The first layer is provided on the foundation layer. The high Al composition layer is provided on the first layer. The low Al composition layer is provided on the high Al composition layer. The intermediate unit is provided on the low Al composition layer. The second layer is provided on the intermediate unit. The first layer has a first tensile strain and the second layer has a second tensile strain larger than the first tensile strain. Alternatively, the first layer has a first compressive strain and the second layer has a second compressive strain smaller than the first compressive strain.

Abstract: According to one embodiment, a nitride semiconductor element includes: a stacked body; and a functional layer. The stacked body includes a first GaN layer, a first layer, and a second GaN layer. The first GaN layer includes a first protrusion. The first layer is provided on the first GaN layer and contains at least one of Si and Mg. The second GaN layer is provided on the first layer and includes a second protrusion. Length of bottom of the second protrusion is shorter than length of bottom of the first protrusion. A functional layer is provided on the stacked body and includes a nitride semiconductor.

Abstract: According to one embodiment, a nitride semiconductor device includes a stacked body and a functional layer. The stacked body includes an AlGaN layer of AlxGa1-xN (0<x?1), a first Si-containing layer, a first GaN layer, a second Si-containing layer, and a second GaN layer. The first Si-containing layer contacts an upper surface of the AlGaN layer. The first Si-containing layer contains Si at a concentration not less than 7×1019/cm3 and not more than 4×1020/cm3. The first GaN layer is provided on the first Si-containing layer. The first GaN layer includes a protrusion having an oblique surface tilted with respect to the upper surface. The second Si-containing layer is provided on the first GaN layer. The second Si-containing layer contains Si. The second GaN layer is provided on the second Si-containing layer. The functional layer is provided on the stacked body. The functional layer includes a nitride semiconductor.

Abstract: According to one embodiment, a nitride semiconductor element includes a p-type semiconductor layer and a p-side electrode. The p-type semiconductor layer includes a nitride semiconductor, and has a first surface. The p-side electrode contacts the first surface. The first surface is a semi-polar plane. The first surface includes a plurality of protrusions. A height of the protrusions along a first direction is not less than 1 nanometer and not more than 5 nanometers. The first direction is from the p-type semiconductor layer toward the p-side electrode. A density of the protrusions in the first surface is more than 1.0×1010/cm2 and not more than 6.1×1010/cm2.

Abstract: According to one embodiment, a nitride semiconductor element includes a foundation layer, a functional layer and a stacked body. The stacked body is provided between the foundation layer and the functional layer. The stacked body includes a first stacked intermediate layer including a first GaN intermediate layer, a first high Al composition layer of Alx1Ga1-x1N (0<x1?1) and a first low Al composition layer. A compressive strain is applied to the first low Al composition layer. Unstrained GaN has a first lattice spacing. The Alx1Ga1-x1N (0<x1?1) when unstrained has a second lattice spacing. The first high Al composition layer has a third lattice spacing. An Al composition ratio of the first low Al composition layer is not more than a ratio of a difference between the first and third lattice spacings to a difference between the first and second lattice spacings.

Abstract: Provided is a light-emitting device having good binning characteristics with suppressed changes in color derived from shifts in excitation wavelength. The present invention achieves the above object by way of a light-emitting device that comprises a blue semiconductor light-emitting element, and a wavelength conversion member, wherein the wavelength conversion member comprises: a phosphor Y represented by formula (Y1) below and having a peak wavelength of 540 nm or more and 570 nm or less in an emission wavelength spectrum when excited at 450 nm, (Y,Ce,Tb,Lu)x(Ga,Sc,Al)yOz??(Y1) (x=3, 4.5?y?5.5, 10.8?z?13.4); and a phosphor G represented by formula (G1) below and having a peak wavelength of 520 nm or more and 540 nm or less in an emission wavelength spectrum when excited at 450 nm. (Y,Ce,Tb,Lu)x(Ga,Sc,Al)yOz??(G1) (x=3, 4.5?y?5.5, 10.8?z?13.