Patents by Inventor Hisashi Yoshida

Hisashi Yoshida has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20150166888
    Abstract: Provided is a light-emitting device having good binning characteristics with suppressed changes in color derived from shifts in excitation wavelength. The present invention achieves the above object by way of a light-emitting device that comprises a blue semiconductor light-emitting element, and a wavelength conversion member, wherein the wavelength conversion member comprises: a phosphor Y represented by formula (Y1) below and having a peak wavelength of 540 nm or more and 570 nm or less in an emission wavelength spectrum when excited at 450 nm, (Y,Ce,Tb,Lu)x(Ga,Sc,Al)yOz??(Y1) (x=3, 4.5?y?5.5, 10.85?z?13.4); and a phosphor G represented by formula (G1) below and having a peak wavelength of 520 nm or more and 540 nm or less in an emission wavelength spectrum when excited at 450 nm. (Y,Ce,Tb,Lu)x(Ga,Sc,Al)yOz??(G1) (x=3, 4.5?y?5.5, 10.8?z?13.
    Type: Application
    Filed: January 12, 2015
    Publication date: June 18, 2015
    Applicants: MITSUBISHI CHEMICAL CORPORATION, MITSUBISHI ENGINEERING-PLASTICS CORPORATION
    Inventors: Tadahiro Katsumoto, Minoru Soma, Tomoyuki Kurushima, Hisashi Yoshida
  • Patent number: 9054036
    Abstract: According to one embodiment, a nitride semiconductor device includes a stacked body and a functional layer. The stacked body includes an AlGaN layer of AlxGa1-xN (0<x?1), a first Si-containing layer, a first GaN layer, a second Si-containing layer, and a second GaN layer. The first Si-containing layer contacts an upper surface of the AlGaN layer. The first Si-containing layer contains Si at a concentration not less than 7×1019/cm3 and not more than 4×1020/cm3. The first GaN layer is provided on the first Si-containing layer. The first GaN layer includes a protrusion having an oblique surface tilted with respect to the upper surface. The second Si-containing layer is provided on the first GaN layer. The second Si-containing layer contains Si. The second GaN layer is provided on the second Si-containing layer. The functional layer is provided on the stacked body. The functional layer includes a nitride semiconductor.
    Type: Grant
    Filed: February 28, 2013
    Date of Patent: June 9, 2015
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Toshiki Hikosaka, Yoshiyuki Harada, Hisashi Yoshida, Naoharu Sugiyama, Shinya Nunoue
  • Patent number: 9053931
    Abstract: According to one embodiment, a nitride semiconductor wafer includes: a silicon substrate; a buffer section provided on the silicon substrate; and a functional layer provided on the buffer section and contains nitride semiconductor. The buffer section includes first to n-th buffer layers (n being an integer of 4 or more) containing nitride semiconductor. An i-th buffer layer (i being an integer of 1 or more and less than n) of the first to n-th buffer layers has a lattice length Wi in a first direction parallel to a major surface of the first buffer layer. An (i+1)-th buffer layer provided on the i-th buffer layer has a lattice length W(i+1) in the first direction. In the first to n-th buffer layers the i-th buffer layer and the (i+1)-th buffer layer satisfy relation of (W(i+1)?Wi)/Wi?0.008.
    Type: Grant
    Filed: September 25, 2012
    Date of Patent: June 9, 2015
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Hisashi Yoshida, Toshiki Hikosaka, Yoshiyuki Harada, Naoharu Sugiyama, Shinya Nunoue
  • Publication number: 20150008391
    Abstract: In general, according to one embodiment, a semiconductor light emitting element includes: a first semiconductor layer; a second semiconductor layer; a light emitting layer. The light emitting layer includes a well layer with a thickness of t1 (nanometers). The well layer includes InxGa1-xN having an In composition ratio x higher than 0 and lower than 1. The first semiconductor layer has a tensile strain of not less than 0.02 percent and not more than 0.25 percent in a plane perpendicular to a stacking direction. A peak wavelength ?p (nanometers) of light satisfies a relationship of ?p=a1+a2×(x+(t1?3.0)×a3). The a1 is not less than 359 and not more than 363. The a2 is not less than 534 and not more than 550. The a3 is not less than 0.0205 and not more than 0.0235.
    Type: Application
    Filed: July 3, 2014
    Publication date: January 8, 2015
    Applicant: Kabushiki Kaisha Toshiba
    Inventors: Naoharu SUGIYAMA, Shigeya KIMURA, Hisashi YOSHIDA, Toshiki HIKOSAKA, Jumpei TAJIMA, Hajime NAGO, Shinya NUNOUE
  • Publication number: 20150001547
    Abstract: According to one embodiment, a nitride semiconductor element includes: a stacked body; and a functional layer. The stacked body includes a first GaN layer, a first layer, and a second GaN layer. The first GaN layer includes a first protrusion. The first layer is provided on the first GaN layer and contains at least one of Si and Mg. The second GaN layer is provided on the first layer and includes a second protrusion. Length of bottom of the second protrusion is shorter than length of bottom of the first protrusion. A functional layer is provided on the stacked body and includes a nitride semiconductor.
    Type: Application
    Filed: June 24, 2014
    Publication date: January 1, 2015
    Applicant: Kabushiki Kaisha Toshiba
    Inventors: Toshiki HIKOSAKA, Hisashi Yoshida, Hajime Nago, Naoharu Sugiyama, Shinya Nunoue
  • Patent number: 8897862
    Abstract: A non-transitory computer-readable recording medium storing a computer program, the computer program comprising: a selecting module configured to select, from among a plurality of biopotential signals, a biopotential signal containing a high proportion of a maternal cardiac potential signal component; an independent component analysis module configured to perform independent component analysis on the plurality of biopotential signals; a periodic signal detection module configured to detect, as a first peak time signal, a signal having periodic peaks from a biopotential signal and to detect, as second peak time signals, one or more signals having periodic peaks among signals output from the independent component analysis module; and an output signal selecting module configured to select from among the one or more second peak time signals a signal having peak times different from those of the first peak time signal.
    Type: Grant
    Filed: July 25, 2013
    Date of Patent: November 25, 2014
    Assignees: Public University Corporation Nara Medical University, Kinki University
    Inventors: Hiroshi Kobayashi, Toshiyuki Sado, Hisashi Yoshida
  • Patent number: 8872158
    Abstract: According to one embodiment, a semiconductor light emitting device includes an n-type semiconductor layer, a p-type semiconductor layer, and a light emitting part. The n-type semiconductor layer includes a nitride semiconductor. The p-type semiconductor layer includes a nitride semiconductor. The light emitting part is provided between the n-type and the p-type semiconductor layers and includes an n-side barrier layer and a first light emitting layer. The first light emitting layer includes a first barrier layer, a first well layer, and a first AIGaN layer. The first barrier layer is provided between the n-side barrier layer and the p-type semiconductor layer. The first well layer contacts the n-side barrier layer between the n-side and the first barrier layer. The first AIGaN layer is provided between the first well layer and the first barrier layer. A peak wavelength ?p of light emitted from the light emitting part is longer than 515 nanometers.
    Type: Grant
    Filed: February 20, 2014
    Date of Patent: October 28, 2014
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Tomonari Shioda, Hisashi Yoshida, Naoharu Sugiyama, Shinya Nunoue
  • Patent number: 8785943
    Abstract: According to one embodiment, a nitride semiconductor device includes a foundation layer, a first stacked intermediate layer, and a functional layer. The foundation layer includes an AlN buffer layer formed on a substrate. The first stacked intermediate layer is provided on the foundation layer. The first stacked intermediate layer includes a first AlN intermediate layer provided on the foundation layer, a first AlGaN intermediate layer provided on the first AlN intermediate layer, and a first GaN intermediate layer provided on the first AlGaN intermediate layer. The functional layer is provided on the first stacked intermediate layer. The first AlGaN intermediate layer includes a first step layer in contact with the first AlN intermediate layer. An Al composition ratio in the first step layer decreases stepwise in a stacking direction from the first AlN intermediate layer toward the first step layer.
    Type: Grant
    Filed: February 28, 2012
    Date of Patent: July 22, 2014
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Tomonari Shioda, Hung Hung, Jongil Hwang, Hisashi Yoshida, Naoharu Sugiyama, Shinya Nunoue
  • Patent number: 8772800
    Abstract: According to one embodiment, a semiconductor light-emitting device includes: a first conductivity type first semiconductor layer containing a nitride semiconductor crystal and having a tensile stress in a (0001) surface; a second conductivity type second semiconductor layer containing a nitride semiconductor crystal and having a tensile stress in the (0001) surface; a light emitting layer provided between the first semiconductor layer and the second semiconductor layer, containing a nitride semiconductor crystal, and having an average lattice constant larger than the lattice constant of the first semiconductor layer; and a first stress application layer provided on a side opposite to the light emitting layer of the first semiconductor layer and applying a compressive stress to the first semiconductor layer.
    Type: Grant
    Filed: October 21, 2013
    Date of Patent: July 8, 2014
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Naoharu Sugiyama, Taisuke Sato, Kotaro Zaima, Jumpei Tajima, Toshiki Hikosaka, Yoshiyuki Harada, Hisashi Yoshida, Shinya Nunoue
  • Publication number: 20140183446
    Abstract: According to one embodiment, a semiconductor light emitting device includes an n-type semiconductor layer, a p-type semiconductor layer, and a light emitting layer. The p-type semiconductor layer includes a first p-side layer, a second p-side layer, and a third p-side layer. A concentration profile of Mg of a p-side region includes a first portion, a second portion, a third portion, a fourth portion, a fifth portion, a sixth portion and a seventh portion. The p-side region includes the light emitting layer, the second p-side layer, and the third p-side layer. A Mg concentration of the sixth portion is not less than 1×1020 cm?3 and not more than 3×1020 cm?3. The Al concentration is 1/100 of the maximum value at a second position. A Mg concentration at the second position is not less than 2×1018 cm?3.
    Type: Application
    Filed: December 2, 2013
    Publication date: July 3, 2014
    Applicant: Kabushiki Kaisha Toshiba
    Inventors: Hajime NAGO, Yoshiyuki HARADA, Shigeya KIMURA, Hisashi YOSHIDA, Shinya NUNOUE
  • Publication number: 20140166978
    Abstract: According to one embodiment, a semiconductor light emitting device includes an n-type semiconductor layer, a p-type semiconductor layer, and a light emitting part. The n-type semiconductor layer includes a nitride semiconductor. The p-type semiconductor layer includes a nitride semiconductor. The light emitting part is provided between the n-type and the p-type semiconductor layers and includes an n-side barrier layer and a first light emitting layer. The first light emitting layer includes a first barrier layer, a first well layer, and a first AIGaN layer. The first barrier layer is provided between the n-side barrier layer and the p-type semiconductor layer. The first well layer contacts the n-side barrier layer between the n-side and the first barrier layer. The first AIGaN layer is provided between the first well layer and the first barrier layer. A peak wavelength ?p of light emitted from the light emitting part is longer than 515 nanometers.
    Type: Application
    Filed: February 20, 2014
    Publication date: June 19, 2014
    Applicant: Kabushiki Kaisha Toshiba
    Inventors: Tomonari SHIODA, Hisashi YOSHIDA, Naoharu SUGIYAMA, Shinya NUNOUE
  • Publication number: 20140138699
    Abstract: According to one embodiment, a nitride semiconductor device includes a stacked body and a functional layer. The stacked body includes an AlGaN layer of AlxGa1-xN (0<x?1), a first Si-containing layer, a first GaN layer, a second Si-containing layer, and a second GaN layer. The first Si-containing layer contacts an upper surface of the AlGaN layer. The first Si-containing layer contains Si at a concentration not less than 7×1019/cm3 and not more than 4×1020/cm3. The first GaN layer is provided on the first Si-containing layer. The first GaN layer includes a protrusion having an oblique surface tilted with respect to the upper surface. The second Si-containing layer is provided on the first GaN layer. The second Si-containing layer contains Si. The second GaN layer is provided on the second Si-containing layer. The functional layer is provided on the stacked body. The functional layer includes a nitride semiconductor.
    Type: Application
    Filed: February 28, 2013
    Publication date: May 22, 2014
    Applicant: Kabushiki Kaisha Toshiba
    Inventors: Toshiki HIKOSAKA, Yoshiyuki Harada, Hisashi Yoshida, Naoharu Sugiyama, Shinya Nunoue
  • Publication number: 20140124790
    Abstract: According to one embodiment, a nitride semiconductor element includes a foundation layer, a functional layer and a stacked body. The stacked body is provided between the foundation layer and the functional layer. The stacked body includes a first stacked intermediate layer including a first GaN intermediate layer, a first high Al composition layer of Alx1Ga1-x1N (0<x1?1) and a first low Al composition layer. A compressive strain is applied to the first low Al composition layer. Unstrained GaN has a first lattice spacing. The Alx1Ga1-x1N (0<x1?1) when unstrained has a second lattice spacing. The first high Al composition layer has a third lattice spacing. An Al composition ratio of the first low Al composition layer is not more than a ratio of a difference between the first and third lattice spacings to a difference between the first and second lattice spacings.
    Type: Application
    Filed: January 14, 2014
    Publication date: May 8, 2014
    Applicant: Kabushiki Kaisha Toshiba
    Inventors: Toshiki HIKOSAKA, Yoshiyuki HARADA, Hisashi YOSHIDA, Naoharu SUGIYAMA, Shinya NUNOUE
  • Patent number: 8698123
    Abstract: According to one embodiment, a semiconductor light emitting device includes an n-type semiconductor layer, a p-type semiconductor layer, and a light emitting part. The n-type semiconductor layer includes a nitride semiconductor. The p-type semiconductor layer includes a nitride semiconductor. The light emitting part is provided between the n-type and the p-type semiconductor layers and includes an n-side barrier layer and a first light emitting layer. The first light emitting layer includes a first barrier layer, a first well layer, and a first AlGaN layer. The first barrier layer is provided between the n-side barrier layer and the p-type semiconductor layer. The first well layer contacts the n-side barrier layer between the n-side and the first barrier layer. The first AlGaN layer is provided between the first well layer and the first barrier layer. A peak wavelength ?p of light emitted from the light emitting part is longer than 515 nanometers.
    Type: Grant
    Filed: August 19, 2011
    Date of Patent: April 15, 2014
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Tomonari Shioda, Hisashi Yoshida, Naoharu Sugiyama, Shinya Nunoue
  • Publication number: 20140084338
    Abstract: According to one embodiment, a semiconductor wafer includes a substrate, an AlN buffer layer, a foundation layer, a first high Ga composition layer, a high Al composition layer, a low Al composition layer, an intermediate unit and a second high Ga composition layer. The first layer is provided on the foundation layer. The high Al composition layer is provided on the first layer. The low Al composition layer is provided on the high Al composition layer. The intermediate unit is provided on the low Al composition layer. The second layer is provided on the intermediate unit. The first layer has a first tensile strain and the second layer has a second tensile strain larger than the first tensile strain. Alternatively, the first layer has a first compressive strain and the second layer has a second compressive strain smaller than the first compressive strain.
    Type: Application
    Filed: April 23, 2013
    Publication date: March 27, 2014
    Applicant: Kabushiki Kaisha Toshiba
    Inventors: Yoshiyuki HARADA, Toshiki Hikosaka, Hisashi Yoshida, Hung Hung, Naoharu Sugiyama, Shinya Nunoue
  • Publication number: 20140084296
    Abstract: A nitride semiconductor wafer includes a silicon substrate, a stacked multilayer unit, a silicon-containing unit, and an upper layer unit. The silicon substrate has a major surface. The stacked multilayer unit is provided on the major surface. The stacked multilayer unit includes N number of buffer layers. The buffer layers include an i-th buffer layer, and an (i+1)-th buffer layer provided on the i-th buffer layer. The i-th buffer layer has an i-th lattice length Wi in a first direction parallel to the major surface. The (i+1)-th buffer layer has an (i+1)-th lattice length W(i+1) in the first direction. A relation that (W(i+1)?Wi)/Wi?0.008 is satisfied for all the buffer layers. The silicon-containing unit is provided on the stacked multilayer unit. The upper layer unit is provided on the silicon-containing unit.
    Type: Application
    Filed: December 28, 2012
    Publication date: March 27, 2014
    Inventors: Hisashi YOSHIDA, Toshiki Hikosaka, Yoshiyuki Harada, Naoharu Sugiyama, Shinya Nunoue
  • Patent number: 8680537
    Abstract: According to one embodiment, a nitride semiconductor element includes a foundation layer, a functional layer and a stacked body. The stacked body is provided between the foundation layer and the functional layer. The stacked body includes a first stacked intermediate layer including a first GaN intermediate layer, a first high Al composition layer of Alx1Ga1-x1N (0<x1?1) and a first low Al composition layer. A compressive strain is applied to the first low Al composition layer. Unstrained GaN has a first lattice spacing. The Alx1Ga1-x1N (0<x1?1) when unstrained has a second lattice spacing. The first high Al composition layer has a third lattice spacing. An Al composition ratio of the first low Al composition layer is not more than a ratio of a difference between the first and third lattice spacings to a difference between the first and second lattice spacings.
    Type: Grant
    Filed: September 4, 2012
    Date of Patent: March 25, 2014
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Toshiki Hikosaka, Yoshiyuki Harada, Hisashi Yoshida, Naoharu Sugiyama, Shinya Nunoue
  • Publication number: 20140077239
    Abstract: According to one embodiment, a semiconductor device includes a functional layer of a nitride semiconductor. The functional layer is provided on a nitride semiconductor layer including a first stacked multilayer structure provided on a substrate. The first stacked multilayer structure includes a first lower layer, a first intermediate layer, and a first upper layer. The first lower layer contains Si with a first concentration and has a first thickness. The first intermediate layer is provided on the first lower layer to be in contact with the first lower layer, contains Si with a second concentration lower than the first concentration, and has a second thickness thicker than the first thickness. The first upper layer is provided on the first intermediate layer to be in contact with the first intermediate layer, contains Si with a third concentration lower than the second concentration, and has a third thickness.
    Type: Application
    Filed: February 28, 2013
    Publication date: March 20, 2014
    Applicant: Kabushiki Kaisha Toshiba
    Inventors: Hung HUNG, Naoharu Sugiyama, Hisashi Yoshida, Toshiki Hikosaka, Yoshiyuki Harada, Shinya Nunoue
  • Publication number: 20140061693
    Abstract: According to one embodiment, a nitride semiconductor wafer includes: a silicon substrate; a buffer section provided on the silicon substrate; and a functional layer provided on the buffer section and contains nitride semiconductor. The buffer section includes first to n-th buffer layers (n being an integer of 4 or more) containing nitride semiconductor. An i-th buffer layer (i being an integer of 1 or more and less than n) of the first to n-th buffer layers has a lattice length Wi in a first direction parallel to a major surface of the first buffer layer. An (i+1)-th buffer layer provided on the i-th buffer layer has a lattice length W(i+1) in the first direction. In the first to n-th buffer layers the i-th buffer layer and the (i+1)-th buffer layer satisfy relation of (W(i+1)?Wi)/Wi?0.008.
    Type: Application
    Filed: September 25, 2012
    Publication date: March 6, 2014
    Inventors: Hisashi YOSHIDA, Toshiki Hikosaka, Yoshiyuki Harada, Naoharu Sugiyama, Shinya Nunoue
  • Publication number: 20140048819
    Abstract: According to one embodiment, a semiconductor light-emitting device includes: a first conductivity type first semiconductor layer containing a nitride semiconductor crystal and having a tensile stress in a (0001) surface; a second conductivity type second semiconductor layer containing a nitride semiconductor crystal and having a tensile stress in the (0001) surface; a light emitting layer provided between the first semiconductor layer and the second semiconductor layer, containing a nitride semiconductor crystal, and having an average lattice constant larger than the lattice constant of the first semiconductor layer; and a first stress application layer provided on a side opposite to the light emitting layer of the first semiconductor layer and applying a compressive stress to the first semiconductor layer.
    Type: Application
    Filed: October 21, 2013
    Publication date: February 20, 2014
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventors: Naoharu Sugiyama, Taisuke Sato, Kotaro Zaima, Jumpei Tajima, Toshiki Hikosaka, Yoshiyuki Harada, Hisashi Yoshida, Shinya Nunoue