Abstract: In order to reduce the thickness of an impurity diffusion region of a first conductivity type formed near the surface of a semiconductor substrate, a pocket region is formed under the impurity diffusion region. If the pocket region is large, a junction capacitance between the impurity diffusion region and the pocket region cannot be neglected. In order to reduce the size of the pocket region to the minimum permissible size, gates and dummy gates which are temporarily formed to suppress the non-uniformity of the gate dimensions by uniformly giving an influence of the optical proximity effect to a plurality of gates are used as a mask used for implanting an impurity into the surface portion of the semiconductor substrate to form the pocket regions. Thus, the pocket region can be formed in a limited area between the gate and the dummy gate.

Abstract: A semiconductor device manufactured by isolating an element by forming an insulating film on the surface of a semiconductor substrate at an element isolation region, selectively forming a resist film at a second region on the surface of the semiconductor substrate by photolithography, high speed operation having priority over high integration in the second region, and selectively implanting impurity ions as a channel stopper in a first region by using the resist film as a mask, high integration having priority over high speed operation in the first region.

Abstract: A method of fabricating a semiconductor device forms a resist pattern for a gate electrode or the like on a semiconductor device in such a manner that only a fine resist pattern is formed on a resist member by an electron beam lithography and other resist patterns are formed on the same resist member by an optical lithography.

Abstract: A dielectric film, such as a silicon nitride film, is formed on a p type silicon substrate. An opening is formed in the silicon nitride film. With the silicon nitride film used as a mask, a phosphorns ion is implanted into the surface portion of the substrate in a direction of an angle .theta. (0.degree.<.theta.<90.degree.) to a substrate face. An n.sup.- diffusion layer is formed in the surface portion of the substrate at an edge area of the opening such that the n.sup.- diffusion layer is located beneath a gate electrode corresponding to the opening. A gate oxide film is formed in that opening area and a polysilicon film is formed over the gate oxide film. A gate electrode is formed after the silicon nitride film has been removed. With the gate electrode used as a mask, an impurity ion is implanted into the surface portion of the substrate to provide source and drain regions. The drain region is located contagious to an n.sup.- diffusion layer. The n.sup.