Patents by Inventor Hisayoshi Yamoto

Hisayoshi Yamoto has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20100022097
    Abstract: A vaporizer, a semiconductor production apparatus and process capable of improving the efficiency in the use of a raw material gas noticeably, enabling uniform deposition according to the raw material gas used, diminishing maintenance frequency to improve productivity. At the time of ALD operation, carrier gas continues to be supplied to a reaction chamber 402, while supplying a material solution of predetermined quantity according to a film thickness of one atomic or molecular layer determined by a micro-metering pump 54, intermittently to an evaporation mechanism 20. Thus, a gas shower type heat CVD apparatus 1 enables a thin film of a desired thickness made of one atomic or molecular layer to be formed on a substrate 420 one by one, while avoiding the raw material gas being thrown away by the opening or closing operation of the reaction-chamber side valve 404 and the vent side valve 407.
    Type: Application
    Filed: February 27, 2006
    Publication date: January 28, 2010
    Applicant: Youtec Co., Ltd.
    Inventors: Hisayoshi Yamoto, Yuji Honda, Shinichi Koshimae
  • Publication number: 20080216872
    Abstract: There is obtained an MOCVD oriented vaporizer which eliminates a phenomenon that thin-film materials are adhered to a portion of the vaporizer near and around a spout thereof. A carrier gas/small amount oxidizing gas supply part supplies a carrier gas, which is supplied through an internally formed gas passage and which contains a material solution, to a vaporization part; a bubble prevention/material solution supply part supplies a material for preventing generation of bubbles of the carrier gas containing the material solution, and the material solution, into the carrier gas; a solvent vaporization restricting/cooling system restricts vaporization of a solvent; and a swirl flow preventing gas supply part supplies a gas for preventing occurrence of swirl flows near a gas outlet of the vaporization part.
    Type: Application
    Filed: February 18, 2004
    Publication date: September 11, 2008
    Inventors: Hisayoshi Yamoto, Ryoichi Sakai, Masafumi Shoji, Kazuya Akuto, Ken Nagaoka, Hiroshi Watanuki
  • Publication number: 20070166458
    Abstract: The present invention relates to a vaporizer for CVD, a solution-vaporization type CVD apparatus and a vaporization method for CVD which suppress clogging of a solution pipe or the like and extend continuous operation times. A vaporizer for CVD of the present invention comprises a plurality of raw-material solution pipes which respectively supply a plurality of raw-material solutions separately from one another, a carrier gas pipe disposed in such a manner as to surround the exteriors of the raw-material-solution pipes and allows the pressurized carrier gas to flow to the exterior of each of the plurality of raw-material-solution pipes, an orifice provided in the leading end of the carrier gas pipe, and spaced away from the leading ends of the raw-material-solution pipes, a vaporization tube connected to the leading end of the carrier gas pipe and led to the interior of the carrier gas pipe via the orifice, and a heater which is heating means for heating the vaporization tube.
    Type: Application
    Filed: March 17, 2004
    Publication date: July 19, 2007
    Applicant: YOUTEC CO.,Ltd.
    Inventor: Hisayoshi Yamoto
  • Publication number: 20070166457
    Abstract: It is aimed at providing a vaporization apparatus and a vaporization method capable of keeping track of a progressive condition of clogging of the apparatus. It is also aimed at providing a vaporization apparatus and a vaporization method capable of eliminating clogging prior to occurrence of complete clogging, without disassembling the apparatus. It provides a vaporization apparatus for introducing a carrier gas from one end of a gas passage and for feeding, the carrier gas including a material solution, from the other end of the gas passage to a vaporization part to thereby vaporize the material solution, characterized in that a mass flow controller (MFC) is provided at the one end of the gas passage, and means for detecting a pressure within the gas passage is provided. The vaporization apparatus is characterized in that the same is provided with means for introducing a chemical solution capable of dissolving therein matters deposited or sticked to the inside of the gas passage, into the gas passage.
    Type: Application
    Filed: March 8, 2004
    Publication date: July 19, 2007
    Inventors: Hisayoshi Yamoto, Kazuya Akuto, Ken Nagaoka, Hitoshi Kobayashi, Masafumi Shoji, Mitsuru Fukugawa
  • Publication number: 20060278166
    Abstract: There is provided a vaporizer that can be used for a long period of time without being clogged and can supply a raw material stably to a reaction section.
    Type: Application
    Filed: March 18, 2003
    Publication date: December 14, 2006
    Inventors: Hisayoshi Yamoto, Mitsuru Fukagawa, Masayuki Toda
  • Publication number: 20060270222
    Abstract: It is an object of the present invention to provide a CVD thin film deposition method which can be used for a long time without producing cloggings or the like and can stably supply raw materials to a reaction portion. In the CVD thin film deposition method which forms a predetermined CVD thin film by passing a CVD raw material solution and a gas to a CVD chamber through a vaporizer for an appropriate time, the gas from a vaporizer outlet is switched to an exhaust side and only a solvent which can dissolve attachments adhering to the vaporizer is caused to flow through the vaporizer when the predetermined time passed.
    Type: Application
    Filed: March 18, 2003
    Publication date: November 30, 2006
    Inventor: Hisayoshi Yamoto
  • Patent number: 7098085
    Abstract: A method is disclosed for forming high-quality high-crystallinity polycrystalline or monocrystalline thin semiconductor film. The method is capable of forming such a semiconductor film over a large area at low cost. An apparatus for practicing the method is also disclosed. To form a high-crystallinity large-grain polycrystalline film or monocrystalline thin semiconductor film on a substrate, or to produce a semiconductor device including a high-crystallinity large-grain polycrystalline film or monocrystalline thin semiconductor film disposed on a substrate, a low-crystal-quality thin semiconductor film is first formed on the substrate, and then focused-light annealing is performed on the low-crystal-quality thin semiconductor film thereby melting or semi-melting the low-crystal-quality thin semiconductor film.
    Type: Grant
    Filed: February 14, 2002
    Date of Patent: August 29, 2006
    Assignee: Sony Corporation
    Inventors: Hideo Yamanaka, Hisayoshi Yamoto
  • Patent number: 7095082
    Abstract: Each of an electrooptical device and a driving substrate for the electrooptical device includes a first substrate having a display section provided with pixel electrodes and a peripheral-driving-circuit section provided on the periphery of the display section, a second substrate, and an optical material disposed between the first substrate and the second substrate. A gate section including a gate electrode and a gate-insulating film is formed on one surface of the first substrate, a compound layer having high lattice matching with single-crystal silicon is formed on the surface of the first substrate, and a single-crystal silicon layer is formed on the first substrate including the compound layer and the gate section. The single-crystal silicon layer constitutes a channel region, a source region, and a drain region.
    Type: Grant
    Filed: October 10, 2001
    Date of Patent: August 22, 2006
    Assignee: Sony Corporation
    Inventors: Hideo Yamanaka, Hisayoshi Yamoto, Yuichi Sato, Hajime Yagi
  • Publication number: 20060154480
    Abstract: The vaporizer for CVD of the present invention comprises: the pipes for the plurality of raw-material solutions, each pipe supplying the plurality of raw-material solutions separately from one another; the pipe for the carrier gas provided in a manner covering outwards of the pipes for the raw-material solutions, the pipe 3 allowing the pressurized carrier gas to flow thereinside and the outwards of the pipes for the raw-material solutions; the orifice provided on a leading end of the pipe for the carrier gas, the orifice being spaced away from leading ends of the pipes for the raw-materials solutions; the vaporizing tube connected to the leading end of the pipe for the carrier gas, the vaporizing tube being connected to the inside of the pipe for the carrier gas via the orifice; the cleaning mechanism cleaning at least one among the leading end of the pipe for the carrier gas, the orifice, and the vaporizing tube; and a heating means for heating the vaporizing tube.
    Type: Application
    Filed: May 17, 2004
    Publication date: July 13, 2006
    Inventor: Hisayoshi Yamoto
  • Publication number: 20060070575
    Abstract: The vaporizer of the solution-vaporization type CVD apparatus comprises: the orifice tube dispersing at least one kind of a raw-material solution in a carrier gas in a fine particulate or misty form; at least one path for at least one kind of the raw-material solution, the at least one path supplying at least one kind of the raw-material solution to the orifice tube separately from one another; the path for the carrier gas supplying the carrier gas to the orifice tube separately from the raw-material solution; the vaporizing tube vaporizing at least one kind of the raw-material solution dispersed by the orifice tube; and the orifice connected to the vaporizing tube and the orifice tube, the orifice introducing at least one kind of the raw-material solution dispersed by the orifice tube into the vaporizing member.
    Type: Application
    Filed: March 14, 2005
    Publication date: April 6, 2006
    Inventors: Hisayoshi Yamoto, Shinichi Koshimae
  • Patent number: 6825070
    Abstract: A single crystal silicon is graphoepitaxially grown using a step formed on a substrate as a seed by a catalyst process, and the obtained single crystal silicon layer is used for a dual gate type MOSTFT in an electro-optical apparatus such as a display section of a peripheral driving circuit integration type LCD. A single crystal silicon thin film having high electron/hole mobility is formed into a uniform film at a relatively low temperature, which enables the manufacturing of an active matrix substrate incorporated with a high-performance driver which can be used in a TFT display.
    Type: Grant
    Filed: November 22, 2002
    Date of Patent: November 30, 2004
    Assignee: Sony Corporation
    Inventors: Hideo Yamanaka, Hisayoshi Yamoto, Yuichi Satou, Hajime Yagi
  • Patent number: 6767755
    Abstract: A single-crystal silicon layer is formed by graphoepitaxy from a low-melting-point metal layer which contains dissolved polycrystalline or amorphous silicon, or from a melt of a silicon-containing low-melting-point metal, using step differences formed on a substrate as a seed for the epitaxial growth. This single-crystal silicon layer is used as dual-gate MOSTFTs, or bottom-gate MOSTFTs, of an electrooptical device such as an LCD integrating a display section and a peripheral-driving-circuit section. This process enables production of a uniform single-crystal silicon thin-film having high electron/hole mobility at a relatively low temperature. The display section includes LDD-nMOSTFTs or pMOSTFTs having high switching characteristics and a low leakage current. The peripheral-driving-circuit section includes cMOSTFTs, nMOSTFTs, pMOSTFTs, or a combination thereof, having high driving ability.
    Type: Grant
    Filed: November 20, 2002
    Date of Patent: July 27, 2004
    Assignee: Sony Corporation
    Inventors: Hideo Yamanaka, Hisayoshi Yamoto, Yuuichi Sato, Hajime Yagi
  • Patent number: 6709512
    Abstract: When a polycrystalline or single crystal silicon layer is grown by catalytic CVD, a catalyst having a nitride covering at least its surface is used. In case that tungsten is used as the catalyst, tungsten nitride is formed as the nitride. The nitride is made by heating the surface of the catalyst to a high temperature around 1600 to 2100° C. in an atmosphere containing nitrogen prior to the growth. When the catalyst is heated to the temperature for its use or its nitrification, it is held in a hydrogen atmosphere.
    Type: Grant
    Filed: August 29, 2001
    Date of Patent: March 23, 2004
    Assignee: Sony Corporation
    Inventors: Hisayoshi Yamoto, Hideo Yamanaka
  • Patent number: 6696309
    Abstract: An electrooptical device including a first substrate including a display section having pixel electrodes and a peripheral-driving-circuit section provided on a periphery of the display section, a second substrate, and an optical material disposed between the first substrate and the second substrate is produced as follows. A material layer having a high degree of lattice matching with single-crystal silicon is formed on one face of the first substrate. A polycrystalline or amorphous silicon layer is formed on the first substrate and then a low-melting-point metal layer is formed on or under the silicon layer on the first substrate, or a low-melting-point metal layer containing silicon is formed on the first substrate having the material layer. The silicon layer or the silicon is dissolved into the low-melting-point metal layer by a heat treatment.
    Type: Grant
    Filed: March 2, 2001
    Date of Patent: February 24, 2004
    Inventors: Hideo Yamanaka, Hisayoshi Yamoto, Yuuichi Sato, Hajime Yagi
  • Patent number: 6653212
    Abstract: A thin film forming apparatus S having a vacuum chamber 1, a substrate 10, a thermal catalyst 5, and a heating means 5a for heating this thermal catalyst 5, wherein a gas introduction system 3 for feeding the gas is connected in the vacuum chamber 1, the gas is fed from this gas introduction system 3 to the vacuum chamber 1, and thin films are formed on the surface of the substrate 10 by utilizing a thermal decomposition reaction or catalytic reaction by the thermal catalyst 5, the gas introduction system 3 is for introducing a carrier gas containing hydrogen and a material gas for forming the thin film on the substrate 10, and the carrier gas is constantly fed into the vacuum chamber 1 at least during the formation of the thin film.
    Type: Grant
    Filed: April 9, 2001
    Date of Patent: November 25, 2003
    Assignee: Sony Corporation
    Inventors: Hideo Yamanaka, Hisayoshi Yamoto
  • Patent number: 6645835
    Abstract: A method for forming a semiconductor film capable allowing easy cleaning of the processing equipment and capable of forming an epitaxial film at low temperatures as well as a manufacturing method for semiconductor devices utilizing this forming method is needed for achieving selective crystalline growth on semiconductor film. The forming method comprises a process for forming a mask having an aperture exposing a substrate surface on substrate, and a process for forming a semiconductor film by selective crystalline growth on a semiconductor piece by means of catalytic chemical vapor deposition on a substrate surface exposed by an aperture on a mask; as well as a manufacturing method for semiconductor devices utilizing the semiconductor film forming method.
    Type: Grant
    Filed: March 16, 2000
    Date of Patent: November 11, 2003
    Assignee: Sony Corporation
    Inventors: Hisayoshi Yamoto, Hideo Yamanaka, Hajime Yagi, Yuuichi Sato
  • Publication number: 20030124755
    Abstract: A single-crystal silicon layer is formed by graphoepitaxy from a low-melting-point metal layer which contains dissolved polycrystalline or amorphous silicon, or from a melt of a silicon-containing low-melting-point metal, using step differences formed on a substrate as a seed for the epitaxial growth. This single-crystal silicon layer is used as dual-gate MOSTFTs, or bottom-gate MOSTFTs, of an electrooptical device such as an LCD integrating a display section and a peripheral-driving-circuit section. This process enables production of a uniform single-crystal silicon thin-film having high electron/hole mobility at a relatively low temperature. The display section includes LDD-nMOSTFTs or pMOSTFTs having high switching characteristics and a low leakage current. The peripheral-driving-circuit section includes cMOSTFTs, nMOSTFTs, pMOSTFTs, or a combination thereof, having high driving ability.
    Type: Application
    Filed: November 20, 2002
    Publication date: July 3, 2003
    Inventors: Hideo Yamanaka, Hisayoshi Yamoto, Yuuichi Sato, Hajime Yagi
  • Publication number: 20030071309
    Abstract: Single crystal silicon is graphoepitaxially grown using a step formed on a substrate as a seed by a catalyst PVD process or the like, and the obtained single crystal silicon layer is used for a dual gate type MOSTFT in an electro-optical apparatus such as a display section-peripheral driving circuit integration type LCD.
    Type: Application
    Filed: November 22, 2002
    Publication date: April 17, 2003
    Inventors: Hideo Yamanaka, Hisayoshi Yamoto, Yuichi Satou, Hajime Yagi
  • Patent number: 6521525
    Abstract: An electro-optic device, such as an LCD, includes a display unit and a peripheral drive circuit unit on a single substrate. A gate comprising a gate electrode and gate insulation film is formed on a surface of the substrate. A layer of a substance having good lattice compatibility with manocrystalline silicon is formed over the gate insulation film. A layer of monocrystalline silicon is formed over the substance layer. Manocrystalline silicon is heteroepitaxially grown by catalytic CVD or the like using a crystalline sapphire film formed on the substrate to form the monocrystalline silicon layer. The monocrystalline silican layer is used as a dual gate MOSTFT of the electro-optic device.
    Type: Grant
    Filed: November 27, 2001
    Date of Patent: February 18, 2003
    Assignee: Sony Corporation
    Inventors: Hideo Yamanaka, Hisayoshi Yamoto, Yuichi Satou, Hajime Yagi
  • Patent number: 6504215
    Abstract: A single crystal silicon is graphoepitaxially grown using a step formed on a substrate as a seed by a catalyst process, and the obtained single crystal silicon layer is used for a dual gate type MOSTFT in an electro-optical apparatus such as a display section of a peripheral driving circuit integration type LCD. A single crystal silicon thin film having high electron/hole mobility is formed into a uniform film at a relatively low temperature, which enables the manufacturing of an active matrix substrate incorporated with a high-performance driver which can be used in a TFT display.
    Type: Grant
    Filed: September 27, 1999
    Date of Patent: January 7, 2003
    Assignee: Sony Corporation
    Inventors: Hideo Yamanaka, Hisayoshi Yamoto, Yuichi Satou, Hajime Yagi