Patents by Inventor Hitoshi Kondo

Hitoshi Kondo has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10510649
    Abstract: An interconnect substrate includes an insulating layer having a first resin layer and a second resin layer covering an upper surface of the first resin layer, a first conductive layer having an upper surface and side surfaces covered with the first resin layer, a lower surface of the first conductive layer being exposed from a lower surface of the first resin layer, and a second conductive layer including an interconnect pattern and a via interconnect, the interconnect pattern being disposed on an upper surface of the second resin layer, the via interconnect penetrating through both the second resin layer and the first resin layer to connect the interconnect pattern to the upper surface of the first conductive layer, wherein the first resin layer is made of a resin having a higher modulus of elasticity and a lower coefficient of elongation than the second resin layer.
    Type: Grant
    Filed: May 21, 2019
    Date of Patent: December 17, 2019
    Assignee: SHINKO ELECTRIC INDUSTRIES CO., LTD.
    Inventors: Yoshihiro Kita, Hitoshi Kondo
  • Publication number: 20190371717
    Abstract: An interconnect substrate includes an insulating layer having a first resin layer and a second resin layer covering an upper surface of the first resin layer, a first conductive layer having an upper surface and side surfaces covered with the first resin layer, a lower surface of the first conductive layer being exposed from a lower surface of the first resin layer, and a second conductive layer including an interconnect pattern and a via interconnect, the interconnect pattern being disposed on an upper surface of the second resin layer, the via interconnect penetrating through both the second resin layer and the first resin layer to connect the interconnect pattern to the upper surface of the first conductive layer, wherein the first resin layer is made of a resin having a higher modulus of elasticity and a lower coefficient of elongation than the second resin layer.
    Type: Application
    Filed: May 21, 2019
    Publication date: December 5, 2019
    Inventors: Yoshihiro KITA, Hitoshi KONDO
  • Patent number: 10398027
    Abstract: A wiring board includes: a wiring structure including: a first insulating layer; a first wiring layer formed on a bottom surface of the first insulating layer; and a protective insulating layer which covers the bottom surface of the first insulating layer and has a first opening; and a support base member bonded to the protective insulating layer with an adhesive layer and has a second opening. A diameter of the second opening at a position between the top surface and the bottom surface of the support base member in a thickness direction of the support base member is smaller than a diameter of the second opening at the top surface of the support base member and a diameter of the second opening at the bottom surface of the support base member, and smaller than a diameter of the first opening.
    Type: Grant
    Filed: December 3, 2018
    Date of Patent: August 27, 2019
    Assignee: SHINKO ELECTRIC INDUSTRIES CO., LTD.
    Inventors: Kazuhiro Oshima, Junji Sato, Hitoshi Kondo, Katsuya Fukase
  • Publication number: 20190246602
    Abstract: Provided is a livestock body protective material that includes (A) an emulsion obtained by dispersing a rubber-based macromolecule serving as a dispersoid in a dispersion medium including water as the main component, and (B) a coagulant blended according to need, and that is used to form a protective film for protecting a livestock's sick/injured area.
    Type: Application
    Filed: May 23, 2017
    Publication date: August 15, 2019
    Applicant: TOKUYAMA CORPORATION
    Inventors: Hitoshi Kondo, Yoji Inui, Hiroshi Wada
  • Publication number: 20190231684
    Abstract: A method for preventing mastitis in lactating livestock includes forming a teat pack for the lactating livestock by adhering one of (i) a base comprising at least (A) a polymer latex and (ii) a secondary agent comprising at least (B) a coagulant to a teat of the lactating livestock, and subsequently adhering the other to the teat.
    Type: Application
    Filed: April 8, 2019
    Publication date: August 1, 2019
    Applicant: TOKUYAMA CORPORATION
    Inventors: Hitoshi Kondo, Yoji Inui, Hideki Kazama
  • Patent number: 10340214
    Abstract: A carrier base material-added wiring substrate includes a wiring substrate and a carrier base material. The wiring substrate includes an insulation layer, a wiring layer arranged on a lower surface of the insulation layer, and a solder resist layer that covers the lower surface of the insulation layer and includes an opening that exposes a portion of the wiring layer as an external connection terminal. The carrier base material is adhered by an adhesive layer to the solder resist layer. The carrier base material includes an opening that is in communication with the opening of the solder resist layer and exposes the external connection terminal. The opening of the carrier base material has a diameter that is smaller than that of the opening of the solder resist layer.
    Type: Grant
    Filed: September 25, 2017
    Date of Patent: July 2, 2019
    Assignee: SHINKO ELECTRIC INDUSTRIES CO., LTD.
    Inventors: Junji Sato, Hitoshi Kondo, Katsuya Fukase
  • Publication number: 20190181084
    Abstract: A wiring board includes: a wiring structure including: a first insulating layer; a first wiring layer formed on a bottom surface of the first insulating layer; and a protective insulating layer which covers the bottom surface of the first insulating layer and has a first opening; and a support base member bonded to the protective insulating layer with an adhesive layer and has a second opening. A diameter of the second opening at a position between the top surface and the bottom surface of the support base member in a thickness direction of the support base member is smaller than a diameter of the second opening at the top surface of the support base member and a diameter of the second opening at the bottom surface of the support base member, and smaller than a diameter of the first opening.
    Type: Application
    Filed: December 3, 2018
    Publication date: June 13, 2019
    Inventors: Kazuhiro Oshima, Junji Sato, Hitoshi Kondo, Katsuya Fukase
  • Publication number: 20190045745
    Abstract: A teat opening protection patch is stuck to portions inclusive of the teat openings of livestock, and includes a laminate 1 of an elastic sheet 2 and an adhesive layer 3 laminated on one surface of the elastic sheet 2, the laminate 1 having a double-stretched tensile stress in a range of 0.1 to 5 N.
    Type: Application
    Filed: February 16, 2017
    Publication date: February 14, 2019
    Applicant: TOKUYAMA CORPORATION
    Inventors: Yoji INUI, Hitoshi KONDO, Katsuhiro SHIRAI
  • Patent number: 10109580
    Abstract: A wiring board includes a single-layer insulating layer, and a single-layer interconnect layer embedded in the insulating layer, wherein an entirety of a first surface of the interconnect layer is exposed in a recessed position relative to a first surface of the insulating layer, and a second surface of the interconnect layer is partially exposed in a recessed position relative to a second surface of the insulating layer.
    Type: Grant
    Filed: December 2, 2016
    Date of Patent: October 23, 2018
    Assignee: SHINKO ELECTRIC INDUSTRIES CO., LTD.
    Inventors: Shunichiro Matsumoto, Hitoshi Kondo, Katsuya Fukase
  • Patent number: 10095626
    Abstract: A solid state drive (SSD) with pseudo-single-level cell (pSLC) caching and a method of caching data in an SSD is disclosed. In one embodiment, the SSD includes a plurality of multibit NAND media devices arranged in one or more channels communicatively coupled to a memory controller. A first portion of the plurality of multibit NAND media devices is configured to operate as a pSLC cache and a second portion of the plurality of multibit NAND media devices is configured to operate as a multibit NAND media storage area. In one embodiment, the pSLC cache comprises a first area for a pSLC write cache and a second area for a pSLC read cache.
    Type: Grant
    Filed: March 10, 2017
    Date of Patent: October 9, 2018
    Assignee: Toshiba Memory Corporation
    Inventors: Narasimhulu Dharani Kotte, Senthil Thamgaraj, Robert Reed, Hitoshi Kondo
  • Patent number: 10080292
    Abstract: A wiring board includes an electronic component; an insulating layer containing the electronic component therein, and including a via hole that is open at one surface of the insulating layer to expose an electrode of the electronic component; a first wiring layer embedded in the insulating layer, one surface of the first wiring layer being exposed at the one surface of the insulating layer; a second wiring layer including a wiring pattern formed on the one surface of the first wiring layer, and a via wiring extended from the wiring pattern to be extended in the via hole and directly connected to an electrode of the electronic component.
    Type: Grant
    Filed: June 28, 2017
    Date of Patent: September 18, 2018
    Assignee: SHINKO ELECTRIC INDUSTRIES CO., LTD.
    Inventors: Junji Sato, Hitoshi Kondo, Katsuya Fukase
  • Publication number: 20180260342
    Abstract: A mass storage device and a method for wirelessly transmitting a first information by a mass storage device is disclosed. In one embodiment, the mass storage device includes one or more memory devices and a mass storage device controller communicatively coupled to the one or more memory devices. The mass storage device controller includes one or more controller processors and a wireless sideband interface. The wireless sideband interface is configured to wirelessly transmit the first information retrieved by an interface processor of the wireless sideband interface from one of the controller processors or one of the memory devices. In one embodiment, the interface processor is an internet-of-things (IoT) processor.
    Type: Application
    Filed: March 10, 2017
    Publication date: September 13, 2018
    Inventors: Senthil Murugan Thangaraj, Narasimhulu Dharani Kotte, Chayan Biswas, Robert Reed, Hitoshi Kondo
  • Publication number: 20180260331
    Abstract: A solid state drive (SSD) with pseudo-single-level cell (pSLC) caching and a method of caching data in an SSD is disclosed. In one embodiment, the SSD includes a plurality of multibit NAND media devices arranged in one or more channels communicatively coupled to a memory controller. A first portion of the plurality of multibit NAND media devices is configured to operate as a pSLC cache and a second portion of the plurality of multibit NAND media devices is configured to operate as a multibit NAND media storage area. In one embodiment, the pSLC cache comprises a first area for a pSLC write cache and a second area for a pSLC read cache.
    Type: Application
    Filed: March 10, 2017
    Publication date: September 13, 2018
    Inventors: Narasimhulu Dharani Kotte, Senthil Murugan Thangaraj, Robert Reed, Hitoshi Kondo
  • Patent number: 10049047
    Abstract: A solid state drive (SSD) with pseudo-single-level cell (pSLC) caching and a method of caching data in an SSD is disclosed. In one embodiment, the SSD includes a plurality of multibit NAND media devices arranged in one or more channels communicatively coupled to a memory controller. The SSD further includes one or more volatile memory devices communicatively coupled to the memory controller, where at least one of the one or more volatile memory devices has a read cache area. A first portion of the plurality of multibit NAND media devices is configured to operate as a pSLC write cache and a second portion of the plurality of multibit NAND media devices is configured to operate as a multibit NAND media storage area.
    Type: Grant
    Filed: March 10, 2017
    Date of Patent: August 14, 2018
    Assignee: Toshiba Memory Corporation
    Inventors: Narasimhulu Dharani Kotte, Senthil Thamgaraj, Robert Reed, Hitoshi Kondo
  • Patent number: 9994580
    Abstract: Provided is a phthalocyanine compound which has a green hue without having a halogen atom, and exhibits high luminance and an excellent coloring force at the time of being used for preparing a green pixel unit of a color filter. The phthalocyanine compound of the present invention has green hues without having a halogen atom, and exhibits high luminance and an excellent coloring force at the time of being used for preparing the green pixel unit of the color filter. In addition, the phthalocyanine compound can be used not only for the color filter, but also as a colorant for a wide range of applications as a general colorant such as printing ink, paint, colored plastic, toner, and ink for ink jet.
    Type: Grant
    Filed: July 7, 2016
    Date of Patent: June 12, 2018
    Assignee: DIC CORPORATION
    Inventors: Hitoshi Kondo, Yusuke Ozaki, Katsunori Shimada
  • Publication number: 20180090426
    Abstract: A carrier base material-added wiring substrate includes a wiring substrate and a carrier base material. The wiring substrate includes an insulation layer, a wiring layer arranged on a lower surface of the insulation layer, and a solder resist layer that covers the lower surface of the insulation layer and includes an opening that exposes a portion of the wiring layer as an external connection terminal. The carrier base material is adhered by an adhesive layer to the solder resist layer. The carrier base material includes an opening that is in communication with the opening of the solder resist layer and exposes the external connection terminal. The opening of the carrier base material has a diameter that is smaller than that of the opening of the solder resist layer.
    Type: Application
    Filed: September 25, 2017
    Publication date: March 29, 2018
    Inventors: JUNJI SATO, HITOSHI KONDO, KATSUYA FUKASE
  • Patent number: 9905504
    Abstract: A carrier base material-added wiring substrate includes a wiring substrate and first to third carrier base materials. The first carrier base material is adhered by a first adhesive layer to a lower surface of the wiring substrate and includes an opening that exposes a product area of the wiring substrate. The second carrier base material is arranged in the opening of the first carrier base material and contacts the lower surface of the wiring substrate. The third carrier base material is adhered by a second adhesive layer to the first carrier base material and the second carrier base material. The third carrier base material covers the opening of the first carrier base material. The second adhesive layer is formed entirely on an upper surface of the third carrier base material.
    Type: Grant
    Filed: September 25, 2017
    Date of Patent: February 27, 2018
    Assignee: Shinko Electric Industries Co., Ltd.
    Inventors: Junji Sato, Hitoshi Kondo, Katsuya Fukase
  • Publication number: 20180014407
    Abstract: A wiring board includes an electronic component; an insulating layer containing the electronic component therein, and including a via hole that is open at one surface of the insulating layer to expose an electrode of the electronic component; a first wiring layer embedded in the insulating layer, one surface of the first wiring layer being exposed at the one surface of the insulating layer; a second wiring layer including a wiring pattern formed on the one surface of the first wiring layer, and a via wiring extended from the wiring pattern to be extended in the via hole and directly connected to an electrode of the electronic component.
    Type: Application
    Filed: June 28, 2017
    Publication date: January 11, 2018
    Inventors: Junji SATO, Hitoshi KONDO, Katsuya FUKASE
  • Publication number: 20170327510
    Abstract: Provided is a phthalocyanine compound which has a green hue without having a halogen atom, and exhibits high luminance and an excellent coloring force at the time of being used for preparing a green pixel unit of a color filter. The phthalocyanine compound of the present invention has green hues without having a halogen atom, and exhibits high luminance and an excellent coloring force at the time of being used for preparing the green pixel unit of the color filter. In addition, the phthalocyanine compound can be used not only for the color filter, but also as a colorant for a wide range of applications as a general colorant such as printing ink, paint, colored plastic, toner, and ink for ink jet.
    Type: Application
    Filed: July 7, 2016
    Publication date: November 16, 2017
    Inventors: Hitoshi KONDO, Yusuke OZAKI, Katsunori SHIMADA
  • Publication number: 20170319473
    Abstract: A teat protective pack material for coating teats of lactating livestock to prevent mastitis is disclosed, the teat protective pack material including a polymer latex and a coagulant for coagulating the polymer latex to form a film. The teat protective pack material optionally includes a surfactant, a mold-releasing agent, a water-soluble polymer, water and/or a water-soluble solvent, an antifreezing agent, etc. if required. The teat protective pack material, may have excellent adhesiveness, elasticity, abrasion resistance, durability, aging resistance, oil resistance, weatherability, breast shape followability, etc. The teat protective pack material may be capable of immediately coating the whole teat and thus preventing adhesion of teat packs adjacent to each other, and, when milking again or in case of emergency, may be able to be quickly removed without using any additional facility, material, etc.
    Type: Application
    Filed: November 12, 2015
    Publication date: November 9, 2017
    Applicant: TOKUYAMA CORPORATION
    Inventors: Hitoshi Kondo, Yoji Inui, Hideki Kazama