Abstract: A multi-port semiconductor memory device having variable access paths and a method therefor are provided. The semiconductor memory device includes a plurality of input/output ports; a memory array divided into a plurality of memory areas; and a select control unit to variably control access paths between the memory areas and the input/output ports so that each memory area is accessed through at least one of the input/output ports.

Abstract: A multi-port semiconductor memory device having variable access paths and a method therefore are provided. The semiconductor memory device includes a plurality of input/output ports; a memory array divided into a plurality of memory areas; and a select control unit to variably control access paths between the memory areas and the input/output ports so that each memory area is accessed through at least one of the input/output ports.

Abstract: A refresh control circuit in a semiconductor memory device includes a refresh controller, a voltage generator and a word line enable circuit. The refresh period controller generates a control signal in response to a self-refresh signal, the control signal indicating a nominal initiation of a refresh period. The voltage generator generates an output voltage in response to the control signal. The output voltage is boosted from a low voltage to a high voltage during the refresh period. The word line enable circuit generates a word line enable signal in response to the control signal, wherein the word line enable signal is activated following a delay after the nominal initiation of the refresh period, and the delay allows the voltage generator to fully boost the output voltage.

Abstract: An auto-precharge control circuit in a semiconductor memory and method thereof, where the auto-precharge starting point may vary. The auto-precharge starting point may vary in response to at least one control signal. The auto-precharge starting point may vary in accordance with frequency and/or latency information. The auto-precharge starting point may vary in response to at least one control signal including clock frequency information. The auto-precharge starting point may vary depending on a latency signal received from a mode register setting command.

Abstract: A multiprocessor system and method thereof are provided.

Abstract: A semiconductor memory device and a method therefor for changing an access right to access a shared memory area according to an external command and a refresh mode is provided. In one embodiment, the semiconductor memory device includes a plurality of input/output ports for inputting command signals for first or second mode refresh operation, a memory array divided into a plurality of different memory areas including a shared memory area that is accessible via at least two of the plurality of input/output ports, and a grant control block for assigning an access right to access the shared memory area in response to an external command signal. The grant control block may also generate grant control signals for preferentially assigning the access right to access the shared memory area to the input/output port for inputting the command signals for the first mode refresh operation.

Abstract: An auto-precharge control circuit in a semiconductor memory and method thereof, where the auto-precharge starting point may vary. The auto-precharge starting point may vary in response to at least one control signal. The auto-precharge starting point may vary in accordance with frequency and/or latency information. The auto-precharge starting point may vary in response to at least one control signal including clock frequency information. The auto-precharge starting point may vary depending on a latency signal received from a mode register setting command.

Abstract: A multipath accessible semiconductor memory device provides an interface function between processors. The memory device may include a memory cell array having a shared memory area operationally coupled to two or more ports that are independently accessible by two or more processors, an access path forming unit to form a data access path between one of the ports and the shared memory area in response to external signals applied by the processors, and an interface unit having a semaphore area and mailbox areas accessible in the shared memory area by the two or more processors to provide an interface function for communication between the two or more processors.

Abstract: A semiconductor memory device and a self-refresh method in which the semiconductor memory device includes a plurality of input/output ports having respective independent operation, a period of self-refresh through one of the plurality of input/output ports being subordinate to a kind of operation through another input/output port. Whereby, a refresh characteristic in a multi-port semiconductor memory device including a dual-port semiconductor memory device may be improved.

Abstract: A semiconductor memory device and a method therefor for changing an access right to access a shared memory area according to an external command and a refresh mode is provided. In one embodiment, the semiconductor memory device includes a plurality of input/output ports for inputting command signals for first or second mode refresh operation, a memory array divided into a plurality of different memory areas including a shared memory area that is accessible via at least two of the plurality of input/output ports, and a grant control block for assigning an access right to access the shared memory area in response to an external command signal. The grant control block may also generate grant control signals for preferentially assigning the access right to access the shared memory area to the input/output port for inputting the command signals for the first mode refresh operation.

Abstract: A semiconductor memory device includes ports, data line pairs, where each port associated with one of the data line pairs, sets of address lines, where each port associated with one of the sets of address lines, a shared memory region of a memory cell array, where the shared memory region accessible through the ports, an access controller coupled to the ports and configured to generate an access selection signal in response to a plurality of control signals received through the ports, and an access router coupled to the shared memory region, the data line pairs, and the sets of address lines, the access router configured to selectively couple one of the sets of address lines and one of the data line pairs to the shared memory region in response to the access selection signal.

Abstract: A multi-port semiconductor memory device having variable access paths and a method therefor are provided. The semiconductor memory device includes a plurality of input/output ports; a memory array divided into a plurality of memory areas; and a select control unit to variably control access paths between the memory areas and the input/output ports so that each memory area is accessed through at least one of the input/output ports.

Abstract: An optical pickup including a many-sided reflection prism formed as a single body with a plurality of reflection faces to guide a light beam incident through a transmission face in a horizontal direction perpendicular to a height direction by reducing a size of the light beam in the height direction, by using a difference in angles between the reflection faces, and to reflect the guided light beam in the height direction by one reflection face of an angle less than 45° with respect to the horizontal direction. By using the many-sided reflection prism, the height of an optical system can be reduced regardless of the wavelength used without reducing light beam size. Thereby, slim-sized optical pickups can be implemented.

Abstract: A semiconductor package includes multiple embedded chips, each chip including a common circuit having substantially the same common function. The common circuit in a selected one of the chips is enabled. The common circuit in one or more other ones of the chips is disabled. As a result, the enabled common circuit performs the common function for the selected chip and the one or more other chips.

Abstract: A compatible optical pickup device includes a single light source to emit a light having a wavelength longer than 650 nm, an objective lens having a near axis area, a ring type annular lens area, and a far axis area to focus the light to form light spots suitable for a first relatively thin optical disk and a second relatively thick optical disk to form a first light spot having an FWHM (full width at half maximum) of 0.72 ?m or less for the first optical disk and a second light spot having an FWHM of 0.8 ?m or more for the second optical disk, an optical path changer to change a proceeding path of incident light, and a photodetector to receive light reflected by the optical disk and having passed through the objective lens and the optical path changer and to detect an information signal and/or an error signal.

Abstract: An optical reading and writing system including a base; an optical disk rotatably mounted on the base; an optical pickup including an objective lens, focusing a light beam to form a light spot on a recording surface of the optical disk; an actuator arm mounted on the base such that the actuator arm can pivot in the radial direction of the optical disk by a voice coil motor; a load beam supported by the actuator arm, and capable of moving slightly up and down and in the radial direction of the optical disk by an external force; a flexure attached to the load beam, supporting a slider to enable the slider to contact the recording surface; and a driving unit mounted on free ends of the actuator arm and the load beam, providing a driving force in the radial direction to the free end of the load beam.

Abstract: An optical pickup device includes a light unit for irradiating a light beam having a wavelength longer than 650 nm onto a recording medium and receiving and detecting a light beam reflected by the recording medium, and an objective tens formed of a single lens having an NA of 0.7 or more to form a light spot on the recording medium by condensing an incident light beam emitted from the light unit. A recording medium has a recording density of a DVD family or more and is formed of a material suitable for a long wavelength of 700 nm or more so that a reproduction signal by a reflectance of a recording surface is optimized. Thus, a compact high density optical recording/reproducing apparatus which is inexpensive and has high performance can be realized.

Abstract: A semiconductor integrated circuit device includes a semiconductor chip having a memory cell array region surrounded with a peripheral circuit region and includes a plurality of bonding pads disposed at least in one row on only one side of the semiconductor chip. The circuit device may include first leads group disposed adjacent to the bonding pad side and a second leads group disposed opposite the first leads group. The second leads group may be formed over a portion of the semiconductor chip (lead-on-chip structure). A plurality of bonding wires connect the first and second leads group with the plurality of bonding pads respectively.

Abstract: A variety of pad arrangements are provided for semiconductor devices for reducing the likelihood of bonding failures, particularly those due to shorts, and/or for reducing the difference in length between bonding wires to decrease signal skew during operation of the semiconductor device and improve signal integrity.