Patents by Inventor Ho Jun Kim

Ho Jun Kim has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10818802
    Abstract: A semiconductor device according to example embodiments of inventive concepts may include a substrate, source/drain regions extending perpendicular to an upper surface of the substrate, a plurality of nanosheets on the substrate and separated from each other, and a gate electrode and a gate insulating layer on the substrate. The nanosheets define channel regions that extend in a first direction between the source/drain regions. The gate electrode surrounds the nanosheets and extends in a second direction intersecting the first direction. The gate insulating layer is between the nanosheets and the gate electrode. A length of the gate electrode in the first direction may be greater than a space between adjacent nanosheets among the nanosheets.
    Type: Grant
    Filed: March 23, 2018
    Date of Patent: October 27, 2020
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Jong Ho Lee, Ho Jun Kim, Sung Dae Suk, Geum Jong Bae
  • Publication number: 20200201349
    Abstract: A vehicle includes a first image obtainer configured to obtain an external image; a second image obtainer configured to obtain an internal image; an obstacle detector configured to detect obstacles; a controller configured to control autonomous driving based on obstacle detection information detected by the obstacle detector and image data obtained by the first image obtainer and encrypt brightness data among the image data obtained by the first and second image obtainers during the control of the autonomous driving; and a storage configured to store the encrypted brightness data.
    Type: Application
    Filed: May 29, 2019
    Publication date: June 25, 2020
    Inventors: Changwoo Ha, Bong Ju Kim, Ho-Jun Kim, Hochoul Jung
  • Publication number: 20200193182
    Abstract: A vehicle includes a sensor unit configured to acquire positional information of at least one object located in the vicinity of the vehicle, the sensor unit comprising a plurality of sensor modules. A controller is configured to determine a tracking filter based on a correspondence relationship between the plurality of sensor modules and the at least one object and to track the position of the at least one object using the positional information of the at least one object and the tracking filter.
    Type: Application
    Filed: September 20, 2019
    Publication date: June 18, 2020
    Inventors: Bong Ju Kim, Byung-Jik Keum, Ho-Jun Kim, Sungsuk Ok
  • Publication number: 20200191950
    Abstract: Provided is a vehicle capable of efficient storage medium management by differentially storing images acquired by the vehicle on the basis of a surrounding environment of the vehicle and a vehicle state, and a control method thereof. The vehicle includes a storage, a camera configured to acquire a vehicle surrounding image of a vehicle, a sensor unit configured to acquired vehicle information of the vehicle, and a control unit configured to determine an accident occurrence probability of an accident occurring to the vehicle on the basis of at least one of the vehicle surrounding image and the vehicle information, and in response to determining that a collision has occurred to the vehicle on the basis of the vehicle information, determine a storage form of the vehicle surrounding image on the basis of the accident occurrence probability and store the vehicle surrounding image in the storage.
    Type: Application
    Filed: July 17, 2019
    Publication date: June 18, 2020
    Inventors: Ho-Jun Kim, Changwoo Ha, Byung-Jik Keum, Jun-Muk Lee, Joo-Hee Choi, JinHa Choi
  • Publication number: 20200075331
    Abstract: A semiconductor device according to an example embodiment includes a substrate extending in first and second directions intersecting with each other; nanowires on the substrate and spaced apart from each other in the second direction; gate electrodes extending in the first direction and spaced apart from each other in the second direction, and surrounding the nanowires to be superimposed vertically with the nanowires; external spacers on the substrate and covering sidewalls of the gate electrodes on the nanowires; and an isolation layer between the gate electrodes and extending in the first direction, wherein an upper surface of the isolation layer is flush with upper surfaces of the gate electrodes.
    Type: Application
    Filed: March 22, 2019
    Publication date: March 5, 2020
    Inventors: Chang-woo NOH, Myung-gil KANG, Ho-jun KIM, Geum-jong BAE, Dong-il BAE
  • Publication number: 20200035705
    Abstract: Semiconductor devices and methods of forming the same are provided. Semiconductor devices may include first and second active patterns on a substrate. Each of the first and second active patterns may extend in a first direction. The first and second active patterns may be aligned along the first direction and may be separated by a first trench extending in a second direction. The first trench may define a first sidewall of the first active pattern. The semiconductor devices may also include a channel pattern including first and second semiconductor patterns stacked on the first active pattern, a dummy gate electrode on the channel pattern and extending in the second direction, and a gate spacer on one side of the dummy gate electrode, the one side of the dummy gate electrode being adjacent to the first trench. The gate spacer may cover a first sidewall of the first active pattern.
    Type: Application
    Filed: March 7, 2019
    Publication date: January 30, 2020
    Inventors: Ho-Jun Kim, Jaehyeoung Ma, Geumjong Bae
  • Patent number: 10128346
    Abstract: A semiconductor device includes a semiconductor pattern on a substrate along a first direction, a blocking pattern on a top surface of the semiconductor pattern, a first wire pattern on the blocking pattern along a second direction different from the first direction, the first wire including a first part and a second part on opposite sides of the first part, a gate electrode surrounding the first part of the first wire pattern, and a contact surrounding the second part of the first wire pattern, wherein a height of a bottom surface of the contact from a top surface of the substrate is different from a height of a bottom surface of the gate electrode from the top surface of the substrate.
    Type: Grant
    Filed: May 26, 2016
    Date of Patent: November 13, 2018
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Ho-Jun Kim, Sung-Dae Suk
  • Patent number: 10056454
    Abstract: A semiconductor device includes a semiconductor substrate. A first fin extends in a first direction. A first nano sheet structure includes at least two first nano sheets which extend in the first direction parallel to an upper surface of the first fin. A second fin extends in the first direction. A second nano sheet structure includes at least two second nano sheets which extend in the first direction parallel to an upper surface of the second fin. At least one of the at least two first nano sheets has a different thickness from at least one of the at least two second nano sheets.
    Type: Grant
    Filed: October 27, 2016
    Date of Patent: August 21, 2018
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Ho-Jun Kim, Jong-Ho Lee, Geum-Jong Bae, Dong-Chan Suh
  • Publication number: 20180212067
    Abstract: A semiconductor device according to example embodiments of inventive concepts may include a substrate, source/drain regions extending perpendicular to an upper surface of the substrate, a plurality of nanosheets on the substrate and separated from each other, and a gate electrode and a gate insulating layer on the substrate. The nanosheets define channel regions that extend in a first direction between the source/drain regions. The gate electrode surrounds the nanosheets and extends in a second direction intersecting the first direction. The gate insulating layer is between the nanosheets and the gate electrode. A length of the gate electrode in the first direction may be greater than a space between adjacent nanosheets among the nanosheets.
    Type: Application
    Filed: March 23, 2018
    Publication date: July 26, 2018
    Applicant: Samsung Electronics Co, Ltd
    Inventors: Jong Ho LEE, Ho Jun Kim, Sung Dae Suk, Geum Jong Bae
  • Patent number: 9985141
    Abstract: A semiconductor device according to example embodiments of inventive concepts may include a substrate, source/drain regions extending perpendicular to an upper surface of the substrate, a plurality of nanosheets on the substrate and separated from each other, and a gate electrode and a gate insulating layer on the substrate. The nanosheets define channel regions that extend in a first direction between the source/drain regions. The gate electrode surrounds the nanosheets and extends in a second direction intersecting the first direction. The gate insulating layer is between the nanosheets and the gate electrode. A length of the gate electrode in the first direction may be greater than a space between adjacent nanosheets among the nanosheets.
    Type: Grant
    Filed: August 2, 2017
    Date of Patent: May 29, 2018
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Jong Ho Lee, Ho Jun Kim, Sung Dae Suk, Geum Jong Bae
  • Patent number: 9871103
    Abstract: A semiconductor device includes a plurality of active regions including channel regions extending in a first direction on a semiconductor substrate and source/drain regions connected to the channel regions, a plurality of gate electrodes extending in a second direction different from the first direction to intersect the channel regions, a plurality of conductive lines electrically connected to at least one of the source/drain regions and the plurality of gate electrodes through a plurality of vias, and a power line disposed between the semiconductor substrate and the plurality of conductive lines and configured to supply a power supply voltage.
    Type: Grant
    Filed: March 31, 2016
    Date of Patent: January 16, 2018
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Ho Jun Kim, Sung Dae Suk
  • Patent number: 9860659
    Abstract: An electronic device comprising: a memory; a headphone jack; and at least one processor operatively coupled to the memory, configured to: detect an impedance of a first portion of the headphone jack; and detect whether a foreign substance is present in the headphone jack based on the impedance of the first portion of the headphone jack.
    Type: Grant
    Filed: November 30, 2015
    Date of Patent: January 2, 2018
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Jin-Hee Won, Ho-Jun Kim, Kyung-Min Park, Gi-Hoon Lee, Sung-Bin Hong
  • Publication number: 20170345946
    Abstract: A semiconductor device according to example embodiments of inventive concepts may include a substrate, source/drain regions extending perpendicular to an upper surface of the substrate, a plurality of nanosheets on the substrate and separated from each other, and a gate electrode and a gate insulating layer on the substrate. The nanosheets define channel regions that extend in a first direction between the source/drain regions. The gate electrode surrounds the nanosheets and extends in a second direction intersecting the first direction. The gate insulating layer is between the nanosheets and the gate electrode. A length of the gate electrode in the first direction may be greater than a space between adjacent nanosheets among the nanosheets.
    Type: Application
    Filed: August 2, 2017
    Publication date: November 30, 2017
    Applicant: Samsung Electronics Co., Ltd.
    Inventors: Jong Ho LEE, Ho Jun KIM, Sung Dae SUK, Geum Jong BAE
  • Patent number: 9825183
    Abstract: A semiconductor device according to example embodiments of inventive concepts may include a substrate, source/drain regions extending perpendicular to an upper surface of the substrate, a plurality of nanosheets on the substrate and separated from each other, and a gate electrode and a gate insulating layer on the substrate. The nanosheets define channel regions that extend in a first direction between the source/drain regions. The gate electrode surrounds the nanosheets and extends in a second direction intersecting the first direction. The gate insulating layer is between the nanosheets and the gate electrode. A length of the gate electrode in the first direction may be greater than a space between adjacent nanosheets among the nanosheets.
    Type: Grant
    Filed: July 28, 2016
    Date of Patent: November 21, 2017
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Jong Ho Lee, Ho Jun Kim, Sung Dae Suk, Geum Jong Bae
  • Patent number: 9791855
    Abstract: A semiconductor process management system is provided. The semiconductor process management system includes a communicator that receives a process recipe from one or more process apparatuses and receives a measured value for each sampling point from one or more measuring apparatus, and a first determination unit that establishes a mutual influence model between the process recipe and the measured value for each sampling point based on the process recipe and the measured value for each sampling point.
    Type: Grant
    Filed: May 21, 2015
    Date of Patent: October 17, 2017
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Dong-hoon Han, Jai-hyung Won, Do-hyung Kim, Sung-hyup Kim, Ho-jun Kim
  • Publication number: 20170256611
    Abstract: A semiconductor device includes a semiconductor substrate. A first fin extends in a first direction. A first nano sheet structure includes at least two first nano sheets which extend in the first direction parallel to an upper surface of the first fin. A second fin extends in the first direction. A second nano sheet structure includes at least two second nano sheets which extend in the first direction parallel to an upper surface of the second fin. At least one of the at least two first nano sheets has a different thickness from at least one of the at least two second nano sheets.
    Type: Application
    Filed: October 27, 2016
    Publication date: September 7, 2017
    Inventors: HO-JUN KIM, Jong-ho Lee, Geum-Jong Bae, Dong-Chan Suh
  • Publication number: 20170250291
    Abstract: A semiconductor device according to example embodiments of inventive concepts may include a substrate, source/drain regions extending perpendicular to an upper surface of the substrate, a plurality of nanosheets on the substrate and separated from each other, and a gate electrode and a gate insulating layer on the substrate. The nanosheets define channel regions that extend in a first direction between the source/drain regions. The gate electrode surrounds the nanosheets and extends in a second direction intersecting the first direction. The gate insulating layer is between the nanosheets and the gate electrode. A length of the gate electrode in the first direction may be greater than a space between adjacent nanosheets among the nanosheets.
    Type: Application
    Filed: July 28, 2016
    Publication date: August 31, 2017
    Applicant: Samsung Electronics Co., Ltd.
    Inventors: Jong Ho LEE, Ho Jun KIM, Sung Dae SUK, Geum Jong BAE
  • Patent number: 9749809
    Abstract: The present invention relates to a method and system for determining location and position for the effective use thereof in a location-based service by precisely determining information on the location and position of a user terminal, such as a smartphone, to provide the determined location and position to the user terminal using a georeferenced reference image DB preconstructed on a server on a network or on the user terminal, and images captured by a camera of the user terminal.
    Type: Grant
    Filed: November 14, 2012
    Date of Patent: August 29, 2017
    Assignee: University of Seoul Industry Cooperation Foundation
    Inventors: Im Pyeong Lee, Kyoung Ah Choi, Ho Jun Kim
  • Publication number: 20170092730
    Abstract: A semiconductor device includes a semiconductor pattern on a substrate along a first direction, a blocking pattern on a top surface of the semiconductor pattern, a first wire pattern on the blocking pattern along a second direction different from the first direction, the first wire including a first part and a second part on opposite sides of the first part, a gate electrode surrounding the first part of the first wire pattern, and a contact surrounding the second part of the first wire pattern, wherein a height of a bottom surface of the contact from a top surface of the substrate is different from a height of a bottom surface of the gate electrode from the top surface of the substrate.
    Type: Application
    Filed: May 26, 2016
    Publication date: March 30, 2017
    Inventors: Ho-Jun KIM, Sung-Dae SUK
  • Publication number: 20170033102
    Abstract: A semiconductor device includes a plurality of active regions including channel regions extending in a first direction on a semiconductor substrate and source/drain regions connected to the channel regions, a plurality of gate electrodes extending in a second direction different from the first direction to intersect the channel regions, a plurality of conductive lines electrically connected to at least one of the source/drain regions and the plurality of gate electrodes through a plurality of vias, and a power line disposed between the semiconductor substrate and the plurality of conductive lines and configured to supply a power supply voltage.
    Type: Application
    Filed: March 31, 2016
    Publication date: February 2, 2017
    Inventors: Ho Jun Kim, Sung Dae Suk