Abstract: A memory module includes a memory device, a command/address buffering device, and a processing data buffer. The memory device includes a memory cell array, a first set of input/output terminals, each terminal configured to receive first command/address bits, and a second set of input/output terminals, each terminal configured to receive both data bits and second command/address bits. The command/address buffering device is configured to output the first command/address bits to the first set of input/output terminals. The processing data buffer is configured to output the data bits and second command/address bits to the second set of input/output terminals. The memory device is configured such that the first command/address bits, second command/address bits, and data bits are all used to access the memory cell array.

Abstract: Communication method and apparatus based on QoS in network slice-based mobile communication network. The method includes determining whether first sum of bitrate of SDF requested from PDU and a using NSB of network slice corresponding to requested SDF exceeds reference NSB allocated to network slice, determining whether second sum of bitrate of requested SDF and a first using SB of APN corresponding to requested SDF exceeds first reference SB allocated to APN, unless the first sum exceeds the reference NSB, determining whether third sum of bitrate of requested SDF and a second using SB of PDU flow corresponding to requested SDF exceeds second reference SB allocated to PDU flow, unless the second sum exceeds the first reference SB, and processing the requested SDF to guarantee that quality of requested SDF is greater than or equal to a predetermined level, unless the third sum exceeds the second reference SB.

Abstract: Provided are memory devices configured to perform row hammer handling operations, and memory systems including such memory devices. An example memory device may include a memory cell array including a plurality of memory cell rows; a row hammer handler that is configured to determine whether to perform a row hammer handling operation to refresh adjacent memory cell rows adjacent to a first row that is being intensively accessed from among the memory cell rows, resulting in a determination result; and a refresh manager configured to perform either a normal refresh operation for sequentially refreshing the memory cell rows or the row hammer handling operation, based on the determination result of the row hammer handler.

Abstract: A memory device a plurality of memory banks, a hammer address manager, and a refresh controller. The hammer address manager manages access addresses with respect to the plurality of memory banks and provides a hammer address for a hammer refresh operation among the access addresses, the hammer address being the access address that is accessed more than other access addresses. The refresh controller generates a hammer refresh address signal based on the hammer address, the hammer refresh address signal corresponding to a row that is physically adjacent to a row corresponding to the hammer address such that the row physically adjacent to the row corresponding to the hammer address is refreshed by the hammer refresh operation.

Abstract: A semiconductor memory device and a memory system having the same are provided. The semiconductor memory device includes a memory cell array including plural memory cell array blocks, and a refresh controller configured to control the memory cell array blocks to perform a normal refresh operation and a hammer refresh operation. The refresh controller controls one or more third memory cell array blocks excluding a first memory cell array block and one or more second memory cell array blocks adjacent to the first memory cell array block to perform the hammer refresh operation while the normal refresh operation is performed on the first memory cell array block among the memory cell array blocks.

Abstract: A light emitting diode (LED) module includes: a flexible substrate having a first surface on which a circuit pattern is disposed, and a second surface opposite the first surface; a plurality of light emitting diode (LED) chips mounted on the first surface of the flexible substrate, and electrically connected to the circuit pattern; an insulating reflective layer disposed on the first surface of the flexible substrate, and covering a portion of the circuit pattern; first and second connection terminals disposed at both ends of the flexible substrate, and connected to the circuit pattern; and a wavelength conversion layer covering the plurality of LED chips and surrounding the flexible substrate in a cross-sectional view.

Abstract: Embedded refresh controllers included in memory devices and memory devices including the embedded refresh controllers are provided. The embedded refresh controllers may include a refresh counter and an address generator. The refresh counter may generate a counter refresh address signal in response to a counter refresh signal such that the counter refresh address signal may represent a sequentially changing address. The address generator may store information with respect to a hammer address that is accessed intensively and may generates a hammer refresh address signal in response to a hammer refresh signal such that the hammer refresh address signal may represent an address of a row that is physically adjacent to a row of the hammer address. Loss of cell data may be reduced and performance of the memory device may be enhanced by detecting the intensively-accessed hammer address and performing the refresh operation based on the detected hammer address efficiently.

Abstract: A memory module includes a memory device, a command/address buffering device, and a processing data buffer. The memory device includes a memory cell array, a first set of input/output terminals, each terminal configured to receive first command/address bits, and a second set of input/output terminals, each terminal configured to receive both data bits and second command/address bits. The command/address buffering device is configured to output the first command/address bits to the first set of input/output terminals. The processing data buffer is configured to output the data bits and second command/address bits to the second set of input/output terminals. The memory device is configured such that the first command/address bits, second command/address bits, and data bits are all used to access the memory cell array.

Abstract: A semiconductor light emitting device includes a wiring board including a mounting surface on which a first wiring electrode and a second wiring electrode are disposed; a semiconductor light emitting diode (LED) chip including a first surface on which a first electrode and a second electrode are disposed, the first surface facing the mounting surface, the semiconductor LED chip further including a second surface positioned opposite to the first surface, and side surfaces positioned between the first and second surfaces, the first and second electrodes being connected to the first and second wiring electrodes, respectively; and a reflective layer disposed on at least one of the second surface and the side surfaces of the semiconductor LED chip.

Abstract: Provided are compounds comprising a self-immolative group, and the compounds comprising a self-immolative group according to the present invention may include a protein (for example, an oligopeptide, a polypeptide, an antibody, or the like) having substrate-specificity for a target and an active agent (for example, a drug, a toxin, a ligand, a detection probe, or the like) having a specific function or activity.

Abstract: Provided are a light source package and a display device including the light source package. The light source package includes a substrate; a light-emitting device mounted on the substrate; a red phosphor layer formed adjacent to a surface of the light-emitting device; and an encapsulation layer for encapsulating the light-emitting device and the red phosphor layer, wherein a phosphor of the red phosphor layer is a fluoride-based red phosphor or a sulfide-based red phosphor. The light source package and the display device including the light source package display excellent color reproduction, without discoloration due to moisture after a long period of time.

Abstract: Provided are a method and an apparatus for repairing a memory cell in a memory test system. A test device detects a fail address by testing a memory device according to a test command, and temporarily stores the fail address in a fail address memory (FAM). The fail address is transmitted to the memory device according to a fail address transmission mode, is temporarily stored in a temporary fail address storage of the memory device, and is then stored in an anti-fuse array, which is a non-volatile storage device. To secure the reliability of data, stored data can be read to verify the data and a verification result can be transmitted in series or in parallel to the test device.

Abstract: The present invention relates to antibody-drug conjugates (ADCs) wherein a plurality of active agents are conjugated to an antibody through at least one branched linker. The branched linker may comprise a branching unit, and two active agents are coupled to the branching unit through a secondary linker and the branching unit is coupled to the antibody by a primary linker. The active agents may be the same or different. In certain such embodiments, two or more such branched linkers are conjugated to the antibody, e.g., 2-4 branched linkers, which may each be coupled to a different C-terminal cysteine of a heavy or light chain of the antibody. The branched linker may comprise one active agent coupled to the branching unit by a first branch and a second branch that comprises a polyethylene glycol moiety coupled to the branching unit. In certain such embodiments, two or more such branched linkers are conjugated to the antibody, e.g.

Abstract: A method and apparatus for separating real DVC via defects from nuisance based on Net Tracing Classification of eBeam VC die comparison inspection results are provided. Embodiments include performing an eBeam VC die comparison inspection on each via of a plurality of dies; determining DVC vias based on the comparison; performing a Net Tracing Classification on the DVC vias; determining S/D DVC vias based on the Net Tracing Classification; and performing a die repeater analysis on the S/D DVC vias to determine systematic design-related DVC via defects.

Abstract: In some aspects, the invention relates to an antibody-drug conjugate, comprising an anti-CD19 antibody; a linker; and an active agent. The antibody-drug conjugate may comprise a self-immolative group. The linker may comprise an O-substituted oxime, e.g., wherein the oxygen atom of the oxime is substituted with a group that covalently links the oxime to the active agent; and the carbon atom of the oxime is substituted with a group that covalently links the oxime to the antibody.

Abstract: A packaged light emitting device can include a mounting substrate including first and second electrode portions that are separated by a recess defined by a first side surface of the first electrode portion and a second side surface of the second electrode portion that is opposite the first side surface. An insulation support member can partially fill a lower portion of the recess to partially cover the first side surface and partially cover the second side surface. A light emitting device can be coupled to the first and second electrode portions of the mounting substrate and a sealing member can be on the mounting substrate covering the light emitting device.

Abstract: Provided are compounds comprising a self-immolative group, and the compounds comprising a self-immolative group according to the present invention may include a protein (for example, an oligopeptide, a polypeptide, an antibody, or the like) having substrate-specificity for a target and an active agent (for example, a drug, a toxin, a ligand, a detection probe, or the like) having a specific function or activity.

Abstract: Provided are a quantum dot glass cell and a light-emitting device package including the quantum dot glass cell. The quantum dot glass cell may include a quantum dot powder in which quantum dots, inorganic homogenizing particles, and a binder are mixed, a dispersion matrix in which the quantum dot powder is dispersed, and a glass sealing structure surrounding the dispersion matrix. The quantum dot glass cell and the light-emitting device package including the quantum dot glass cell may have improved light emission characteristics and improved reliability.

Abstract: Provided are a memory device and a memory system performing request-based refresh, and an operating method of the memory device. The operating method includes: determining a weak row by counting an activated number of at least one row; requesting for refresh on the weak row based on a result of the determining; and performing target refresh on the weak row upon receiving a refresh command according to the requesting.

Abstract: A semiconductor memory device includes a memory cell array, an error correction circuit, an error log register and a control logic circuit. The memory cell array includes a plurality of memory bank arrays and each of the memory bank arrays includes a plurality of pages. The control logic circuit is configured to control the error correction circuit to perform an ECC decoding sequentially on some of the pages designated at least one access address for detecting at least one bit error, in response to a first command received from a memory controller. The control logic circuit performs an error logging operation to write page error information into the error log register and the page error information includes a number of error occurrence on each of the some pages determined from the detecting.